Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U
0004  *
0005  * Copyright (C) 2020 Renesas Electronics Corp.
0006  */
0007 
0008 /dts-v1/;
0009 #include "r8a779a0-falcon-cpu.dtsi"
0010 #include "r8a779a0-falcon-csi-dsi.dtsi"
0011 #include "r8a779a0-falcon-ethernet.dtsi"
0012 
0013 / {
0014         model = "Renesas Falcon CPU and Breakout boards based on r8a779a0";
0015         compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0";
0016 
0017         aliases {
0018                 ethernet0 = &avb0;
0019         };
0020 };
0021 
0022 &avb0 {
0023         pinctrl-0 = <&avb0_pins>;
0024         pinctrl-names = "default";
0025         phy-handle = <&phy0>;
0026         tx-internal-delay-ps = <2000>;
0027         status = "okay";
0028 
0029         phy0: ethernet-phy@0 {
0030                 compatible = "ethernet-phy-id0022.1622",
0031                              "ethernet-phy-ieee802.3-c22";
0032                 rxc-skew-ps = <1500>;
0033                 reg = <0>;
0034                 interrupt-parent = <&gpio4>;
0035                 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
0036                 reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
0037         };
0038 };
0039 
0040 &canfd {
0041         pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>;
0042         pinctrl-names = "default";
0043         status = "okay";
0044 
0045         channel0 {
0046                 status = "okay";
0047         };
0048 
0049         channel1 {
0050                 status = "okay";
0051         };
0052 };
0053 
0054 &i2c0 {
0055         eeprom@51 {
0056                 compatible = "rohm,br24g01", "atmel,24c01";
0057                 label = "breakout-board";
0058                 reg = <0x51>;
0059                 pagesize = <8>;
0060         };
0061 };
0062 
0063 &pfc {
0064         avb0_pins: avb0 {
0065                 mux {
0066                         groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
0067                                  "avb0_txcrefclk";
0068                         function = "avb0";
0069                 };
0070 
0071                 pins_mdio {
0072                         groups = "avb0_mdio";
0073                         drive-strength = <21>;
0074                 };
0075 
0076                 pins_mii {
0077                         groups = "avb0_rgmii";
0078                         drive-strength = <21>;
0079                 };
0080 
0081         };
0082 
0083         canfd0_pins: canfd0 {
0084                 groups = "canfd0_data";
0085                 function = "canfd0";
0086         };
0087 
0088         canfd1_pins: canfd1 {
0089                 groups = "canfd1_data";
0090                 function = "canfd1";
0091         };
0092 };