0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the Falcon CPU board
0004 *
0005 * Copyright (C) 2020 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010 #include <dt-bindings/leds/common.h>
0011
0012 #include "r8a779a0.dtsi"
0013
0014 / {
0015 model = "Renesas Falcon CPU board";
0016 compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
0017
0018 aliases {
0019 serial0 = &scif0;
0020 };
0021
0022 chosen {
0023 stdout-path = "serial0:115200n8";
0024 };
0025
0026 keys {
0027 compatible = "gpio-keys";
0028
0029 pinctrl-0 = <&keys_pins>;
0030 pinctrl-names = "default";
0031
0032 key-1 {
0033 gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
0034 linux,code = <KEY_1>;
0035 label = "SW47";
0036 wakeup-source;
0037 debounce-interval = <20>;
0038 };
0039
0040 key-2 {
0041 gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
0042 linux,code = <KEY_2>;
0043 label = "SW48";
0044 wakeup-source;
0045 debounce-interval = <20>;
0046 };
0047
0048 key-3 {
0049 gpios = <&gpio6 20 GPIO_ACTIVE_LOW>;
0050 linux,code = <KEY_3>;
0051 label = "SW49";
0052 wakeup-source;
0053 debounce-interval = <20>;
0054 };
0055 };
0056
0057 leds {
0058 compatible = "gpio-leds";
0059
0060 led-1 {
0061 gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
0062 color = <LED_COLOR_ID_GREEN>;
0063 function = LED_FUNCTION_INDICATOR;
0064 function-enumerator = <1>;
0065 };
0066 led-2 {
0067 gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
0068 color = <LED_COLOR_ID_GREEN>;
0069 function = LED_FUNCTION_INDICATOR;
0070 function-enumerator = <2>;
0071 };
0072 led-3 {
0073 gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
0074 color = <LED_COLOR_ID_GREEN>;
0075 function = LED_FUNCTION_INDICATOR;
0076 function-enumerator = <3>;
0077 };
0078 };
0079
0080 memory@48000000 {
0081 device_type = "memory";
0082 /* first 128MB is reserved for secure area. */
0083 reg = <0x0 0x48000000 0x0 0x78000000>;
0084 };
0085
0086 memory@500000000 {
0087 device_type = "memory";
0088 reg = <0x5 0x00000000 0x0 0x80000000>;
0089 };
0090
0091 memory@600000000 {
0092 device_type = "memory";
0093 reg = <0x6 0x00000000 0x0 0x80000000>;
0094 };
0095
0096 memory@700000000 {
0097 device_type = "memory";
0098 reg = <0x7 0x00000000 0x0 0x80000000>;
0099 };
0100
0101 mini-dp-con {
0102 compatible = "dp-connector";
0103 label = "CN5";
0104 type = "mini";
0105
0106 port {
0107 mini_dp_con_in: endpoint {
0108 remote-endpoint = <&sn65dsi86_out>;
0109 };
0110 };
0111 };
0112
0113 reg_1p2v: regulator-1p2v {
0114 compatible = "regulator-fixed";
0115 regulator-name = "fixed-1.2V";
0116 regulator-min-microvolt = <1200000>;
0117 regulator-max-microvolt = <1200000>;
0118 regulator-boot-on;
0119 regulator-always-on;
0120 };
0121
0122 reg_1p8v: regulator-1p8v {
0123 compatible = "regulator-fixed";
0124 regulator-name = "fixed-1.8V";
0125 regulator-min-microvolt = <1800000>;
0126 regulator-max-microvolt = <1800000>;
0127 regulator-boot-on;
0128 regulator-always-on;
0129 };
0130
0131 reg_3p3v: regulator-3p3v {
0132 compatible = "regulator-fixed";
0133 regulator-name = "fixed-3.3V";
0134 regulator-min-microvolt = <3300000>;
0135 regulator-max-microvolt = <3300000>;
0136 regulator-boot-on;
0137 regulator-always-on;
0138 };
0139
0140 sn65dsi86_refclk: clk-x6 {
0141 compatible = "fixed-clock";
0142 #clock-cells = <0>;
0143 clock-frequency = <38400000>;
0144 };
0145 };
0146
0147 &dsi0 {
0148 status = "okay";
0149
0150 ports {
0151 port@1 {
0152 dsi0_out: endpoint {
0153 remote-endpoint = <&sn65dsi86_in>;
0154 data-lanes = <1 2 3 4>;
0155 };
0156 };
0157 };
0158 };
0159
0160 &du {
0161 status = "okay";
0162 };
0163
0164 &extal_clk {
0165 clock-frequency = <16666666>;
0166 };
0167
0168 &extalr_clk {
0169 clock-frequency = <32768>;
0170 };
0171
0172 &i2c0 {
0173 pinctrl-0 = <&i2c0_pins>;
0174 pinctrl-names = "default";
0175
0176 status = "okay";
0177 clock-frequency = <400000>;
0178
0179 eeprom@50 {
0180 compatible = "rohm,br24g01", "atmel,24c01";
0181 label = "cpu-board";
0182 reg = <0x50>;
0183 pagesize = <8>;
0184 };
0185 };
0186
0187 &i2c1 {
0188 pinctrl-0 = <&i2c1_pins>;
0189 pinctrl-names = "default";
0190
0191 status = "okay";
0192 clock-frequency = <400000>;
0193
0194 bridge@2c {
0195 pinctrl-0 = <&irq0_pins>;
0196 pinctrl-names = "default";
0197
0198 compatible = "ti,sn65dsi86";
0199 reg = <0x2c>;
0200
0201 clocks = <&sn65dsi86_refclk>;
0202 clock-names = "refclk";
0203
0204 interrupt-parent = <&intc_ex>;
0205 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0206
0207 vccio-supply = <®_1p8v>;
0208 vpll-supply = <®_1p8v>;
0209 vcca-supply = <®_1p2v>;
0210 vcc-supply = <®_1p2v>;
0211
0212 ports {
0213 #address-cells = <1>;
0214 #size-cells = <0>;
0215
0216 port@0 {
0217 reg = <0>;
0218 sn65dsi86_in: endpoint {
0219 remote-endpoint = <&dsi0_out>;
0220 };
0221 };
0222
0223 port@1 {
0224 reg = <1>;
0225 sn65dsi86_out: endpoint {
0226 remote-endpoint = <&mini_dp_con_in>;
0227 };
0228 };
0229 };
0230 };
0231 };
0232
0233 &i2c6 {
0234 pinctrl-0 = <&i2c6_pins>;
0235 pinctrl-names = "default";
0236
0237 status = "okay";
0238 clock-frequency = <400000>;
0239 };
0240
0241 &mmc0 {
0242 pinctrl-0 = <&mmc_pins>;
0243 pinctrl-1 = <&mmc_pins>;
0244 pinctrl-names = "default", "state_uhs";
0245
0246 vmmc-supply = <®_3p3v>;
0247 vqmmc-supply = <®_1p8v>;
0248 mmc-hs200-1_8v;
0249 mmc-hs400-1_8v;
0250 bus-width = <8>;
0251 no-sd;
0252 no-sdio;
0253 non-removable;
0254 full-pwr-cycle-in-suspend;
0255 status = "okay";
0256 };
0257
0258 &pfc {
0259 pinctrl-0 = <&scif_clk_pins>;
0260 pinctrl-names = "default";
0261
0262 i2c0_pins: i2c0 {
0263 groups = "i2c0";
0264 function = "i2c0";
0265 };
0266
0267 i2c1_pins: i2c1 {
0268 groups = "i2c1";
0269 function = "i2c1";
0270 };
0271
0272 i2c6_pins: i2c6 {
0273 groups = "i2c6";
0274 function = "i2c6";
0275 };
0276
0277 irq0_pins: irq0 {
0278 groups = "intc_ex_irq0";
0279 function = "intc_ex";
0280 };
0281
0282 keys_pins: keys {
0283 pins = "GP_6_18", "GP_6_19", "GP_6_20";
0284 bias-pull-up;
0285 };
0286
0287 mmc_pins: mmc {
0288 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
0289 function = "mmc";
0290 power-source = <1800>;
0291 };
0292
0293 qspi0_pins: qspi0 {
0294 groups = "qspi0_ctrl", "qspi0_data4";
0295 function = "qspi0";
0296 };
0297
0298 scif0_pins: scif0 {
0299 groups = "scif0_data", "scif0_ctrl";
0300 function = "scif0";
0301 };
0302
0303 scif_clk_pins: scif_clk {
0304 groups = "scif_clk";
0305 function = "scif_clk";
0306 };
0307 };
0308
0309 &rpc {
0310 pinctrl-0 = <&qspi0_pins>;
0311 pinctrl-names = "default";
0312
0313 status = "okay";
0314
0315 flash@0 {
0316 compatible = "spansion,s25fs512s", "jedec,spi-nor";
0317 reg = <0>;
0318 spi-max-frequency = <40000000>;
0319 spi-rx-bus-width = <4>;
0320
0321 partitions {
0322 compatible = "fixed-partitions";
0323 #address-cells = <1>;
0324 #size-cells = <1>;
0325
0326 boot@0 {
0327 reg = <0x0 0xcc0000>;
0328 read-only;
0329 };
0330 user@cc0000 {
0331 reg = <0xcc0000 0x3340000>;
0332 };
0333 };
0334 };
0335 };
0336
0337 &rwdt {
0338 timeout-sec = <60>;
0339 status = "okay";
0340 };
0341
0342 &scif0 {
0343 pinctrl-0 = <&scif0_pins>;
0344 pinctrl-names = "default";
0345
0346 uart-has-rtscts;
0347 status = "okay";
0348 };
0349
0350 &scif_clk {
0351 clock-frequency = <24000000>;
0352 };