0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car D3 (R8A77995) SoC
0004 *
0005 * Copyright (C) 2016 Renesas Electronics Corp.
0006 * Copyright (C) 2017 Glider bvba
0007 */
0008
0009 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
0010 #include <dt-bindings/interrupt-controller/arm-gic.h>
0011 #include <dt-bindings/power/r8a77995-sysc.h>
0012
0013 / {
0014 compatible = "renesas,r8a77995";
0015 #address-cells = <2>;
0016 #size-cells = <2>;
0017
0018 /*
0019 * The external audio clocks are configured as 0 Hz fixed frequency
0020 * clocks by default.
0021 * Boards that provide audio clocks should override them.
0022 */
0023 audio_clk_a: audio_clk_a {
0024 compatible = "fixed-clock";
0025 #clock-cells = <0>;
0026 clock-frequency = <0>;
0027 };
0028
0029 audio_clk_b: audio_clk_b {
0030 compatible = "fixed-clock";
0031 #clock-cells = <0>;
0032 clock-frequency = <0>;
0033 };
0034
0035 /* External CAN clock - to be overridden by boards that provide it */
0036 can_clk: can {
0037 compatible = "fixed-clock";
0038 #clock-cells = <0>;
0039 clock-frequency = <0>;
0040 };
0041
0042 cpus {
0043 #address-cells = <1>;
0044 #size-cells = <0>;
0045
0046 a53_0: cpu@0 {
0047 compatible = "arm,cortex-a53";
0048 reg = <0x0>;
0049 device_type = "cpu";
0050 power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
0051 next-level-cache = <&L2_CA53>;
0052 enable-method = "psci";
0053 };
0054
0055 L2_CA53: cache-controller-1 {
0056 compatible = "cache";
0057 power-domains = <&sysc R8A77995_PD_CA53_SCU>;
0058 cache-unified;
0059 cache-level = <2>;
0060 };
0061 };
0062
0063 extal_clk: extal {
0064 compatible = "fixed-clock";
0065 #clock-cells = <0>;
0066 /* This value must be overridden by the board */
0067 clock-frequency = <0>;
0068 };
0069
0070 pmu_a53 {
0071 compatible = "arm,cortex-a53-pmu";
0072 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
0073 };
0074
0075 psci {
0076 compatible = "arm,psci-1.0", "arm,psci-0.2";
0077 method = "smc";
0078 };
0079
0080 scif_clk: scif {
0081 compatible = "fixed-clock";
0082 #clock-cells = <0>;
0083 clock-frequency = <0>;
0084 };
0085
0086 soc {
0087 compatible = "simple-bus";
0088 interrupt-parent = <&gic>;
0089 #address-cells = <2>;
0090 #size-cells = <2>;
0091 ranges;
0092
0093 rwdt: watchdog@e6020000 {
0094 compatible = "renesas,r8a77995-wdt",
0095 "renesas,rcar-gen3-wdt";
0096 reg = <0 0xe6020000 0 0x0c>;
0097 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0098 clocks = <&cpg CPG_MOD 402>;
0099 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0100 resets = <&cpg 402>;
0101 status = "disabled";
0102 };
0103
0104 gpio0: gpio@e6050000 {
0105 compatible = "renesas,gpio-r8a77995",
0106 "renesas,rcar-gen3-gpio";
0107 reg = <0 0xe6050000 0 0x50>;
0108 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0109 #gpio-cells = <2>;
0110 gpio-controller;
0111 gpio-ranges = <&pfc 0 0 9>;
0112 #interrupt-cells = <2>;
0113 interrupt-controller;
0114 clocks = <&cpg CPG_MOD 912>;
0115 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0116 resets = <&cpg 912>;
0117 };
0118
0119 gpio1: gpio@e6051000 {
0120 compatible = "renesas,gpio-r8a77995",
0121 "renesas,rcar-gen3-gpio";
0122 reg = <0 0xe6051000 0 0x50>;
0123 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0124 #gpio-cells = <2>;
0125 gpio-controller;
0126 gpio-ranges = <&pfc 0 32 32>;
0127 #interrupt-cells = <2>;
0128 interrupt-controller;
0129 clocks = <&cpg CPG_MOD 911>;
0130 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0131 resets = <&cpg 911>;
0132 };
0133
0134 gpio2: gpio@e6052000 {
0135 compatible = "renesas,gpio-r8a77995",
0136 "renesas,rcar-gen3-gpio";
0137 reg = <0 0xe6052000 0 0x50>;
0138 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0139 #gpio-cells = <2>;
0140 gpio-controller;
0141 gpio-ranges = <&pfc 0 64 32>;
0142 #interrupt-cells = <2>;
0143 interrupt-controller;
0144 clocks = <&cpg CPG_MOD 910>;
0145 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0146 resets = <&cpg 910>;
0147 };
0148
0149 gpio3: gpio@e6053000 {
0150 compatible = "renesas,gpio-r8a77995",
0151 "renesas,rcar-gen3-gpio";
0152 reg = <0 0xe6053000 0 0x50>;
0153 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0154 #gpio-cells = <2>;
0155 gpio-controller;
0156 gpio-ranges = <&pfc 0 96 10>;
0157 #interrupt-cells = <2>;
0158 interrupt-controller;
0159 clocks = <&cpg CPG_MOD 909>;
0160 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0161 resets = <&cpg 909>;
0162 };
0163
0164 gpio4: gpio@e6054000 {
0165 compatible = "renesas,gpio-r8a77995",
0166 "renesas,rcar-gen3-gpio";
0167 reg = <0 0xe6054000 0 0x50>;
0168 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0169 #gpio-cells = <2>;
0170 gpio-controller;
0171 gpio-ranges = <&pfc 0 128 32>;
0172 #interrupt-cells = <2>;
0173 interrupt-controller;
0174 clocks = <&cpg CPG_MOD 908>;
0175 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0176 resets = <&cpg 908>;
0177 };
0178
0179 gpio5: gpio@e6055000 {
0180 compatible = "renesas,gpio-r8a77995",
0181 "renesas,rcar-gen3-gpio";
0182 reg = <0 0xe6055000 0 0x50>;
0183 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0184 #gpio-cells = <2>;
0185 gpio-controller;
0186 gpio-ranges = <&pfc 0 160 21>;
0187 #interrupt-cells = <2>;
0188 interrupt-controller;
0189 clocks = <&cpg CPG_MOD 907>;
0190 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0191 resets = <&cpg 907>;
0192 };
0193
0194 gpio6: gpio@e6055400 {
0195 compatible = "renesas,gpio-r8a77995",
0196 "renesas,rcar-gen3-gpio";
0197 reg = <0 0xe6055400 0 0x50>;
0198 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0199 #gpio-cells = <2>;
0200 gpio-controller;
0201 gpio-ranges = <&pfc 0 192 14>;
0202 #interrupt-cells = <2>;
0203 interrupt-controller;
0204 clocks = <&cpg CPG_MOD 906>;
0205 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0206 resets = <&cpg 906>;
0207 };
0208
0209 pfc: pinctrl@e6060000 {
0210 compatible = "renesas,pfc-r8a77995";
0211 reg = <0 0xe6060000 0 0x508>;
0212 };
0213
0214 cmt0: timer@e60f0000 {
0215 compatible = "renesas,r8a77995-cmt0",
0216 "renesas,rcar-gen3-cmt0";
0217 reg = <0 0xe60f0000 0 0x1004>;
0218 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0219 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0220 clocks = <&cpg CPG_MOD 303>;
0221 clock-names = "fck";
0222 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0223 resets = <&cpg 303>;
0224 status = "disabled";
0225 };
0226
0227 cmt1: timer@e6130000 {
0228 compatible = "renesas,r8a77995-cmt1",
0229 "renesas,rcar-gen3-cmt1";
0230 reg = <0 0xe6130000 0 0x1004>;
0231 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0232 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0233 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0234 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0235 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0236 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0237 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0238 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0239 clocks = <&cpg CPG_MOD 302>;
0240 clock-names = "fck";
0241 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0242 resets = <&cpg 302>;
0243 status = "disabled";
0244 };
0245
0246 cmt2: timer@e6140000 {
0247 compatible = "renesas,r8a77995-cmt1",
0248 "renesas,rcar-gen3-cmt1";
0249 reg = <0 0xe6140000 0 0x1004>;
0250 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0251 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0252 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0253 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0254 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0255 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0256 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0257 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0258 clocks = <&cpg CPG_MOD 301>;
0259 clock-names = "fck";
0260 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0261 resets = <&cpg 301>;
0262 status = "disabled";
0263 };
0264
0265 cmt3: timer@e6148000 {
0266 compatible = "renesas,r8a77995-cmt1",
0267 "renesas,rcar-gen3-cmt1";
0268 reg = <0 0xe6148000 0 0x1004>;
0269 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0270 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0271 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0272 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0273 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0274 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0275 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0276 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0277 clocks = <&cpg CPG_MOD 300>;
0278 clock-names = "fck";
0279 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0280 resets = <&cpg 300>;
0281 status = "disabled";
0282 };
0283
0284 cpg: clock-controller@e6150000 {
0285 compatible = "renesas,r8a77995-cpg-mssr";
0286 reg = <0 0xe6150000 0 0x1000>;
0287 clocks = <&extal_clk>;
0288 clock-names = "extal";
0289 #clock-cells = <2>;
0290 #power-domain-cells = <0>;
0291 #reset-cells = <1>;
0292 };
0293
0294 rst: reset-controller@e6160000 {
0295 compatible = "renesas,r8a77995-rst";
0296 reg = <0 0xe6160000 0 0x0200>;
0297 };
0298
0299 sysc: system-controller@e6180000 {
0300 compatible = "renesas,r8a77995-sysc";
0301 reg = <0 0xe6180000 0 0x0400>;
0302 #power-domain-cells = <1>;
0303 };
0304
0305 thermal: thermal@e6190000 {
0306 compatible = "renesas,thermal-r8a77995";
0307 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
0308 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0309 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0310 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0311 clocks = <&cpg CPG_MOD 522>;
0312 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0313 resets = <&cpg 522>;
0314 #thermal-sensor-cells = <0>;
0315 };
0316
0317 intc_ex: interrupt-controller@e61c0000 {
0318 compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
0319 #interrupt-cells = <2>;
0320 interrupt-controller;
0321 reg = <0 0xe61c0000 0 0x200>;
0322 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0323 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0324 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0325 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0326 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0327 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0328 clocks = <&cpg CPG_MOD 407>;
0329 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0330 resets = <&cpg 407>;
0331 };
0332
0333 tmu0: timer@e61e0000 {
0334 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
0335 reg = <0 0xe61e0000 0 0x30>;
0336 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0337 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0338 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0339 clocks = <&cpg CPG_MOD 125>;
0340 clock-names = "fck";
0341 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0342 resets = <&cpg 125>;
0343 status = "disabled";
0344 };
0345
0346 tmu1: timer@e6fc0000 {
0347 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
0348 reg = <0 0xe6fc0000 0 0x30>;
0349 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0350 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0351 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0352 clocks = <&cpg CPG_MOD 124>;
0353 clock-names = "fck";
0354 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0355 resets = <&cpg 124>;
0356 status = "disabled";
0357 };
0358
0359 tmu2: timer@e6fd0000 {
0360 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
0361 reg = <0 0xe6fd0000 0 0x30>;
0362 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0363 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0364 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0365 clocks = <&cpg CPG_MOD 123>;
0366 clock-names = "fck";
0367 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0368 resets = <&cpg 123>;
0369 status = "disabled";
0370 };
0371
0372 tmu3: timer@e6fe0000 {
0373 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
0374 reg = <0 0xe6fe0000 0 0x30>;
0375 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0376 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0377 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0378 clocks = <&cpg CPG_MOD 122>;
0379 clock-names = "fck";
0380 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0381 resets = <&cpg 122>;
0382 status = "disabled";
0383 };
0384
0385 tmu4: timer@ffc00000 {
0386 compatible = "renesas,tmu-r8a77995", "renesas,tmu";
0387 reg = <0 0xffc00000 0 0x30>;
0388 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0389 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0390 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0391 clocks = <&cpg CPG_MOD 121>;
0392 clock-names = "fck";
0393 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0394 resets = <&cpg 121>;
0395 status = "disabled";
0396 };
0397
0398 i2c0: i2c@e6500000 {
0399 #address-cells = <1>;
0400 #size-cells = <0>;
0401 compatible = "renesas,i2c-r8a77995",
0402 "renesas,rcar-gen3-i2c";
0403 reg = <0 0xe6500000 0 0x40>;
0404 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0405 clocks = <&cpg CPG_MOD 931>;
0406 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0407 resets = <&cpg 931>;
0408 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0409 <&dmac2 0x91>, <&dmac2 0x90>;
0410 dma-names = "tx", "rx", "tx", "rx";
0411 i2c-scl-internal-delay-ns = <6>;
0412 status = "disabled";
0413 };
0414
0415 i2c1: i2c@e6508000 {
0416 #address-cells = <1>;
0417 #size-cells = <0>;
0418 compatible = "renesas,i2c-r8a77995",
0419 "renesas,rcar-gen3-i2c";
0420 reg = <0 0xe6508000 0 0x40>;
0421 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0422 clocks = <&cpg CPG_MOD 930>;
0423 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0424 resets = <&cpg 930>;
0425 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0426 <&dmac2 0x93>, <&dmac2 0x92>;
0427 dma-names = "tx", "rx", "tx", "rx";
0428 i2c-scl-internal-delay-ns = <6>;
0429 status = "disabled";
0430 };
0431
0432 i2c2: i2c@e6510000 {
0433 #address-cells = <1>;
0434 #size-cells = <0>;
0435 compatible = "renesas,i2c-r8a77995",
0436 "renesas,rcar-gen3-i2c";
0437 reg = <0 0xe6510000 0 0x40>;
0438 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0439 clocks = <&cpg CPG_MOD 929>;
0440 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0441 resets = <&cpg 929>;
0442 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0443 <&dmac2 0x95>, <&dmac2 0x94>;
0444 dma-names = "tx", "rx", "tx", "rx";
0445 i2c-scl-internal-delay-ns = <6>;
0446 status = "disabled";
0447 };
0448
0449 i2c3: i2c@e66d0000 {
0450 #address-cells = <1>;
0451 #size-cells = <0>;
0452 compatible = "renesas,i2c-r8a77995",
0453 "renesas,rcar-gen3-i2c";
0454 reg = <0 0xe66d0000 0 0x40>;
0455 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0456 clocks = <&cpg CPG_MOD 928>;
0457 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0458 resets = <&cpg 928>;
0459 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0460 dma-names = "tx", "rx";
0461 i2c-scl-internal-delay-ns = <6>;
0462 status = "disabled";
0463 };
0464
0465 hscif0: serial@e6540000 {
0466 compatible = "renesas,hscif-r8a77995",
0467 "renesas,rcar-gen3-hscif",
0468 "renesas,hscif";
0469 reg = <0 0xe6540000 0 0x60>;
0470 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0471 clocks = <&cpg CPG_MOD 520>,
0472 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0473 <&scif_clk>;
0474 clock-names = "fck", "brg_int", "scif_clk";
0475 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0476 <&dmac2 0x31>, <&dmac2 0x30>;
0477 dma-names = "tx", "rx", "tx", "rx";
0478 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0479 resets = <&cpg 520>;
0480 status = "disabled";
0481 };
0482
0483 hscif3: serial@e66a0000 {
0484 compatible = "renesas,hscif-r8a77995",
0485 "renesas,rcar-gen3-hscif",
0486 "renesas,hscif";
0487 reg = <0 0xe66a0000 0 0x60>;
0488 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0489 clocks = <&cpg CPG_MOD 517>,
0490 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0491 <&scif_clk>;
0492 clock-names = "fck", "brg_int", "scif_clk";
0493 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0494 dma-names = "tx", "rx";
0495 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0496 resets = <&cpg 517>;
0497 status = "disabled";
0498 };
0499
0500 hsusb: usb@e6590000 {
0501 compatible = "renesas,usbhs-r8a77995",
0502 "renesas,rcar-gen3-usbhs";
0503 reg = <0 0xe6590000 0 0x200>;
0504 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0505 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0506 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0507 <&usb_dmac1 0>, <&usb_dmac1 1>;
0508 dma-names = "ch0", "ch1", "ch2", "ch3";
0509 renesas,buswait = <11>;
0510 phys = <&usb2_phy0 3>;
0511 phy-names = "usb";
0512 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0513 resets = <&cpg 704>, <&cpg 703>;
0514 status = "disabled";
0515 };
0516
0517 usb_dmac0: dma-controller@e65a0000 {
0518 compatible = "renesas,r8a77995-usb-dmac",
0519 "renesas,usb-dmac";
0520 reg = <0 0xe65a0000 0 0x100>;
0521 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0522 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0523 interrupt-names = "ch0", "ch1";
0524 clocks = <&cpg CPG_MOD 330>;
0525 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0526 resets = <&cpg 330>;
0527 #dma-cells = <1>;
0528 dma-channels = <2>;
0529 };
0530
0531 usb_dmac1: dma-controller@e65b0000 {
0532 compatible = "renesas,r8a77995-usb-dmac",
0533 "renesas,usb-dmac";
0534 reg = <0 0xe65b0000 0 0x100>;
0535 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0536 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0537 interrupt-names = "ch0", "ch1";
0538 clocks = <&cpg CPG_MOD 331>;
0539 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0540 resets = <&cpg 331>;
0541 #dma-cells = <1>;
0542 dma-channels = <2>;
0543 };
0544
0545 arm_cc630p: crypto@e6601000 {
0546 compatible = "arm,cryptocell-630p-ree";
0547 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
0548 reg = <0x0 0xe6601000 0 0x1000>;
0549 clocks = <&cpg CPG_MOD 229>;
0550 resets = <&cpg 229>;
0551 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0552 };
0553
0554 canfd: can@e66c0000 {
0555 compatible = "renesas,r8a77995-canfd",
0556 "renesas,rcar-gen3-canfd";
0557 reg = <0 0xe66c0000 0 0x8000>;
0558 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0559 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0560 interrupt-names = "ch_int", "g_int";
0561 clocks = <&cpg CPG_MOD 914>,
0562 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
0563 <&can_clk>;
0564 clock-names = "fck", "canfd", "can_clk";
0565 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
0566 assigned-clock-rates = <40000000>;
0567 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0568 resets = <&cpg 914>;
0569 status = "disabled";
0570
0571 channel0 {
0572 status = "disabled";
0573 };
0574
0575 channel1 {
0576 status = "disabled";
0577 };
0578 };
0579
0580 dmac0: dma-controller@e6700000 {
0581 compatible = "renesas,dmac-r8a77995",
0582 "renesas,rcar-dmac";
0583 reg = <0 0xe6700000 0 0x10000>;
0584 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0585 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0586 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0587 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0588 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0589 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0590 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0591 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0592 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
0593 interrupt-names = "error",
0594 "ch0", "ch1", "ch2", "ch3",
0595 "ch4", "ch5", "ch6", "ch7";
0596 clocks = <&cpg CPG_MOD 219>;
0597 clock-names = "fck";
0598 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0599 resets = <&cpg 219>;
0600 #dma-cells = <1>;
0601 dma-channels = <8>;
0602 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0603 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0604 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0605 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>;
0606 };
0607
0608 dmac1: dma-controller@e7300000 {
0609 compatible = "renesas,dmac-r8a77995",
0610 "renesas,rcar-dmac";
0611 reg = <0 0xe7300000 0 0x10000>;
0612 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0613 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0614 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0615 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0616 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0617 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0618 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0619 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0620 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
0621 interrupt-names = "error",
0622 "ch0", "ch1", "ch2", "ch3",
0623 "ch4", "ch5", "ch6", "ch7";
0624 clocks = <&cpg CPG_MOD 218>;
0625 clock-names = "fck";
0626 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0627 resets = <&cpg 218>;
0628 #dma-cells = <1>;
0629 dma-channels = <8>;
0630 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
0631 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
0632 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
0633 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
0634 };
0635
0636 dmac2: dma-controller@e7310000 {
0637 compatible = "renesas,dmac-r8a77995",
0638 "renesas,rcar-dmac";
0639 reg = <0 0xe7310000 0 0x10000>;
0640 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
0641 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
0642 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
0643 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
0644 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
0645 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
0646 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
0647 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
0648 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
0649 interrupt-names = "error",
0650 "ch0", "ch1", "ch2", "ch3",
0651 "ch4", "ch5", "ch6", "ch7";
0652 clocks = <&cpg CPG_MOD 217>;
0653 clock-names = "fck";
0654 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0655 resets = <&cpg 217>;
0656 #dma-cells = <1>;
0657 dma-channels = <8>;
0658 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
0659 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
0660 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
0661 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
0662 };
0663
0664 ipmmu_ds0: iommu@e6740000 {
0665 compatible = "renesas,ipmmu-r8a77995";
0666 reg = <0 0xe6740000 0 0x1000>;
0667 renesas,ipmmu-main = <&ipmmu_mm 0>;
0668 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0669 #iommu-cells = <1>;
0670 };
0671
0672 ipmmu_ds1: iommu@e7740000 {
0673 compatible = "renesas,ipmmu-r8a77995";
0674 reg = <0 0xe7740000 0 0x1000>;
0675 renesas,ipmmu-main = <&ipmmu_mm 1>;
0676 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0677 #iommu-cells = <1>;
0678 };
0679
0680 ipmmu_hc: iommu@e6570000 {
0681 compatible = "renesas,ipmmu-r8a77995";
0682 reg = <0 0xe6570000 0 0x1000>;
0683 renesas,ipmmu-main = <&ipmmu_mm 2>;
0684 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0685 #iommu-cells = <1>;
0686 };
0687
0688 ipmmu_mm: iommu@e67b0000 {
0689 compatible = "renesas,ipmmu-r8a77995";
0690 reg = <0 0xe67b0000 0 0x1000>;
0691 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
0692 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
0693 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0694 #iommu-cells = <1>;
0695 };
0696
0697 ipmmu_mp: iommu@ec670000 {
0698 compatible = "renesas,ipmmu-r8a77995";
0699 reg = <0 0xec670000 0 0x1000>;
0700 renesas,ipmmu-main = <&ipmmu_mm 4>;
0701 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0702 #iommu-cells = <1>;
0703 };
0704
0705 ipmmu_pv0: iommu@fd800000 {
0706 compatible = "renesas,ipmmu-r8a77995";
0707 reg = <0 0xfd800000 0 0x1000>;
0708 renesas,ipmmu-main = <&ipmmu_mm 6>;
0709 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0710 #iommu-cells = <1>;
0711 };
0712
0713 ipmmu_rt: iommu@ffc80000 {
0714 compatible = "renesas,ipmmu-r8a77995";
0715 reg = <0 0xffc80000 0 0x1000>;
0716 renesas,ipmmu-main = <&ipmmu_mm 10>;
0717 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0718 #iommu-cells = <1>;
0719 };
0720
0721 ipmmu_vc0: iommu@fe6b0000 {
0722 compatible = "renesas,ipmmu-r8a77995";
0723 reg = <0 0xfe6b0000 0 0x1000>;
0724 renesas,ipmmu-main = <&ipmmu_mm 12>;
0725 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0726 #iommu-cells = <1>;
0727 };
0728
0729 ipmmu_vi0: iommu@febd0000 {
0730 compatible = "renesas,ipmmu-r8a77995";
0731 reg = <0 0xfebd0000 0 0x1000>;
0732 renesas,ipmmu-main = <&ipmmu_mm 14>;
0733 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0734 #iommu-cells = <1>;
0735 };
0736
0737 ipmmu_vp0: iommu@fe990000 {
0738 compatible = "renesas,ipmmu-r8a77995";
0739 reg = <0 0xfe990000 0 0x1000>;
0740 renesas,ipmmu-main = <&ipmmu_mm 16>;
0741 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0742 #iommu-cells = <1>;
0743 };
0744
0745 avb: ethernet@e6800000 {
0746 compatible = "renesas,etheravb-r8a77995",
0747 "renesas,etheravb-rcar-gen3";
0748 reg = <0 0xe6800000 0 0x800>;
0749 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0750 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0751 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0752 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0753 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0754 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0755 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
0756 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0757 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0758 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0759 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0760 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0761 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0762 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0763 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0764 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0765 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0766 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0767 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0768 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0769 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0770 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
0771 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
0772 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
0773 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0774 interrupt-names = "ch0", "ch1", "ch2", "ch3",
0775 "ch4", "ch5", "ch6", "ch7",
0776 "ch8", "ch9", "ch10", "ch11",
0777 "ch12", "ch13", "ch14", "ch15",
0778 "ch16", "ch17", "ch18", "ch19",
0779 "ch20", "ch21", "ch22", "ch23",
0780 "ch24";
0781 clocks = <&cpg CPG_MOD 812>;
0782 clock-names = "fck";
0783 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0784 resets = <&cpg 812>;
0785 phy-mode = "rgmii";
0786 rx-internal-delay-ps = <1800>;
0787 iommus = <&ipmmu_ds0 16>;
0788 #address-cells = <1>;
0789 #size-cells = <0>;
0790 status = "disabled";
0791 };
0792
0793 can0: can@e6c30000 {
0794 compatible = "renesas,can-r8a77995",
0795 "renesas,rcar-gen3-can";
0796 reg = <0 0xe6c30000 0 0x1000>;
0797 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
0798 clocks = <&cpg CPG_MOD 916>,
0799 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
0800 <&can_clk>;
0801 clock-names = "clkp1", "clkp2", "can_clk";
0802 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
0803 assigned-clock-rates = <40000000>;
0804 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0805 resets = <&cpg 916>;
0806 status = "disabled";
0807 };
0808
0809 can1: can@e6c38000 {
0810 compatible = "renesas,can-r8a77995",
0811 "renesas,rcar-gen3-can";
0812 reg = <0 0xe6c38000 0 0x1000>;
0813 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
0814 clocks = <&cpg CPG_MOD 915>,
0815 <&cpg CPG_CORE R8A77995_CLK_CANFD>,
0816 <&can_clk>;
0817 clock-names = "clkp1", "clkp2", "can_clk";
0818 assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
0819 assigned-clock-rates = <40000000>;
0820 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0821 resets = <&cpg 915>;
0822 status = "disabled";
0823 };
0824
0825 pwm0: pwm@e6e30000 {
0826 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
0827 reg = <0 0xe6e30000 0 0x8>;
0828 #pwm-cells = <2>;
0829 clocks = <&cpg CPG_MOD 523>;
0830 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0831 resets = <&cpg 523>;
0832 status = "disabled";
0833 };
0834
0835 pwm1: pwm@e6e31000 {
0836 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
0837 reg = <0 0xe6e31000 0 0x8>;
0838 #pwm-cells = <2>;
0839 clocks = <&cpg CPG_MOD 523>;
0840 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0841 resets = <&cpg 523>;
0842 status = "disabled";
0843 };
0844
0845 pwm2: pwm@e6e32000 {
0846 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
0847 reg = <0 0xe6e32000 0 0x8>;
0848 #pwm-cells = <2>;
0849 clocks = <&cpg CPG_MOD 523>;
0850 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0851 resets = <&cpg 523>;
0852 status = "disabled";
0853 };
0854
0855 pwm3: pwm@e6e33000 {
0856 compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar";
0857 reg = <0 0xe6e33000 0 0x8>;
0858 #pwm-cells = <2>;
0859 clocks = <&cpg CPG_MOD 523>;
0860 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0861 resets = <&cpg 523>;
0862 status = "disabled";
0863 };
0864
0865 scif0: serial@e6e60000 {
0866 compatible = "renesas,scif-r8a77995",
0867 "renesas,rcar-gen3-scif", "renesas,scif";
0868 reg = <0 0xe6e60000 0 64>;
0869 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0870 clocks = <&cpg CPG_MOD 207>,
0871 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0872 <&scif_clk>;
0873 clock-names = "fck", "brg_int", "scif_clk";
0874 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
0875 <&dmac2 0x51>, <&dmac2 0x50>;
0876 dma-names = "tx", "rx", "tx", "rx";
0877 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0878 resets = <&cpg 207>;
0879 status = "disabled";
0880 };
0881
0882 scif1: serial@e6e68000 {
0883 compatible = "renesas,scif-r8a77995",
0884 "renesas,rcar-gen3-scif", "renesas,scif";
0885 reg = <0 0xe6e68000 0 64>;
0886 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0887 clocks = <&cpg CPG_MOD 206>,
0888 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0889 <&scif_clk>;
0890 clock-names = "fck", "brg_int", "scif_clk";
0891 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
0892 <&dmac2 0x53>, <&dmac2 0x52>;
0893 dma-names = "tx", "rx", "tx", "rx";
0894 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0895 resets = <&cpg 206>;
0896 status = "disabled";
0897 };
0898
0899 scif2: serial@e6e88000 {
0900 compatible = "renesas,scif-r8a77995",
0901 "renesas,rcar-gen3-scif", "renesas,scif";
0902 reg = <0 0xe6e88000 0 64>;
0903 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
0904 clocks = <&cpg CPG_MOD 310>,
0905 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0906 <&scif_clk>;
0907 clock-names = "fck", "brg_int", "scif_clk";
0908 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
0909 <&dmac2 0x13>, <&dmac2 0x12>;
0910 dma-names = "tx", "rx", "tx", "rx";
0911 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0912 resets = <&cpg 310>;
0913 status = "disabled";
0914 };
0915
0916 scif3: serial@e6c50000 {
0917 compatible = "renesas,scif-r8a77995",
0918 "renesas,rcar-gen3-scif", "renesas,scif";
0919 reg = <0 0xe6c50000 0 64>;
0920 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0921 clocks = <&cpg CPG_MOD 204>,
0922 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0923 <&scif_clk>;
0924 clock-names = "fck", "brg_int", "scif_clk";
0925 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
0926 dma-names = "tx", "rx";
0927 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0928 resets = <&cpg 204>;
0929 status = "disabled";
0930 };
0931
0932 scif4: serial@e6c40000 {
0933 compatible = "renesas,scif-r8a77995",
0934 "renesas,rcar-gen3-scif", "renesas,scif";
0935 reg = <0 0xe6c40000 0 64>;
0936 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
0937 clocks = <&cpg CPG_MOD 203>,
0938 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0939 <&scif_clk>;
0940 clock-names = "fck", "brg_int", "scif_clk";
0941 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
0942 dma-names = "tx", "rx";
0943 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0944 resets = <&cpg 203>;
0945 status = "disabled";
0946 };
0947
0948 scif5: serial@e6f30000 {
0949 compatible = "renesas,scif-r8a77995",
0950 "renesas,rcar-gen3-scif", "renesas,scif";
0951 reg = <0 0xe6f30000 0 64>;
0952 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0953 clocks = <&cpg CPG_MOD 202>,
0954 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
0955 <&scif_clk>;
0956 clock-names = "fck", "brg_int", "scif_clk";
0957 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
0958 <&dmac2 0x5b>, <&dmac2 0x5a>;
0959 dma-names = "tx", "rx", "tx", "rx";
0960 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0961 resets = <&cpg 202>;
0962 status = "disabled";
0963 };
0964
0965 msiof0: spi@e6e90000 {
0966 compatible = "renesas,msiof-r8a77995",
0967 "renesas,rcar-gen3-msiof";
0968 reg = <0 0xe6e90000 0 0x64>;
0969 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
0970 clocks = <&cpg CPG_MOD 211>;
0971 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
0972 <&dmac2 0x41>, <&dmac2 0x40>;
0973 dma-names = "tx", "rx", "tx", "rx";
0974 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0975 resets = <&cpg 211>;
0976 #address-cells = <1>;
0977 #size-cells = <0>;
0978 status = "disabled";
0979 };
0980
0981 msiof1: spi@e6ea0000 {
0982 compatible = "renesas,msiof-r8a77995",
0983 "renesas,rcar-gen3-msiof";
0984 reg = <0 0xe6ea0000 0 0x64>;
0985 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
0986 clocks = <&cpg CPG_MOD 210>;
0987 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
0988 <&dmac2 0x43>, <&dmac2 0x42>;
0989 dma-names = "tx", "rx", "tx", "rx";
0990 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0991 resets = <&cpg 210>;
0992 #address-cells = <1>;
0993 #size-cells = <0>;
0994 status = "disabled";
0995 };
0996
0997 msiof2: spi@e6c00000 {
0998 compatible = "renesas,msiof-r8a77995",
0999 "renesas,rcar-gen3-msiof";
1000 reg = <0 0xe6c00000 0 0x64>;
1001 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1002 clocks = <&cpg CPG_MOD 209>;
1003 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1004 dma-names = "tx", "rx";
1005 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1006 resets = <&cpg 209>;
1007 #address-cells = <1>;
1008 #size-cells = <0>;
1009 status = "disabled";
1010 };
1011
1012 msiof3: spi@e6c10000 {
1013 compatible = "renesas,msiof-r8a77995",
1014 "renesas,rcar-gen3-msiof";
1015 reg = <0 0xe6c10000 0 0x64>;
1016 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1017 clocks = <&cpg CPG_MOD 208>;
1018 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1019 dma-names = "tx", "rx";
1020 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1021 resets = <&cpg 208>;
1022 #address-cells = <1>;
1023 #size-cells = <0>;
1024 status = "disabled";
1025 };
1026
1027 vin4: video@e6ef4000 {
1028 compatible = "renesas,vin-r8a77995";
1029 reg = <0 0xe6ef4000 0 0x1000>;
1030 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MOD 807>;
1032 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1033 resets = <&cpg 807>;
1034 renesas,id = <4>;
1035 status = "disabled";
1036 };
1037
1038 rcar_sound: sound@ec500000 {
1039 /*
1040 * #sound-dai-cells is required
1041 *
1042 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1043 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1044 */
1045 /*
1046 * #clock-cells is required for audio_clkout0/1/2/3
1047 *
1048 * clkout : #clock-cells = <0>; <&rcar_sound>;
1049 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1050 */
1051 compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3";
1052 reg = <0 0xec500000 0 0x1000>, /* SCU */
1053 <0 0xec5a0000 0 0x100>, /* ADG */
1054 <0 0xec540000 0 0x1000>, /* SSIU */
1055 <0 0xec541000 0 0x280>, /* SSI */
1056 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1057 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1058
1059 clocks = <&cpg CPG_MOD 1005>,
1060 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
1061 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1062 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1063 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1064 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1065 <&audio_clk_a>, <&audio_clk_b>,
1066 <&cpg CPG_CORE R8A77995_CLK_ZA2>;
1067 clock-names = "ssi-all",
1068 "ssi.4", "ssi.3",
1069 "src.6", "src.5",
1070 "mix.1", "mix.0",
1071 "ctu.1", "ctu.0",
1072 "dvc.0", "dvc.1",
1073 "clk_a", "clk_b", "clk_i";
1074 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1075 resets = <&cpg 1005>,
1076 <&cpg 1011>, <&cpg 1012>;
1077 reset-names = "ssi-all",
1078 "ssi.4", "ssi.3";
1079 status = "disabled";
1080
1081 rcar_sound,ctu {
1082 ctu00: ctu-0 { };
1083 ctu01: ctu-1 { };
1084 ctu02: ctu-2 { };
1085 ctu03: ctu-3 { };
1086 ctu10: ctu-4 { };
1087 ctu11: ctu-5 { };
1088 ctu12: ctu-6 { };
1089 ctu13: ctu-7 { };
1090 };
1091
1092 rcar_sound,dvc {
1093 dvc0: dvc-0 {
1094 dmas = <&audma0 0xbc>;
1095 dma-names = "tx";
1096 };
1097 dvc1: dvc-1 {
1098 dmas = <&audma0 0xbe>;
1099 dma-names = "tx";
1100 };
1101 };
1102
1103 rcar_sound,mix {
1104 mix0: mix-0 { };
1105 mix1: mix-1 { };
1106 };
1107
1108 rcar_sound,src {
1109 src5: src-5 {
1110 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1111 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1112 dma-names = "rx", "tx";
1113 };
1114 src6: src-6 {
1115 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1116 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1117 dma-names = "rx", "tx";
1118 };
1119 };
1120
1121 rcar_sound,ssi {
1122 ssi3: ssi-3 {
1123 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1124 dmas = <&audma0 0x07>, <&audma0 0x08>,
1125 <&audma0 0x6f>, <&audma0 0x70>;
1126 dma-names = "rx", "tx", "rxu", "txu";
1127 };
1128 ssi4: ssi-4 {
1129 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1130 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1131 <&audma0 0x71>, <&audma0 0x72>;
1132 dma-names = "rx", "tx", "rxu", "txu";
1133 };
1134 };
1135 };
1136
1137 mlp: mlp@ec520000 {
1138 compatible = "renesas,r8a77995-mlp",
1139 "renesas,rcar-gen3-mlp";
1140 reg = <0 0xec520000 0 0x800>;
1141 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
1142 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
1143 clocks = <&cpg CPG_MOD 802>;
1144 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1145 resets = <&cpg 802>;
1146 status = "disabled";
1147 };
1148
1149 audma0: dma-controller@ec700000 {
1150 compatible = "renesas,dmac-r8a77995",
1151 "renesas,rcar-dmac";
1152 reg = <0 0xec700000 0 0x10000>;
1153 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1154 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1155 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1156 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1157 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1158 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1159 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1160 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1161 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1162 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1163 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1164 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1165 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1166 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1167 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1168 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1169 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1170 interrupt-names = "error",
1171 "ch0", "ch1", "ch2", "ch3",
1172 "ch4", "ch5", "ch6", "ch7",
1173 "ch8", "ch9", "ch10", "ch11",
1174 "ch12", "ch13", "ch14", "ch15";
1175 clocks = <&cpg CPG_MOD 502>;
1176 clock-names = "fck";
1177 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1178 resets = <&cpg 502>;
1179 #dma-cells = <1>;
1180 dma-channels = <16>;
1181 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1182 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1183 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1184 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1185 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1186 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1187 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1188 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1189 };
1190
1191 ohci0: usb@ee080000 {
1192 compatible = "generic-ohci";
1193 reg = <0 0xee080000 0 0x100>;
1194 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1195 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1196 phys = <&usb2_phy0 1>;
1197 phy-names = "usb";
1198 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1199 resets = <&cpg 703>, <&cpg 704>;
1200 status = "disabled";
1201 };
1202
1203 ehci0: usb@ee080100 {
1204 compatible = "generic-ehci";
1205 reg = <0 0xee080100 0 0x100>;
1206 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1207 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1208 phys = <&usb2_phy0 2>;
1209 phy-names = "usb";
1210 companion = <&ohci0>;
1211 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1212 resets = <&cpg 703>, <&cpg 704>;
1213 status = "disabled";
1214 };
1215
1216 usb2_phy0: usb-phy@ee080200 {
1217 compatible = "renesas,usb2-phy-r8a77995",
1218 "renesas,rcar-gen3-usb2-phy";
1219 reg = <0 0xee080200 0 0x700>;
1220 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1221 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1222 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1223 resets = <&cpg 703>, <&cpg 704>;
1224 #phy-cells = <1>;
1225 status = "disabled";
1226 };
1227
1228 sdhi2: mmc@ee140000 {
1229 compatible = "renesas,sdhi-r8a77995",
1230 "renesas,rcar-gen3-sdhi";
1231 reg = <0 0xee140000 0 0x2000>;
1232 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1233 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>;
1234 clock-names = "core", "clkh";
1235 max-frequency = <200000000>;
1236 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1237 resets = <&cpg 312>;
1238 iommus = <&ipmmu_ds1 34>;
1239 status = "disabled";
1240 };
1241
1242 rpc: spi@ee200000 {
1243 compatible = "renesas,r8a77995-rpc-if",
1244 "renesas,rcar-gen3-rpc-if";
1245 reg = <0 0xee200000 0 0x200>,
1246 <0 0x08000000 0 0x04000000>,
1247 <0 0xee208000 0 0x100>;
1248 reg-names = "regs", "dirmap", "wbuf";
1249 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 917>;
1251 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1252 resets = <&cpg 917>;
1253 #address-cells = <1>;
1254 #size-cells = <0>;
1255 status = "disabled";
1256 };
1257
1258 gic: interrupt-controller@f1010000 {
1259 compatible = "arm,gic-400";
1260 #interrupt-cells = <3>;
1261 #address-cells = <0>;
1262 interrupt-controller;
1263 reg = <0x0 0xf1010000 0 0x1000>,
1264 <0x0 0xf1020000 0 0x20000>,
1265 <0x0 0xf1040000 0 0x20000>,
1266 <0x0 0xf1060000 0 0x20000>;
1267 interrupts = <GIC_PPI 9
1268 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
1269 clocks = <&cpg CPG_MOD 408>;
1270 clock-names = "clk";
1271 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1272 resets = <&cpg 408>;
1273 };
1274
1275 vspbs: vsp@fe960000 {
1276 compatible = "renesas,vsp2";
1277 reg = <0 0xfe960000 0 0x8000>;
1278 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1279 clocks = <&cpg CPG_MOD 627>;
1280 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1281 resets = <&cpg 627>;
1282 renesas,fcp = <&fcpvb0>;
1283 };
1284
1285 vspd0: vsp@fea20000 {
1286 compatible = "renesas,vsp2";
1287 reg = <0 0xfea20000 0 0x5000>;
1288 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1289 clocks = <&cpg CPG_MOD 623>;
1290 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1291 resets = <&cpg 623>;
1292 renesas,fcp = <&fcpvd0>;
1293 };
1294
1295 vspd1: vsp@fea28000 {
1296 compatible = "renesas,vsp2";
1297 reg = <0 0xfea28000 0 0x5000>;
1298 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1299 clocks = <&cpg CPG_MOD 622>;
1300 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1301 resets = <&cpg 622>;
1302 renesas,fcp = <&fcpvd1>;
1303 };
1304
1305 fcpvb0: fcp@fe96f000 {
1306 compatible = "renesas,fcpv";
1307 reg = <0 0xfe96f000 0 0x200>;
1308 clocks = <&cpg CPG_MOD 607>;
1309 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1310 resets = <&cpg 607>;
1311 iommus = <&ipmmu_vp0 5>;
1312 };
1313
1314 fcpvd0: fcp@fea27000 {
1315 compatible = "renesas,fcpv";
1316 reg = <0 0xfea27000 0 0x200>;
1317 clocks = <&cpg CPG_MOD 603>;
1318 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1319 resets = <&cpg 603>;
1320 iommus = <&ipmmu_vi0 8>;
1321 };
1322
1323 fcpvd1: fcp@fea2f000 {
1324 compatible = "renesas,fcpv";
1325 reg = <0 0xfea2f000 0 0x200>;
1326 clocks = <&cpg CPG_MOD 602>;
1327 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1328 resets = <&cpg 602>;
1329 iommus = <&ipmmu_vi0 9>;
1330 };
1331
1332 cmm0: cmm@fea40000 {
1333 compatible = "renesas,r8a77995-cmm",
1334 "renesas,rcar-gen3-cmm";
1335 reg = <0 0xfea40000 0 0x1000>;
1336 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1337 clocks = <&cpg CPG_MOD 711>;
1338 resets = <&cpg 711>;
1339 };
1340
1341 cmm1: cmm@fea50000 {
1342 compatible = "renesas,r8a77995-cmm",
1343 "renesas,rcar-gen3-cmm";
1344 reg = <0 0xfea50000 0 0x1000>;
1345 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1346 clocks = <&cpg CPG_MOD 710>;
1347 resets = <&cpg 710>;
1348 };
1349
1350 du: display@feb00000 {
1351 compatible = "renesas,du-r8a77995";
1352 reg = <0 0xfeb00000 0 0x40000>;
1353 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1354 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1355 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1356 clock-names = "du.0", "du.1";
1357 resets = <&cpg 724>;
1358 reset-names = "du.0";
1359
1360 renesas,cmms = <&cmm0>, <&cmm1>;
1361 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1362
1363 status = "disabled";
1364
1365 ports {
1366 #address-cells = <1>;
1367 #size-cells = <0>;
1368
1369 port@0 {
1370 reg = <0>;
1371 };
1372
1373 port@1 {
1374 reg = <1>;
1375 du_out_lvds0: endpoint {
1376 remote-endpoint = <&lvds0_in>;
1377 };
1378 };
1379
1380 port@2 {
1381 reg = <2>;
1382 du_out_lvds1: endpoint {
1383 remote-endpoint = <&lvds1_in>;
1384 };
1385 };
1386 };
1387 };
1388
1389 lvds0: lvds-encoder@feb90000 {
1390 compatible = "renesas,r8a77995-lvds";
1391 reg = <0 0xfeb90000 0 0x20>;
1392 clocks = <&cpg CPG_MOD 727>;
1393 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1394 resets = <&cpg 727>;
1395 status = "disabled";
1396
1397 renesas,companion = <&lvds1>;
1398
1399 ports {
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1402
1403 port@0 {
1404 reg = <0>;
1405 lvds0_in: endpoint {
1406 remote-endpoint = <&du_out_lvds0>;
1407 };
1408 };
1409
1410 port@1 {
1411 reg = <1>;
1412 };
1413 };
1414 };
1415
1416 lvds1: lvds-encoder@feb90100 {
1417 compatible = "renesas,r8a77995-lvds";
1418 reg = <0 0xfeb90100 0 0x20>;
1419 clocks = <&cpg CPG_MOD 727>;
1420 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
1421 resets = <&cpg 726>;
1422 status = "disabled";
1423
1424 ports {
1425 #address-cells = <1>;
1426 #size-cells = <0>;
1427
1428 port@0 {
1429 reg = <0>;
1430 lvds1_in: endpoint {
1431 remote-endpoint = <&du_out_lvds1>;
1432 };
1433 };
1434
1435 port@1 {
1436 reg = <1>;
1437 };
1438 };
1439 };
1440
1441 prr: chipid@fff00044 {
1442 compatible = "renesas,prr";
1443 reg = <0 0xfff00044 0 4>;
1444 };
1445 };
1446
1447 thermal-zones {
1448 cpu_thermal: cpu-thermal {
1449 polling-delay-passive = <250>;
1450 polling-delay = <1000>;
1451 thermal-sensors = <&thermal>;
1452
1453 cooling-maps {
1454 };
1455
1456 trips {
1457 cpu-crit {
1458 temperature = <120000>;
1459 hysteresis = <2000>;
1460 type = "critical";
1461 };
1462 };
1463 };
1464 };
1465
1466 timer {
1467 compatible = "arm,armv8-timer";
1468 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1469 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1470 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
1471 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
1472 };
1473 };
