0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car V3H (R8A77980) SoC
0004 *
0005 * Copyright (C) 2018 Renesas Electronics Corp.
0006 * Copyright (C) 2018 Cogent Embedded, Inc.
0007 */
0008
0009 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
0010 #include <dt-bindings/interrupt-controller/irq.h>
0011 #include <dt-bindings/interrupt-controller/arm-gic.h>
0012 #include <dt-bindings/power/r8a77980-sysc.h>
0013
0014 / {
0015 compatible = "renesas,r8a77980";
0016 #address-cells = <2>;
0017 #size-cells = <2>;
0018
0019 aliases {
0020 i2c0 = &i2c0;
0021 i2c1 = &i2c1;
0022 i2c2 = &i2c2;
0023 i2c3 = &i2c3;
0024 i2c4 = &i2c4;
0025 i2c5 = &i2c5;
0026 };
0027
0028 /* External CAN clock - to be overridden by boards that provide it */
0029 can_clk: can {
0030 compatible = "fixed-clock";
0031 #clock-cells = <0>;
0032 clock-frequency = <0>;
0033 };
0034
0035 cpus {
0036 #address-cells = <1>;
0037 #size-cells = <0>;
0038
0039 a53_0: cpu@0 {
0040 device_type = "cpu";
0041 compatible = "arm,cortex-a53";
0042 reg = <0>;
0043 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
0044 power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
0045 next-level-cache = <&L2_CA53>;
0046 enable-method = "psci";
0047 };
0048
0049 a53_1: cpu@1 {
0050 device_type = "cpu";
0051 compatible = "arm,cortex-a53";
0052 reg = <1>;
0053 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
0054 power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
0055 next-level-cache = <&L2_CA53>;
0056 enable-method = "psci";
0057 };
0058
0059 a53_2: cpu@2 {
0060 device_type = "cpu";
0061 compatible = "arm,cortex-a53";
0062 reg = <2>;
0063 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
0064 power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
0065 next-level-cache = <&L2_CA53>;
0066 enable-method = "psci";
0067 };
0068
0069 a53_3: cpu@3 {
0070 device_type = "cpu";
0071 compatible = "arm,cortex-a53";
0072 reg = <3>;
0073 clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
0074 power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
0075 next-level-cache = <&L2_CA53>;
0076 enable-method = "psci";
0077 };
0078
0079 L2_CA53: cache-controller {
0080 compatible = "cache";
0081 power-domains = <&sysc R8A77980_PD_CA53_SCU>;
0082 cache-unified;
0083 cache-level = <2>;
0084 };
0085 };
0086
0087 extal_clk: extal {
0088 compatible = "fixed-clock";
0089 #clock-cells = <0>;
0090 /* This value must be overridden by the board */
0091 clock-frequency = <0>;
0092 };
0093
0094 extalr_clk: extalr {
0095 compatible = "fixed-clock";
0096 #clock-cells = <0>;
0097 /* This value must be overridden by the board */
0098 clock-frequency = <0>;
0099 };
0100
0101 /* External PCIe clock - can be overridden by the board */
0102 pcie_bus_clk: pcie_bus {
0103 compatible = "fixed-clock";
0104 #clock-cells = <0>;
0105 clock-frequency = <0>;
0106 };
0107
0108 pmu_a53 {
0109 compatible = "arm,cortex-a53-pmu";
0110 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0111 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
0112 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
0113 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0114 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
0115 };
0116
0117 psci {
0118 compatible = "arm,psci-1.0", "arm,psci-0.2";
0119 method = "smc";
0120 };
0121
0122 /* External SCIF clock - to be overridden by boards that provide it */
0123 scif_clk: scif {
0124 compatible = "fixed-clock";
0125 #clock-cells = <0>;
0126 clock-frequency = <0>;
0127 };
0128
0129 soc {
0130 compatible = "simple-bus";
0131 interrupt-parent = <&gic>;
0132
0133 #address-cells = <2>;
0134 #size-cells = <2>;
0135 ranges;
0136
0137 rwdt: watchdog@e6020000 {
0138 compatible = "renesas,r8a77980-wdt",
0139 "renesas,rcar-gen3-wdt";
0140 reg = <0 0xe6020000 0 0x0c>;
0141 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0142 clocks = <&cpg CPG_MOD 402>;
0143 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0144 resets = <&cpg 402>;
0145 status = "disabled";
0146 };
0147
0148 gpio0: gpio@e6050000 {
0149 compatible = "renesas,gpio-r8a77980",
0150 "renesas,rcar-gen3-gpio";
0151 reg = <0 0xe6050000 0 0x50>;
0152 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0153 #gpio-cells = <2>;
0154 gpio-controller;
0155 gpio-ranges = <&pfc 0 0 22>;
0156 #interrupt-cells = <2>;
0157 interrupt-controller;
0158 clocks = <&cpg CPG_MOD 912>;
0159 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0160 resets = <&cpg 912>;
0161 };
0162
0163 gpio1: gpio@e6051000 {
0164 compatible = "renesas,gpio-r8a77980",
0165 "renesas,rcar-gen3-gpio";
0166 reg = <0 0xe6051000 0 0x50>;
0167 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0168 #gpio-cells = <2>;
0169 gpio-controller;
0170 gpio-ranges = <&pfc 0 32 28>;
0171 #interrupt-cells = <2>;
0172 interrupt-controller;
0173 clocks = <&cpg CPG_MOD 911>;
0174 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0175 resets = <&cpg 911>;
0176 };
0177
0178 gpio2: gpio@e6052000 {
0179 compatible = "renesas,gpio-r8a77980",
0180 "renesas,rcar-gen3-gpio";
0181 reg = <0 0xe6052000 0 0x50>;
0182 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0183 #gpio-cells = <2>;
0184 gpio-controller;
0185 gpio-ranges = <&pfc 0 64 30>;
0186 #interrupt-cells = <2>;
0187 interrupt-controller;
0188 clocks = <&cpg CPG_MOD 910>;
0189 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0190 resets = <&cpg 910>;
0191 };
0192
0193 gpio3: gpio@e6053000 {
0194 compatible = "renesas,gpio-r8a77980",
0195 "renesas,rcar-gen3-gpio";
0196 reg = <0 0xe6053000 0 0x50>;
0197 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0198 #gpio-cells = <2>;
0199 gpio-controller;
0200 gpio-ranges = <&pfc 0 96 17>;
0201 #interrupt-cells = <2>;
0202 interrupt-controller;
0203 clocks = <&cpg CPG_MOD 909>;
0204 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0205 resets = <&cpg 909>;
0206 };
0207
0208 gpio4: gpio@e6054000 {
0209 compatible = "renesas,gpio-r8a77980",
0210 "renesas,rcar-gen3-gpio";
0211 reg = <0 0xe6054000 0 0x50>;
0212 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0213 #gpio-cells = <2>;
0214 gpio-controller;
0215 gpio-ranges = <&pfc 0 128 25>;
0216 #interrupt-cells = <2>;
0217 interrupt-controller;
0218 clocks = <&cpg CPG_MOD 908>;
0219 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0220 resets = <&cpg 908>;
0221 };
0222
0223 gpio5: gpio@e6055000 {
0224 compatible = "renesas,gpio-r8a77980",
0225 "renesas,rcar-gen3-gpio";
0226 reg = <0 0xe6055000 0 0x50>;
0227 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0228 #gpio-cells = <2>;
0229 gpio-controller;
0230 gpio-ranges = <&pfc 0 160 15>;
0231 #interrupt-cells = <2>;
0232 interrupt-controller;
0233 clocks = <&cpg CPG_MOD 907>;
0234 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0235 resets = <&cpg 907>;
0236 };
0237
0238 pfc: pinctrl@e6060000 {
0239 compatible = "renesas,pfc-r8a77980";
0240 reg = <0 0xe6060000 0 0x50c>;
0241 };
0242
0243 cmt0: timer@e60f0000 {
0244 compatible = "renesas,r8a77980-cmt0",
0245 "renesas,rcar-gen3-cmt0";
0246 reg = <0 0xe60f0000 0 0x1004>;
0247 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0248 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0249 clocks = <&cpg CPG_MOD 303>;
0250 clock-names = "fck";
0251 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0252 resets = <&cpg 303>;
0253 status = "disabled";
0254 };
0255
0256 cmt1: timer@e6130000 {
0257 compatible = "renesas,r8a77980-cmt1",
0258 "renesas,rcar-gen3-cmt1";
0259 reg = <0 0xe6130000 0 0x1004>;
0260 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0261 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0262 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0263 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0264 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0265 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0266 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0267 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0268 clocks = <&cpg CPG_MOD 302>;
0269 clock-names = "fck";
0270 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0271 resets = <&cpg 302>;
0272 status = "disabled";
0273 };
0274
0275 cmt2: timer@e6140000 {
0276 compatible = "renesas,r8a77980-cmt1",
0277 "renesas,rcar-gen3-cmt1";
0278 reg = <0 0xe6140000 0 0x1004>;
0279 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
0280 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
0281 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
0282 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
0283 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
0284 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
0285 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
0286 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
0287 clocks = <&cpg CPG_MOD 301>;
0288 clock-names = "fck";
0289 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0290 resets = <&cpg 301>;
0291 status = "disabled";
0292 };
0293
0294 cmt3: timer@e6148000 {
0295 compatible = "renesas,r8a77980-cmt1",
0296 "renesas,rcar-gen3-cmt1";
0297 reg = <0 0xe6148000 0 0x1004>;
0298 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
0299 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
0300 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
0301 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
0302 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
0303 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
0304 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
0305 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
0306 clocks = <&cpg CPG_MOD 300>;
0307 clock-names = "fck";
0308 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0309 resets = <&cpg 300>;
0310 status = "disabled";
0311 };
0312
0313 cpg: clock-controller@e6150000 {
0314 compatible = "renesas,r8a77980-cpg-mssr";
0315 reg = <0 0xe6150000 0 0x1000>;
0316 clocks = <&extal_clk>, <&extalr_clk>;
0317 clock-names = "extal", "extalr";
0318 #clock-cells = <2>;
0319 #power-domain-cells = <0>;
0320 #reset-cells = <1>;
0321 };
0322
0323 rst: reset-controller@e6160000 {
0324 compatible = "renesas,r8a77980-rst";
0325 reg = <0 0xe6160000 0 0x200>;
0326 };
0327
0328 sysc: system-controller@e6180000 {
0329 compatible = "renesas,r8a77980-sysc";
0330 reg = <0 0xe6180000 0 0x440>;
0331 #power-domain-cells = <1>;
0332 };
0333
0334 tsc: thermal@e6198000 {
0335 compatible = "renesas,r8a77980-thermal";
0336 reg = <0 0xe6198000 0 0x100>,
0337 <0 0xe61a0000 0 0x100>;
0338 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0339 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0340 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0341 clocks = <&cpg CPG_MOD 522>;
0342 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0343 resets = <&cpg 522>;
0344 #thermal-sensor-cells = <1>;
0345 };
0346
0347 intc_ex: interrupt-controller@e61c0000 {
0348 compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
0349 #interrupt-cells = <2>;
0350 interrupt-controller;
0351 reg = <0 0xe61c0000 0 0x200>;
0352 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0353 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0354 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0355 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0356 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0357 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0358 clocks = <&cpg CPG_MOD 407>;
0359 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0360 resets = <&cpg 407>;
0361 };
0362
0363 tmu0: timer@e61e0000 {
0364 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
0365 reg = <0 0xe61e0000 0 0x30>;
0366 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0367 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0368 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0369 clocks = <&cpg CPG_MOD 125>;
0370 clock-names = "fck";
0371 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0372 resets = <&cpg 125>;
0373 status = "disabled";
0374 };
0375
0376 tmu1: timer@e6fc0000 {
0377 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
0378 reg = <0 0xe6fc0000 0 0x30>;
0379 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0380 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0381 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0382 clocks = <&cpg CPG_MOD 124>;
0383 clock-names = "fck";
0384 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0385 resets = <&cpg 124>;
0386 status = "disabled";
0387 };
0388
0389 tmu2: timer@e6fd0000 {
0390 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
0391 reg = <0 0xe6fd0000 0 0x30>;
0392 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0393 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0394 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0395 clocks = <&cpg CPG_MOD 123>;
0396 clock-names = "fck";
0397 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0398 resets = <&cpg 123>;
0399 status = "disabled";
0400 };
0401
0402 tmu3: timer@e6fe0000 {
0403 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
0404 reg = <0 0xe6fe0000 0 0x30>;
0405 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0406 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0407 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0408 clocks = <&cpg CPG_MOD 122>;
0409 clock-names = "fck";
0410 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0411 resets = <&cpg 122>;
0412 status = "disabled";
0413 };
0414
0415 tmu4: timer@ffc00000 {
0416 compatible = "renesas,tmu-r8a77980", "renesas,tmu";
0417 reg = <0 0xffc00000 0 0x30>;
0418 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
0419 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
0420 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
0421 clocks = <&cpg CPG_MOD 121>;
0422 clock-names = "fck";
0423 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0424 resets = <&cpg 121>;
0425 status = "disabled";
0426 };
0427
0428 i2c0: i2c@e6500000 {
0429 compatible = "renesas,i2c-r8a77980",
0430 "renesas,rcar-gen3-i2c";
0431 reg = <0 0xe6500000 0 0x40>;
0432 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0433 clocks = <&cpg CPG_MOD 931>;
0434 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0435 resets = <&cpg 931>;
0436 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0437 <&dmac2 0x91>, <&dmac2 0x90>;
0438 dma-names = "tx", "rx", "tx", "rx";
0439 i2c-scl-internal-delay-ns = <6>;
0440 #address-cells = <1>;
0441 #size-cells = <0>;
0442 status = "disabled";
0443 };
0444
0445 i2c1: i2c@e6508000 {
0446 compatible = "renesas,i2c-r8a77980",
0447 "renesas,rcar-gen3-i2c";
0448 reg = <0 0xe6508000 0 0x40>;
0449 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0450 clocks = <&cpg CPG_MOD 930>;
0451 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0452 resets = <&cpg 930>;
0453 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0454 <&dmac2 0x93>, <&dmac2 0x92>;
0455 dma-names = "tx", "rx", "tx", "rx";
0456 i2c-scl-internal-delay-ns = <6>;
0457 #address-cells = <1>;
0458 #size-cells = <0>;
0459 status = "disabled";
0460 };
0461
0462 i2c2: i2c@e6510000 {
0463 compatible = "renesas,i2c-r8a77980",
0464 "renesas,rcar-gen3-i2c";
0465 reg = <0 0xe6510000 0 0x40>;
0466 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0467 clocks = <&cpg CPG_MOD 929>;
0468 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0469 resets = <&cpg 929>;
0470 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0471 <&dmac2 0x95>, <&dmac2 0x94>;
0472 dma-names = "tx", "rx", "tx", "rx";
0473 i2c-scl-internal-delay-ns = <6>;
0474 #address-cells = <1>;
0475 #size-cells = <0>;
0476 status = "disabled";
0477 };
0478
0479 i2c3: i2c@e66d0000 {
0480 compatible = "renesas,i2c-r8a77980",
0481 "renesas,rcar-gen3-i2c";
0482 reg = <0 0xe66d0000 0 0x40>;
0483 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0484 clocks = <&cpg CPG_MOD 928>;
0485 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0486 resets = <&cpg 928>;
0487 i2c-scl-internal-delay-ns = <6>;
0488 #address-cells = <1>;
0489 #size-cells = <0>;
0490 status = "disabled";
0491 };
0492
0493 i2c4: i2c@e66d8000 {
0494 compatible = "renesas,i2c-r8a77980",
0495 "renesas,rcar-gen3-i2c";
0496 reg = <0 0xe66d8000 0 0x40>;
0497 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0498 clocks = <&cpg CPG_MOD 927>;
0499 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0500 resets = <&cpg 927>;
0501 i2c-scl-internal-delay-ns = <6>;
0502 #address-cells = <1>;
0503 #size-cells = <0>;
0504 status = "disabled";
0505 };
0506
0507 i2c5: i2c@e66e0000 {
0508 compatible = "renesas,i2c-r8a77980",
0509 "renesas,rcar-gen3-i2c";
0510 reg = <0 0xe66e0000 0 0x40>;
0511 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0512 clocks = <&cpg CPG_MOD 919>;
0513 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0514 resets = <&cpg 919>;
0515 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
0516 <&dmac2 0x9b>, <&dmac2 0x9a>;
0517 dma-names = "tx", "rx", "tx", "rx";
0518 i2c-scl-internal-delay-ns = <6>;
0519 #address-cells = <1>;
0520 #size-cells = <0>;
0521 status = "disabled";
0522 };
0523
0524 hscif0: serial@e6540000 {
0525 compatible = "renesas,hscif-r8a77980",
0526 "renesas,rcar-gen3-hscif",
0527 "renesas,hscif";
0528 reg = <0 0xe6540000 0 0x60>;
0529 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0530 clocks = <&cpg CPG_MOD 520>,
0531 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0532 <&scif_clk>;
0533 clock-names = "fck", "brg_int", "scif_clk";
0534 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0535 <&dmac2 0x31>, <&dmac2 0x30>;
0536 dma-names = "tx", "rx", "tx", "rx";
0537 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0538 resets = <&cpg 520>;
0539 status = "disabled";
0540 };
0541
0542 hscif1: serial@e6550000 {
0543 compatible = "renesas,hscif-r8a77980",
0544 "renesas,rcar-gen3-hscif",
0545 "renesas,hscif";
0546 reg = <0 0xe6550000 0 0x60>;
0547 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0548 clocks = <&cpg CPG_MOD 519>,
0549 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0550 <&scif_clk>;
0551 clock-names = "fck", "brg_int", "scif_clk";
0552 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0553 <&dmac2 0x33>, <&dmac2 0x32>;
0554 dma-names = "tx", "rx", "tx", "rx";
0555 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0556 resets = <&cpg 519>;
0557 status = "disabled";
0558 };
0559
0560 hscif2: serial@e6560000 {
0561 compatible = "renesas,hscif-r8a77980",
0562 "renesas,rcar-gen3-hscif",
0563 "renesas,hscif";
0564 reg = <0 0xe6560000 0 0x60>;
0565 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0566 clocks = <&cpg CPG_MOD 518>,
0567 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0568 <&scif_clk>;
0569 clock-names = "fck", "brg_int", "scif_clk";
0570 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0571 <&dmac2 0x35>, <&dmac2 0x34>;
0572 dma-names = "tx", "rx", "tx", "rx";
0573 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0574 resets = <&cpg 518>;
0575 status = "disabled";
0576 };
0577
0578 hscif3: serial@e66a0000 {
0579 compatible = "renesas,hscif-r8a77980",
0580 "renesas,rcar-gen3-hscif",
0581 "renesas,hscif";
0582 reg = <0 0xe66a0000 0 0x60>;
0583 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0584 clocks = <&cpg CPG_MOD 517>,
0585 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0586 <&scif_clk>;
0587 clock-names = "fck", "brg_int", "scif_clk";
0588 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
0589 <&dmac2 0x37>, <&dmac2 0x36>;
0590 dma-names = "tx", "rx", "tx", "rx";
0591 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0592 resets = <&cpg 517>;
0593 status = "disabled";
0594 };
0595
0596 pcie_phy: pcie-phy@e65d0000 {
0597 compatible = "renesas,r8a77980-pcie-phy";
0598 reg = <0 0xe65d0000 0 0x8000>;
0599 #phy-cells = <0>;
0600 clocks = <&cpg CPG_MOD 319>;
0601 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0602 resets = <&cpg 319>;
0603 status = "disabled";
0604 };
0605
0606 canfd: can@e66c0000 {
0607 compatible = "renesas,r8a77980-canfd",
0608 "renesas,rcar-gen3-canfd";
0609 reg = <0 0xe66c0000 0 0x8000>;
0610 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0611 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0612 interrupt-names = "ch_int", "g_int";
0613 clocks = <&cpg CPG_MOD 914>,
0614 <&cpg CPG_CORE R8A77980_CLK_CANFD>,
0615 <&can_clk>;
0616 clock-names = "fck", "canfd", "can_clk";
0617 assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
0618 assigned-clock-rates = <40000000>;
0619 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0620 resets = <&cpg 914>;
0621 status = "disabled";
0622
0623 channel0 {
0624 status = "disabled";
0625 };
0626
0627 channel1 {
0628 status = "disabled";
0629 };
0630 };
0631
0632 avb: ethernet@e6800000 {
0633 compatible = "renesas,etheravb-r8a77980",
0634 "renesas,etheravb-rcar-gen3";
0635 reg = <0 0xe6800000 0 0x800>;
0636 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0637 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0638 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0639 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0640 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0641 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0642 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
0643 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0644 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0645 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0646 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0647 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0648 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0649 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0650 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0651 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0652 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0653 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0654 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0655 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0656 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0657 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
0658 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
0659 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
0660 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0661 interrupt-names = "ch0", "ch1", "ch2", "ch3",
0662 "ch4", "ch5", "ch6", "ch7",
0663 "ch8", "ch9", "ch10", "ch11",
0664 "ch12", "ch13", "ch14", "ch15",
0665 "ch16", "ch17", "ch18", "ch19",
0666 "ch20", "ch21", "ch22", "ch23",
0667 "ch24";
0668 clocks = <&cpg CPG_MOD 812>;
0669 clock-names = "fck";
0670 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0671 resets = <&cpg 812>;
0672 phy-mode = "rgmii";
0673 rx-internal-delay-ps = <0>;
0674 tx-internal-delay-ps = <2000>;
0675 iommus = <&ipmmu_ds1 33>;
0676 #address-cells = <1>;
0677 #size-cells = <0>;
0678 status = "disabled";
0679 };
0680
0681 pwm0: pwm@e6e30000 {
0682 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
0683 reg = <0 0xe6e30000 0 0x10>;
0684 #pwm-cells = <2>;
0685 clocks = <&cpg CPG_MOD 523>;
0686 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0687 resets = <&cpg 523>;
0688 status = "disabled";
0689 };
0690
0691 pwm1: pwm@e6e31000 {
0692 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
0693 reg = <0 0xe6e31000 0 0x10>;
0694 #pwm-cells = <2>;
0695 clocks = <&cpg CPG_MOD 523>;
0696 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0697 resets = <&cpg 523>;
0698 status = "disabled";
0699 };
0700
0701 pwm2: pwm@e6e32000 {
0702 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
0703 reg = <0 0xe6e32000 0 0x10>;
0704 #pwm-cells = <2>;
0705 clocks = <&cpg CPG_MOD 523>;
0706 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0707 resets = <&cpg 523>;
0708 status = "disabled";
0709 };
0710
0711 pwm3: pwm@e6e33000 {
0712 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
0713 reg = <0 0xe6e33000 0 0x10>;
0714 #pwm-cells = <2>;
0715 clocks = <&cpg CPG_MOD 523>;
0716 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0717 resets = <&cpg 523>;
0718 status = "disabled";
0719 };
0720
0721 pwm4: pwm@e6e34000 {
0722 compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
0723 reg = <0 0xe6e34000 0 0x10>;
0724 #pwm-cells = <2>;
0725 clocks = <&cpg CPG_MOD 523>;
0726 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0727 resets = <&cpg 523>;
0728 status = "disabled";
0729 };
0730
0731 scif0: serial@e6e60000 {
0732 compatible = "renesas,scif-r8a77980",
0733 "renesas,rcar-gen3-scif",
0734 "renesas,scif";
0735 reg = <0 0xe6e60000 0 0x40>;
0736 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0737 clocks = <&cpg CPG_MOD 207>,
0738 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0739 <&scif_clk>;
0740 clock-names = "fck", "brg_int", "scif_clk";
0741 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
0742 <&dmac2 0x51>, <&dmac2 0x50>;
0743 dma-names = "tx", "rx", "tx", "rx";
0744 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0745 resets = <&cpg 207>;
0746 status = "disabled";
0747 };
0748
0749 scif1: serial@e6e68000 {
0750 compatible = "renesas,scif-r8a77980",
0751 "renesas,rcar-gen3-scif",
0752 "renesas,scif";
0753 reg = <0 0xe6e68000 0 0x40>;
0754 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0755 clocks = <&cpg CPG_MOD 206>,
0756 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0757 <&scif_clk>;
0758 clock-names = "fck", "brg_int", "scif_clk";
0759 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
0760 <&dmac2 0x53>, <&dmac2 0x52>;
0761 dma-names = "tx", "rx", "tx", "rx";
0762 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0763 resets = <&cpg 206>;
0764 status = "disabled";
0765 };
0766
0767 scif3: serial@e6c50000 {
0768 compatible = "renesas,scif-r8a77980",
0769 "renesas,rcar-gen3-scif",
0770 "renesas,scif";
0771 reg = <0 0xe6c50000 0 0x40>;
0772 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0773 clocks = <&cpg CPG_MOD 204>,
0774 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0775 <&scif_clk>;
0776 clock-names = "fck", "brg_int", "scif_clk";
0777 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
0778 <&dmac2 0x57>, <&dmac2 0x56>;
0779 dma-names = "tx", "rx", "tx", "rx";
0780 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0781 resets = <&cpg 204>;
0782 status = "disabled";
0783 };
0784
0785 scif4: serial@e6c40000 {
0786 compatible = "renesas,scif-r8a77980",
0787 "renesas,rcar-gen3-scif",
0788 "renesas,scif";
0789 reg = <0 0xe6c40000 0 0x40>;
0790 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
0791 clocks = <&cpg CPG_MOD 203>,
0792 <&cpg CPG_CORE R8A77980_CLK_S3D1>,
0793 <&scif_clk>;
0794 clock-names = "fck", "brg_int", "scif_clk";
0795 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
0796 <&dmac2 0x59>, <&dmac2 0x58>;
0797 dma-names = "tx", "rx", "tx", "rx";
0798 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0799 resets = <&cpg 203>;
0800 status = "disabled";
0801 };
0802
0803 tpu: pwm@e6e80000 {
0804 compatible = "renesas,tpu-r8a77980", "renesas,tpu";
0805 reg = <0 0xe6e80000 0 0x148>;
0806 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
0807 clocks = <&cpg CPG_MOD 304>;
0808 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0809 resets = <&cpg 304>;
0810 #pwm-cells = <3>;
0811 status = "disabled";
0812 };
0813
0814 msiof0: spi@e6e90000 {
0815 compatible = "renesas,msiof-r8a77980",
0816 "renesas,rcar-gen3-msiof";
0817 reg = <0 0xe6e90000 0 0x64>;
0818 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
0819 clocks = <&cpg CPG_MOD 211>;
0820 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0821 resets = <&cpg 211>;
0822 #address-cells = <1>;
0823 #size-cells = <0>;
0824 status = "disabled";
0825 };
0826
0827 msiof1: spi@e6ea0000 {
0828 compatible = "renesas,msiof-r8a77980",
0829 "renesas,rcar-gen3-msiof";
0830 reg = <0 0xe6ea0000 0 0x0064>;
0831 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
0832 clocks = <&cpg CPG_MOD 210>;
0833 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0834 resets = <&cpg 210>;
0835 #address-cells = <1>;
0836 #size-cells = <0>;
0837 status = "disabled";
0838 };
0839
0840 msiof2: spi@e6c00000 {
0841 compatible = "renesas,msiof-r8a77980",
0842 "renesas,rcar-gen3-msiof";
0843 reg = <0 0xe6c00000 0 0x0064>;
0844 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
0845 clocks = <&cpg CPG_MOD 209>;
0846 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0847 resets = <&cpg 209>;
0848 #address-cells = <1>;
0849 #size-cells = <0>;
0850 status = "disabled";
0851 };
0852
0853 msiof3: spi@e6c10000 {
0854 compatible = "renesas,msiof-r8a77980",
0855 "renesas,rcar-gen3-msiof";
0856 reg = <0 0xe6c10000 0 0x0064>;
0857 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
0858 clocks = <&cpg CPG_MOD 208>;
0859 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0860 resets = <&cpg 208>;
0861 #address-cells = <1>;
0862 #size-cells = <0>;
0863 status = "disabled";
0864 };
0865
0866 vin0: video@e6ef0000 {
0867 compatible = "renesas,vin-r8a77980";
0868 reg = <0 0xe6ef0000 0 0x1000>;
0869 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
0870 clocks = <&cpg CPG_MOD 811>;
0871 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0872 resets = <&cpg 811>;
0873 renesas,id = <0>;
0874 status = "disabled";
0875
0876 ports {
0877 #address-cells = <1>;
0878 #size-cells = <0>;
0879
0880 port@1 {
0881 #address-cells = <1>;
0882 #size-cells = <0>;
0883
0884 reg = <1>;
0885
0886 vin0csi40: endpoint@2 {
0887 reg = <2>;
0888 remote-endpoint = <&csi40vin0>;
0889 };
0890 };
0891 };
0892 };
0893
0894 vin1: video@e6ef1000 {
0895 compatible = "renesas,vin-r8a77980";
0896 reg = <0 0xe6ef1000 0 0x1000>;
0897 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
0898 clocks = <&cpg CPG_MOD 810>;
0899 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0900 status = "disabled";
0901 renesas,id = <1>;
0902 resets = <&cpg 810>;
0903
0904 ports {
0905 #address-cells = <1>;
0906 #size-cells = <0>;
0907
0908 port@1 {
0909 #address-cells = <1>;
0910 #size-cells = <0>;
0911
0912 reg = <1>;
0913
0914 vin1csi40: endpoint@2 {
0915 reg = <2>;
0916 remote-endpoint = <&csi40vin1>;
0917 };
0918 };
0919 };
0920 };
0921
0922 vin2: video@e6ef2000 {
0923 compatible = "renesas,vin-r8a77980";
0924 reg = <0 0xe6ef2000 0 0x1000>;
0925 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
0926 clocks = <&cpg CPG_MOD 809>;
0927 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0928 resets = <&cpg 809>;
0929 renesas,id = <2>;
0930 status = "disabled";
0931
0932 ports {
0933 #address-cells = <1>;
0934 #size-cells = <0>;
0935
0936 port@1 {
0937 #address-cells = <1>;
0938 #size-cells = <0>;
0939
0940 reg = <1>;
0941
0942 vin2csi40: endpoint@2 {
0943 reg = <2>;
0944 remote-endpoint = <&csi40vin2>;
0945 };
0946 };
0947 };
0948 };
0949
0950 vin3: video@e6ef3000 {
0951 compatible = "renesas,vin-r8a77980";
0952 reg = <0 0xe6ef3000 0 0x1000>;
0953 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
0954 clocks = <&cpg CPG_MOD 808>;
0955 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0956 resets = <&cpg 808>;
0957 renesas,id = <3>;
0958 status = "disabled";
0959
0960 ports {
0961 #address-cells = <1>;
0962 #size-cells = <0>;
0963
0964 port@1 {
0965 #address-cells = <1>;
0966 #size-cells = <0>;
0967
0968 reg = <1>;
0969
0970 vin3csi40: endpoint@2 {
0971 reg = <2>;
0972 remote-endpoint = <&csi40vin3>;
0973 };
0974 };
0975 };
0976 };
0977
0978 vin4: video@e6ef4000 {
0979 compatible = "renesas,vin-r8a77980";
0980 reg = <0 0xe6ef4000 0 0x1000>;
0981 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
0982 clocks = <&cpg CPG_MOD 807>;
0983 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
0984 resets = <&cpg 807>;
0985 renesas,id = <4>;
0986 status = "disabled";
0987
0988 ports {
0989 #address-cells = <1>;
0990 #size-cells = <0>;
0991
0992 port@1 {
0993 #address-cells = <1>;
0994 #size-cells = <0>;
0995
0996 reg = <1>;
0997
0998 vin4csi41: endpoint@3 {
0999 reg = <3>;
1000 remote-endpoint = <&csi41vin4>;
1001 };
1002 };
1003 };
1004 };
1005
1006 vin5: video@e6ef5000 {
1007 compatible = "renesas,vin-r8a77980";
1008 reg = <0 0xe6ef5000 0 0x1000>;
1009 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1010 clocks = <&cpg CPG_MOD 806>;
1011 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1012 resets = <&cpg 806>;
1013 renesas,id = <5>;
1014 status = "disabled";
1015
1016 ports {
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1019
1020 port@1 {
1021 #address-cells = <1>;
1022 #size-cells = <0>;
1023
1024 reg = <1>;
1025
1026 vin5csi41: endpoint@3 {
1027 reg = <3>;
1028 remote-endpoint = <&csi41vin5>;
1029 };
1030 };
1031 };
1032 };
1033
1034 vin6: video@e6ef6000 {
1035 compatible = "renesas,vin-r8a77980";
1036 reg = <0 0xe6ef6000 0 0x1000>;
1037 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1038 clocks = <&cpg CPG_MOD 805>;
1039 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1040 resets = <&cpg 805>;
1041 renesas,id = <6>;
1042 status = "disabled";
1043
1044 ports {
1045 #address-cells = <1>;
1046 #size-cells = <0>;
1047
1048 port@1 {
1049 #address-cells = <1>;
1050 #size-cells = <0>;
1051
1052 reg = <1>;
1053
1054 vin6csi41: endpoint@3 {
1055 reg = <3>;
1056 remote-endpoint = <&csi41vin6>;
1057 };
1058 };
1059 };
1060 };
1061
1062 vin7: video@e6ef7000 {
1063 compatible = "renesas,vin-r8a77980";
1064 reg = <0 0xe6ef7000 0 0x1000>;
1065 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1066 clocks = <&cpg CPG_MOD 804>;
1067 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1068 resets = <&cpg 804>;
1069 renesas,id = <7>;
1070 status = "disabled";
1071
1072 ports {
1073 #address-cells = <1>;
1074 #size-cells = <0>;
1075
1076 port@1 {
1077 #address-cells = <1>;
1078 #size-cells = <0>;
1079
1080 reg = <1>;
1081
1082 vin7csi41: endpoint@3 {
1083 reg = <3>;
1084 remote-endpoint = <&csi41vin7>;
1085 };
1086 };
1087 };
1088 };
1089
1090 vin8: video@e6ef8000 {
1091 compatible = "renesas,vin-r8a77980";
1092 reg = <0 0xe6ef8000 0 0x1000>;
1093 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&cpg CPG_MOD 628>;
1095 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1096 resets = <&cpg 628>;
1097 renesas,id = <8>;
1098 status = "disabled";
1099 };
1100
1101 vin9: video@e6ef9000 {
1102 compatible = "renesas,vin-r8a77980";
1103 reg = <0 0xe6ef9000 0 0x1000>;
1104 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1105 clocks = <&cpg CPG_MOD 627>;
1106 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1107 resets = <&cpg 627>;
1108 renesas,id = <9>;
1109 status = "disabled";
1110 };
1111
1112 vin10: video@e6efa000 {
1113 compatible = "renesas,vin-r8a77980";
1114 reg = <0 0xe6efa000 0 0x1000>;
1115 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1116 clocks = <&cpg CPG_MOD 625>;
1117 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1118 resets = <&cpg 625>;
1119 renesas,id = <10>;
1120 status = "disabled";
1121 };
1122
1123 vin11: video@e6efb000 {
1124 compatible = "renesas,vin-r8a77980";
1125 reg = <0 0xe6efb000 0 0x1000>;
1126 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1127 clocks = <&cpg CPG_MOD 618>;
1128 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1129 resets = <&cpg 618>;
1130 renesas,id = <11>;
1131 status = "disabled";
1132 };
1133
1134 vin12: video@e6efc000 {
1135 compatible = "renesas,vin-r8a77980";
1136 reg = <0 0xe6efc000 0 0x1000>;
1137 interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1138 clocks = <&cpg CPG_MOD 612>;
1139 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1140 resets = <&cpg 612>;
1141 renesas,id = <12>;
1142 status = "disabled";
1143 };
1144
1145 vin13: video@e6efd000 {
1146 compatible = "renesas,vin-r8a77980";
1147 reg = <0 0xe6efd000 0 0x1000>;
1148 interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1149 clocks = <&cpg CPG_MOD 608>;
1150 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1151 resets = <&cpg 608>;
1152 renesas,id = <13>;
1153 status = "disabled";
1154 };
1155
1156 vin14: video@e6efe000 {
1157 compatible = "renesas,vin-r8a77980";
1158 reg = <0 0xe6efe000 0 0x1000>;
1159 interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1160 clocks = <&cpg CPG_MOD 605>;
1161 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1162 resets = <&cpg 605>;
1163 renesas,id = <14>;
1164 status = "disabled";
1165 };
1166
1167 vin15: video@e6eff000 {
1168 compatible = "renesas,vin-r8a77980";
1169 reg = <0 0xe6eff000 0 0x1000>;
1170 interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1171 clocks = <&cpg CPG_MOD 604>;
1172 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1173 resets = <&cpg 604>;
1174 renesas,id = <15>;
1175 status = "disabled";
1176 };
1177
1178 dmac1: dma-controller@e7300000 {
1179 compatible = "renesas,dmac-r8a77980",
1180 "renesas,rcar-dmac";
1181 reg = <0 0xe7300000 0 0x10000>;
1182 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1183 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1184 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1185 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1186 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1187 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1188 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1189 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1190 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1191 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1192 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1193 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1194 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1195 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1196 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1197 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1198 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1199 interrupt-names = "error",
1200 "ch0", "ch1", "ch2", "ch3",
1201 "ch4", "ch5", "ch6", "ch7",
1202 "ch8", "ch9", "ch10", "ch11",
1203 "ch12", "ch13", "ch14", "ch15";
1204 clocks = <&cpg CPG_MOD 218>;
1205 clock-names = "fck";
1206 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1207 resets = <&cpg 218>;
1208 #dma-cells = <1>;
1209 dma-channels = <16>;
1210 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1211 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1212 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1213 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1214 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1215 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1216 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1217 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1218 };
1219
1220 dmac2: dma-controller@e7310000 {
1221 compatible = "renesas,dmac-r8a77980",
1222 "renesas,rcar-dmac";
1223 reg = <0 0xe7310000 0 0x10000>;
1224 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1225 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1226 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1227 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1228 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1229 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1230 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1231 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1232 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1233 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1234 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1235 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1236 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1237 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1238 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1239 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1240 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1241 interrupt-names = "error",
1242 "ch0", "ch1", "ch2", "ch3",
1243 "ch4", "ch5", "ch6", "ch7",
1244 "ch8", "ch9", "ch10", "ch11",
1245 "ch12", "ch13", "ch14", "ch15";
1246 clocks = <&cpg CPG_MOD 217>;
1247 clock-names = "fck";
1248 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1249 resets = <&cpg 217>;
1250 #dma-cells = <1>;
1251 dma-channels = <16>;
1252 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1253 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1254 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1255 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1256 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1257 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1258 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1259 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1260 };
1261
1262 gether: ethernet@e7400000 {
1263 compatible = "renesas,gether-r8a77980";
1264 reg = <0 0xe7400000 0 0x1000>;
1265 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 813>;
1267 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1268 resets = <&cpg 813>;
1269 #address-cells = <1>;
1270 #size-cells = <0>;
1271 status = "disabled";
1272 };
1273
1274 ipmmu_ds1: iommu@e7740000 {
1275 compatible = "renesas,ipmmu-r8a77980";
1276 reg = <0 0xe7740000 0 0x1000>;
1277 renesas,ipmmu-main = <&ipmmu_mm 0>;
1278 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1279 #iommu-cells = <1>;
1280 };
1281
1282 ipmmu_ir: iommu@ff8b0000 {
1283 compatible = "renesas,ipmmu-r8a77980";
1284 reg = <0 0xff8b0000 0 0x1000>;
1285 renesas,ipmmu-main = <&ipmmu_mm 3>;
1286 power-domains = <&sysc R8A77980_PD_A3IR>;
1287 #iommu-cells = <1>;
1288 };
1289
1290 ipmmu_mm: iommu@e67b0000 {
1291 compatible = "renesas,ipmmu-r8a77980";
1292 reg = <0 0xe67b0000 0 0x1000>;
1293 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1294 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1295 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1296 #iommu-cells = <1>;
1297 };
1298
1299 ipmmu_rt: iommu@ffc80000 {
1300 compatible = "renesas,ipmmu-r8a77980";
1301 reg = <0 0xffc80000 0 0x1000>;
1302 renesas,ipmmu-main = <&ipmmu_mm 10>;
1303 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1304 #iommu-cells = <1>;
1305 };
1306
1307 ipmmu_vc0: iommu@fe990000 {
1308 compatible = "renesas,ipmmu-r8a77980";
1309 reg = <0 0xfe990000 0 0x1000>;
1310 renesas,ipmmu-main = <&ipmmu_mm 12>;
1311 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1312 #iommu-cells = <1>;
1313 };
1314
1315 ipmmu_vi0: iommu@febd0000 {
1316 compatible = "renesas,ipmmu-r8a77980";
1317 reg = <0 0xfebd0000 0 0x1000>;
1318 renesas,ipmmu-main = <&ipmmu_mm 14>;
1319 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1320 #iommu-cells = <1>;
1321 };
1322
1323 ipmmu_vip0: iommu@e7b00000 {
1324 compatible = "renesas,ipmmu-r8a77980";
1325 reg = <0 0xe7b00000 0 0x1000>;
1326 renesas,ipmmu-main = <&ipmmu_mm 4>;
1327 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1328 #iommu-cells = <1>;
1329 };
1330
1331 ipmmu_vip1: iommu@e7960000 {
1332 compatible = "renesas,ipmmu-r8a77980";
1333 reg = <0 0xe7960000 0 0x1000>;
1334 renesas,ipmmu-main = <&ipmmu_mm 11>;
1335 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1336 #iommu-cells = <1>;
1337 };
1338
1339 mmc0: mmc@ee140000 {
1340 compatible = "renesas,sdhi-r8a77980",
1341 "renesas,rcar-gen3-sdhi";
1342 reg = <0 0xee140000 0 0x2000>;
1343 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1344 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77980_CLK_SD0H>;
1345 clock-names = "core", "clkh";
1346 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1347 resets = <&cpg 314>;
1348 max-frequency = <200000000>;
1349 iommus = <&ipmmu_ds1 32>;
1350 status = "disabled";
1351 };
1352
1353 rpc: spi@ee200000 {
1354 compatible = "renesas,r8a77980-rpc-if",
1355 "renesas,rcar-gen3-rpc-if";
1356 reg = <0 0xee200000 0 0x200>,
1357 <0 0x08000000 0 0x4000000>,
1358 <0 0xee208000 0 0x100>;
1359 reg-names = "regs", "dirmap", "wbuf";
1360 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1361 clocks = <&cpg CPG_MOD 917>;
1362 clock-names = "rpc";
1363 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1364 resets = <&cpg 917>;
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1367 status = "disabled";
1368 };
1369
1370 gic: interrupt-controller@f1010000 {
1371 compatible = "arm,gic-400";
1372 #interrupt-cells = <3>;
1373 #address-cells = <0>;
1374 interrupt-controller;
1375 reg = <0x0 0xf1010000 0 0x1000>,
1376 <0x0 0xf1020000 0 0x20000>,
1377 <0x0 0xf1040000 0 0x20000>,
1378 <0x0 0xf1060000 0 0x20000>;
1379 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1380 IRQ_TYPE_LEVEL_HIGH)>;
1381 clocks = <&cpg CPG_MOD 408>;
1382 clock-names = "clk";
1383 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1384 resets = <&cpg 408>;
1385 };
1386
1387 pciec: pcie@fe000000 {
1388 compatible = "renesas,pcie-r8a77980",
1389 "renesas,pcie-rcar-gen3";
1390 reg = <0 0xfe000000 0 0x80000>;
1391 #address-cells = <3>;
1392 #size-cells = <2>;
1393 bus-range = <0x00 0xff>;
1394 device_type = "pci";
1395 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1396 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1397 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1398 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1399 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1400 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1401 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1402 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1403 #interrupt-cells = <1>;
1404 interrupt-map-mask = <0 0 0 0>;
1405 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1406 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1407 clock-names = "pcie", "pcie_bus";
1408 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1409 resets = <&cpg 319>;
1410 phys = <&pcie_phy>;
1411 phy-names = "pcie";
1412 status = "disabled";
1413 };
1414
1415 vspd0: vsp@fea20000 {
1416 compatible = "renesas,vsp2";
1417 reg = <0 0xfea20000 0 0x5000>;
1418 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1419 clocks = <&cpg CPG_MOD 623>;
1420 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1421 resets = <&cpg 623>;
1422 renesas,fcp = <&fcpvd0>;
1423 };
1424
1425 fcpvd0: fcp@fea27000 {
1426 compatible = "renesas,fcpv";
1427 reg = <0 0xfea27000 0 0x200>;
1428 clocks = <&cpg CPG_MOD 603>;
1429 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1430 resets = <&cpg 603>;
1431 };
1432
1433 csi40: csi2@feaa0000 {
1434 compatible = "renesas,r8a77980-csi2";
1435 reg = <0 0xfeaa0000 0 0x10000>;
1436 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1437 clocks = <&cpg CPG_MOD 716>;
1438 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1439 resets = <&cpg 716>;
1440 status = "disabled";
1441
1442 ports {
1443 #address-cells = <1>;
1444 #size-cells = <0>;
1445
1446 port@0 {
1447 reg = <0>;
1448 };
1449
1450 port@1 {
1451 #address-cells = <1>;
1452 #size-cells = <0>;
1453
1454 reg = <1>;
1455
1456 csi40vin0: endpoint@0 {
1457 reg = <0>;
1458 remote-endpoint = <&vin0csi40>;
1459 };
1460 csi40vin1: endpoint@1 {
1461 reg = <1>;
1462 remote-endpoint = <&vin1csi40>;
1463 };
1464 csi40vin2: endpoint@2 {
1465 reg = <2>;
1466 remote-endpoint = <&vin2csi40>;
1467 };
1468 csi40vin3: endpoint@3 {
1469 reg = <3>;
1470 remote-endpoint = <&vin3csi40>;
1471 };
1472 };
1473 };
1474 };
1475
1476 csi41: csi2@feab0000 {
1477 compatible = "renesas,r8a77980-csi2";
1478 reg = <0 0xfeab0000 0 0x10000>;
1479 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1480 clocks = <&cpg CPG_MOD 715>;
1481 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1482 resets = <&cpg 715>;
1483 status = "disabled";
1484
1485 ports {
1486 #address-cells = <1>;
1487 #size-cells = <0>;
1488
1489 port@0 {
1490 reg = <0>;
1491 };
1492
1493 port@1 {
1494 #address-cells = <1>;
1495 #size-cells = <0>;
1496
1497 reg = <1>;
1498
1499 csi41vin4: endpoint@0 {
1500 reg = <0>;
1501 remote-endpoint = <&vin4csi41>;
1502 };
1503 csi41vin5: endpoint@1 {
1504 reg = <1>;
1505 remote-endpoint = <&vin5csi41>;
1506 };
1507 csi41vin6: endpoint@2 {
1508 reg = <2>;
1509 remote-endpoint = <&vin6csi41>;
1510 };
1511 csi41vin7: endpoint@3 {
1512 reg = <3>;
1513 remote-endpoint = <&vin7csi41>;
1514 };
1515 };
1516 };
1517 };
1518
1519 du: display@feb00000 {
1520 compatible = "renesas,du-r8a77980";
1521 reg = <0 0xfeb00000 0 0x80000>;
1522 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1523 clocks = <&cpg CPG_MOD 724>;
1524 clock-names = "du.0";
1525 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1526 resets = <&cpg 724>;
1527 reset-names = "du.0";
1528 renesas,vsps = <&vspd0 0>;
1529
1530 status = "disabled";
1531
1532 ports {
1533 #address-cells = <1>;
1534 #size-cells = <0>;
1535
1536 port@0 {
1537 reg = <0>;
1538 };
1539
1540 port@1 {
1541 reg = <1>;
1542 du_out_lvds0: endpoint {
1543 remote-endpoint = <&lvds0_in>;
1544 };
1545 };
1546 };
1547 };
1548
1549 lvds0: lvds-encoder@feb90000 {
1550 compatible = "renesas,r8a77980-lvds";
1551 reg = <0 0xfeb90000 0 0x14>;
1552 clocks = <&cpg CPG_MOD 727>;
1553 power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1554 resets = <&cpg 727>;
1555 status = "disabled";
1556
1557 ports {
1558 #address-cells = <1>;
1559 #size-cells = <0>;
1560
1561 port@0 {
1562 reg = <0>;
1563 lvds0_in: endpoint {
1564 remote-endpoint =
1565 <&du_out_lvds0>;
1566 };
1567 };
1568
1569 port@1 {
1570 reg = <1>;
1571 };
1572 };
1573 };
1574
1575 prr: chipid@fff00044 {
1576 compatible = "renesas,prr";
1577 reg = <0 0xfff00044 0 4>;
1578 };
1579 };
1580
1581 thermal-zones {
1582 sensor1_thermal: sensor1-thermal {
1583 polling-delay-passive = <250>;
1584 polling-delay = <1000>;
1585 thermal-sensors = <&tsc 0>;
1586
1587 trips {
1588 sensor1-passive {
1589 temperature = <95000>;
1590 hysteresis = <1000>;
1591 type = "passive";
1592 };
1593 sensor1-critical {
1594 temperature = <120000>;
1595 hysteresis = <1000>;
1596 type = "critical";
1597 };
1598 };
1599 };
1600
1601 sensor2_thermal: sensor2-thermal {
1602 polling-delay-passive = <250>;
1603 polling-delay = <1000>;
1604 thermal-sensors = <&tsc 1>;
1605
1606 trips {
1607 sensor2-passive {
1608 temperature = <95000>;
1609 hysteresis = <1000>;
1610 type = "passive";
1611 };
1612 sensor2-critical {
1613 temperature = <120000>;
1614 hysteresis = <1000>;
1615 type = "critical";
1616 };
1617 };
1618 };
1619 };
1620
1621 timer {
1622 compatible = "arm,armv8-timer";
1623 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1624 IRQ_TYPE_LEVEL_LOW)>,
1625 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1626 IRQ_TYPE_LEVEL_LOW)>,
1627 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1628 IRQ_TYPE_LEVEL_LOW)>,
1629 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1630 IRQ_TYPE_LEVEL_LOW)>;
1631 };
1632 };
