0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car V3M (R8A77970) SoC
0004 *
0005 * Copyright (C) 2016-2017 Renesas Electronics Corp.
0006 * Copyright (C) 2017 Cogent Embedded, Inc.
0007 */
0008
0009 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
0010 #include <dt-bindings/interrupt-controller/arm-gic.h>
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012 #include <dt-bindings/power/r8a77970-sysc.h>
0013
0014 / {
0015 compatible = "renesas,r8a77970";
0016 #address-cells = <2>;
0017 #size-cells = <2>;
0018
0019 aliases {
0020 i2c0 = &i2c0;
0021 i2c1 = &i2c1;
0022 i2c2 = &i2c2;
0023 i2c3 = &i2c3;
0024 i2c4 = &i2c4;
0025 };
0026
0027 /* External CAN clock - to be overridden by boards that provide it */
0028 can_clk: can {
0029 compatible = "fixed-clock";
0030 #clock-cells = <0>;
0031 clock-frequency = <0>;
0032 };
0033
0034 cpus {
0035 #address-cells = <1>;
0036 #size-cells = <0>;
0037
0038 a53_0: cpu@0 {
0039 device_type = "cpu";
0040 compatible = "arm,cortex-a53";
0041 reg = <0>;
0042 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
0043 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
0044 next-level-cache = <&L2_CA53>;
0045 enable-method = "psci";
0046 };
0047
0048 a53_1: cpu@1 {
0049 device_type = "cpu";
0050 compatible = "arm,cortex-a53";
0051 reg = <1>;
0052 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
0053 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
0054 next-level-cache = <&L2_CA53>;
0055 enable-method = "psci";
0056 };
0057
0058 L2_CA53: cache-controller {
0059 compatible = "cache";
0060 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
0061 cache-unified;
0062 cache-level = <2>;
0063 };
0064 };
0065
0066 extal_clk: extal {
0067 compatible = "fixed-clock";
0068 #clock-cells = <0>;
0069 /* This value must be overridden by the board */
0070 clock-frequency = <0>;
0071 };
0072
0073 extalr_clk: extalr {
0074 compatible = "fixed-clock";
0075 #clock-cells = <0>;
0076 /* This value must be overridden by the board */
0077 clock-frequency = <0>;
0078 };
0079
0080 pmu_a53 {
0081 compatible = "arm,cortex-a53-pmu";
0082 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0083 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0084 interrupt-affinity = <&a53_0>, <&a53_1>;
0085 };
0086
0087 psci {
0088 compatible = "arm,psci-1.0", "arm,psci-0.2";
0089 method = "smc";
0090 };
0091
0092 /* External SCIF clock - to be overridden by boards that provide it */
0093 scif_clk: scif {
0094 compatible = "fixed-clock";
0095 #clock-cells = <0>;
0096 clock-frequency = <0>;
0097 };
0098
0099 soc {
0100 compatible = "simple-bus";
0101 interrupt-parent = <&gic>;
0102
0103 #address-cells = <2>;
0104 #size-cells = <2>;
0105 ranges;
0106
0107 rwdt: watchdog@e6020000 {
0108 compatible = "renesas,r8a77970-wdt",
0109 "renesas,rcar-gen3-wdt";
0110 reg = <0 0xe6020000 0 0x0c>;
0111 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0112 clocks = <&cpg CPG_MOD 402>;
0113 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0114 resets = <&cpg 402>;
0115 status = "disabled";
0116 };
0117
0118 gpio0: gpio@e6050000 {
0119 compatible = "renesas,gpio-r8a77970",
0120 "renesas,rcar-gen3-gpio";
0121 reg = <0 0xe6050000 0 0x50>;
0122 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0123 #gpio-cells = <2>;
0124 gpio-controller;
0125 gpio-ranges = <&pfc 0 0 22>;
0126 #interrupt-cells = <2>;
0127 interrupt-controller;
0128 clocks = <&cpg CPG_MOD 912>;
0129 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0130 resets = <&cpg 912>;
0131 };
0132
0133 gpio1: gpio@e6051000 {
0134 compatible = "renesas,gpio-r8a77970",
0135 "renesas,rcar-gen3-gpio";
0136 reg = <0 0xe6051000 0 0x50>;
0137 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0138 #gpio-cells = <2>;
0139 gpio-controller;
0140 gpio-ranges = <&pfc 0 32 28>;
0141 #interrupt-cells = <2>;
0142 interrupt-controller;
0143 clocks = <&cpg CPG_MOD 911>;
0144 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0145 resets = <&cpg 911>;
0146 };
0147
0148 gpio2: gpio@e6052000 {
0149 compatible = "renesas,gpio-r8a77970",
0150 "renesas,rcar-gen3-gpio";
0151 reg = <0 0xe6052000 0 0x50>;
0152 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0153 #gpio-cells = <2>;
0154 gpio-controller;
0155 gpio-ranges = <&pfc 0 64 17>;
0156 #interrupt-cells = <2>;
0157 interrupt-controller;
0158 clocks = <&cpg CPG_MOD 910>;
0159 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0160 resets = <&cpg 910>;
0161 };
0162
0163 gpio3: gpio@e6053000 {
0164 compatible = "renesas,gpio-r8a77970",
0165 "renesas,rcar-gen3-gpio";
0166 reg = <0 0xe6053000 0 0x50>;
0167 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0168 #gpio-cells = <2>;
0169 gpio-controller;
0170 gpio-ranges = <&pfc 0 96 17>;
0171 #interrupt-cells = <2>;
0172 interrupt-controller;
0173 clocks = <&cpg CPG_MOD 909>;
0174 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0175 resets = <&cpg 909>;
0176 };
0177
0178 gpio4: gpio@e6054000 {
0179 compatible = "renesas,gpio-r8a77970",
0180 "renesas,rcar-gen3-gpio";
0181 reg = <0 0xe6054000 0 0x50>;
0182 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0183 #gpio-cells = <2>;
0184 gpio-controller;
0185 gpio-ranges = <&pfc 0 128 6>;
0186 #interrupt-cells = <2>;
0187 interrupt-controller;
0188 clocks = <&cpg CPG_MOD 908>;
0189 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0190 resets = <&cpg 908>;
0191 };
0192
0193 gpio5: gpio@e6055000 {
0194 compatible = "renesas,gpio-r8a77970",
0195 "renesas,rcar-gen3-gpio";
0196 reg = <0 0xe6055000 0 0x50>;
0197 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0198 #gpio-cells = <2>;
0199 gpio-controller;
0200 gpio-ranges = <&pfc 0 160 15>;
0201 #interrupt-cells = <2>;
0202 interrupt-controller;
0203 clocks = <&cpg CPG_MOD 907>;
0204 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0205 resets = <&cpg 907>;
0206 };
0207
0208 pfc: pinctrl@e6060000 {
0209 compatible = "renesas,pfc-r8a77970";
0210 reg = <0 0xe6060000 0 0x504>;
0211 };
0212
0213 cmt0: timer@e60f0000 {
0214 compatible = "renesas,r8a77970-cmt0",
0215 "renesas,rcar-gen3-cmt0";
0216 reg = <0 0xe60f0000 0 0x1004>;
0217 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0218 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0219 clocks = <&cpg CPG_MOD 303>;
0220 clock-names = "fck";
0221 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0222 resets = <&cpg 303>;
0223 status = "disabled";
0224 };
0225
0226 cmt1: timer@e6130000 {
0227 compatible = "renesas,r8a77970-cmt1",
0228 "renesas,rcar-gen3-cmt1";
0229 reg = <0 0xe6130000 0 0x1004>;
0230 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0231 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0232 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0233 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0234 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0235 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0236 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0237 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0238 clocks = <&cpg CPG_MOD 302>;
0239 clock-names = "fck";
0240 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0241 resets = <&cpg 302>;
0242 status = "disabled";
0243 };
0244
0245 cmt2: timer@e6140000 {
0246 compatible = "renesas,r8a77970-cmt1",
0247 "renesas,rcar-gen3-cmt1";
0248 reg = <0 0xe6140000 0 0x1004>;
0249 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
0250 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
0251 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
0252 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
0253 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
0254 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
0255 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
0256 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
0257 clocks = <&cpg CPG_MOD 301>;
0258 clock-names = "fck";
0259 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0260 resets = <&cpg 301>;
0261 status = "disabled";
0262 };
0263
0264 cmt3: timer@e6148000 {
0265 compatible = "renesas,r8a77970-cmt1",
0266 "renesas,rcar-gen3-cmt1";
0267 reg = <0 0xe6148000 0 0x1004>;
0268 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
0269 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
0270 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
0271 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
0272 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
0273 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
0274 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
0275 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
0276 clocks = <&cpg CPG_MOD 300>;
0277 clock-names = "fck";
0278 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0279 resets = <&cpg 300>;
0280 status = "disabled";
0281 };
0282
0283 cpg: clock-controller@e6150000 {
0284 compatible = "renesas,r8a77970-cpg-mssr";
0285 reg = <0 0xe6150000 0 0x1000>;
0286 clocks = <&extal_clk>, <&extalr_clk>;
0287 clock-names = "extal", "extalr";
0288 #clock-cells = <2>;
0289 #power-domain-cells = <0>;
0290 #reset-cells = <1>;
0291 };
0292
0293 rst: reset-controller@e6160000 {
0294 compatible = "renesas,r8a77970-rst";
0295 reg = <0 0xe6160000 0 0x200>;
0296 };
0297
0298 sysc: system-controller@e6180000 {
0299 compatible = "renesas,r8a77970-sysc";
0300 reg = <0 0xe6180000 0 0x440>;
0301 #power-domain-cells = <1>;
0302 };
0303
0304 thermal: thermal@e6190000 {
0305 compatible = "renesas,thermal-r8a77970";
0306 reg = <0 0xe6190000 0 0x10>,
0307 <0 0xe6190100 0 0x120>;
0308 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0309 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0310 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0311 clocks = <&cpg CPG_MOD 522>;
0312 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0313 resets = <&cpg 522>;
0314 #thermal-sensor-cells = <0>;
0315 };
0316
0317 intc_ex: interrupt-controller@e61c0000 {
0318 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
0319 #interrupt-cells = <2>;
0320 interrupt-controller;
0321 reg = <0 0xe61c0000 0 0x200>;
0322 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0323 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0324 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0325 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0326 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0327 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0328 clocks = <&cpg CPG_MOD 407>;
0329 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0330 resets = <&cpg 407>;
0331 };
0332
0333 tmu0: timer@e61e0000 {
0334 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
0335 reg = <0 0xe61e0000 0 0x30>;
0336 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0337 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0338 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0339 clocks = <&cpg CPG_MOD 125>;
0340 clock-names = "fck";
0341 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0342 resets = <&cpg 125>;
0343 status = "disabled";
0344 };
0345
0346 tmu1: timer@e6fc0000 {
0347 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
0348 reg = <0 0xe6fc0000 0 0x30>;
0349 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0350 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0351 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0352 clocks = <&cpg CPG_MOD 124>;
0353 clock-names = "fck";
0354 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0355 resets = <&cpg 124>;
0356 status = "disabled";
0357 };
0358
0359 tmu2: timer@e6fd0000 {
0360 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
0361 reg = <0 0xe6fd0000 0 0x30>;
0362 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0363 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0364 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0365 clocks = <&cpg CPG_MOD 123>;
0366 clock-names = "fck";
0367 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0368 resets = <&cpg 123>;
0369 status = "disabled";
0370 };
0371
0372 tmu3: timer@e6fe0000 {
0373 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
0374 reg = <0 0xe6fe0000 0 0x30>;
0375 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0376 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0377 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0378 clocks = <&cpg CPG_MOD 122>;
0379 clock-names = "fck";
0380 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0381 resets = <&cpg 122>;
0382 status = "disabled";
0383 };
0384
0385 tmu4: timer@ffc00000 {
0386 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
0387 reg = <0 0xffc00000 0 0x30>;
0388 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
0389 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
0390 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
0391 clocks = <&cpg CPG_MOD 121>;
0392 clock-names = "fck";
0393 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0394 resets = <&cpg 121>;
0395 status = "disabled";
0396 };
0397
0398 i2c0: i2c@e6500000 {
0399 compatible = "renesas,i2c-r8a77970",
0400 "renesas,rcar-gen3-i2c";
0401 reg = <0 0xe6500000 0 0x40>;
0402 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0403 clocks = <&cpg CPG_MOD 931>;
0404 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0405 resets = <&cpg 931>;
0406 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0407 <&dmac2 0x91>, <&dmac2 0x90>;
0408 dma-names = "tx", "rx", "tx", "rx";
0409 i2c-scl-internal-delay-ns = <6>;
0410 #address-cells = <1>;
0411 #size-cells = <0>;
0412 status = "disabled";
0413 };
0414
0415 i2c1: i2c@e6508000 {
0416 compatible = "renesas,i2c-r8a77970",
0417 "renesas,rcar-gen3-i2c";
0418 reg = <0 0xe6508000 0 0x40>;
0419 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0420 clocks = <&cpg CPG_MOD 930>;
0421 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0422 resets = <&cpg 930>;
0423 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0424 <&dmac2 0x93>, <&dmac2 0x92>;
0425 dma-names = "tx", "rx", "tx", "rx";
0426 i2c-scl-internal-delay-ns = <6>;
0427 #address-cells = <1>;
0428 #size-cells = <0>;
0429 status = "disabled";
0430 };
0431
0432 i2c2: i2c@e6510000 {
0433 compatible = "renesas,i2c-r8a77970",
0434 "renesas,rcar-gen3-i2c";
0435 reg = <0 0xe6510000 0 0x40>;
0436 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0437 clocks = <&cpg CPG_MOD 929>;
0438 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0439 resets = <&cpg 929>;
0440 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0441 <&dmac2 0x95>, <&dmac2 0x94>;
0442 dma-names = "tx", "rx", "tx", "rx";
0443 i2c-scl-internal-delay-ns = <6>;
0444 #address-cells = <1>;
0445 #size-cells = <0>;
0446 status = "disabled";
0447 };
0448
0449 i2c3: i2c@e66d0000 {
0450 compatible = "renesas,i2c-r8a77970",
0451 "renesas,rcar-gen3-i2c";
0452 reg = <0 0xe66d0000 0 0x40>;
0453 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0454 clocks = <&cpg CPG_MOD 928>;
0455 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0456 resets = <&cpg 928>;
0457 dmas = <&dmac1 0x97>, <&dmac1 0x96>,
0458 <&dmac2 0x97>, <&dmac2 0x96>;
0459 dma-names = "tx", "rx", "tx", "rx";
0460 i2c-scl-internal-delay-ns = <6>;
0461 #address-cells = <1>;
0462 #size-cells = <0>;
0463 status = "disabled";
0464 };
0465
0466 i2c4: i2c@e66d8000 {
0467 compatible = "renesas,i2c-r8a77970",
0468 "renesas,rcar-gen3-i2c";
0469 reg = <0 0xe66d8000 0 0x40>;
0470 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0471 clocks = <&cpg CPG_MOD 927>;
0472 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0473 resets = <&cpg 927>;
0474 dmas = <&dmac1 0x99>, <&dmac1 0x98>,
0475 <&dmac2 0x99>, <&dmac2 0x98>;
0476 dma-names = "tx", "rx", "tx", "rx";
0477 i2c-scl-internal-delay-ns = <6>;
0478 #address-cells = <1>;
0479 #size-cells = <0>;
0480 status = "disabled";
0481 };
0482
0483 hscif0: serial@e6540000 {
0484 compatible = "renesas,hscif-r8a77970",
0485 "renesas,rcar-gen3-hscif",
0486 "renesas,hscif";
0487 reg = <0 0xe6540000 0 96>;
0488 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0489 clocks = <&cpg CPG_MOD 520>,
0490 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0491 <&scif_clk>;
0492 clock-names = "fck", "brg_int", "scif_clk";
0493 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0494 <&dmac2 0x31>, <&dmac2 0x30>;
0495 dma-names = "tx", "rx", "tx", "rx";
0496 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0497 resets = <&cpg 520>;
0498 status = "disabled";
0499 };
0500
0501 hscif1: serial@e6550000 {
0502 compatible = "renesas,hscif-r8a77970",
0503 "renesas,rcar-gen3-hscif",
0504 "renesas,hscif";
0505 reg = <0 0xe6550000 0 96>;
0506 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0507 clocks = <&cpg CPG_MOD 519>,
0508 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0509 <&scif_clk>;
0510 clock-names = "fck", "brg_int", "scif_clk";
0511 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0512 <&dmac2 0x33>, <&dmac2 0x32>;
0513 dma-names = "tx", "rx", "tx", "rx";
0514 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0515 resets = <&cpg 519>;
0516 status = "disabled";
0517 };
0518
0519 hscif2: serial@e6560000 {
0520 compatible = "renesas,hscif-r8a77970",
0521 "renesas,rcar-gen3-hscif",
0522 "renesas,hscif";
0523 reg = <0 0xe6560000 0 96>;
0524 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0525 clocks = <&cpg CPG_MOD 518>,
0526 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0527 <&scif_clk>;
0528 clock-names = "fck", "brg_int", "scif_clk";
0529 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0530 <&dmac2 0x35>, <&dmac2 0x34>;
0531 dma-names = "tx", "rx", "tx", "rx";
0532 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0533 resets = <&cpg 518>;
0534 status = "disabled";
0535 };
0536
0537 hscif3: serial@e66a0000 {
0538 compatible = "renesas,hscif-r8a77970",
0539 "renesas,rcar-gen3-hscif", "renesas,hscif";
0540 reg = <0 0xe66a0000 0 96>;
0541 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0542 clocks = <&cpg CPG_MOD 517>,
0543 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0544 <&scif_clk>;
0545 clock-names = "fck", "brg_int", "scif_clk";
0546 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
0547 <&dmac2 0x37>, <&dmac2 0x36>;
0548 dma-names = "tx", "rx", "tx", "rx";
0549 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0550 resets = <&cpg 517>;
0551 status = "disabled";
0552 };
0553
0554 canfd: can@e66c0000 {
0555 compatible = "renesas,r8a77970-canfd",
0556 "renesas,rcar-gen3-canfd";
0557 reg = <0 0xe66c0000 0 0x8000>;
0558 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0559 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0560 interrupt-names = "ch_int", "g_int";
0561 clocks = <&cpg CPG_MOD 914>,
0562 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
0563 <&can_clk>;
0564 clock-names = "fck", "canfd", "can_clk";
0565 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
0566 assigned-clock-rates = <40000000>;
0567 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0568 resets = <&cpg 914>;
0569 status = "disabled";
0570
0571 channel0 {
0572 status = "disabled";
0573 };
0574
0575 channel1 {
0576 status = "disabled";
0577 };
0578 };
0579
0580 avb: ethernet@e6800000 {
0581 compatible = "renesas,etheravb-r8a77970",
0582 "renesas,etheravb-rcar-gen3";
0583 reg = <0 0xe6800000 0 0x800>;
0584 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0585 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0586 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0587 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0588 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0589 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0590 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
0591 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0592 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0593 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0594 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0595 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0596 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0597 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0598 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0599 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0600 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0601 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0602 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0603 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0604 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0605 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
0606 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
0607 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
0608 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0609 interrupt-names = "ch0", "ch1", "ch2", "ch3",
0610 "ch4", "ch5", "ch6", "ch7",
0611 "ch8", "ch9", "ch10", "ch11",
0612 "ch12", "ch13", "ch14", "ch15",
0613 "ch16", "ch17", "ch18", "ch19",
0614 "ch20", "ch21", "ch22", "ch23",
0615 "ch24";
0616 clocks = <&cpg CPG_MOD 812>;
0617 clock-names = "fck";
0618 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0619 resets = <&cpg 812>;
0620 phy-mode = "rgmii";
0621 rx-internal-delay-ps = <0>;
0622 tx-internal-delay-ps = <0>;
0623 iommus = <&ipmmu_rt 3>;
0624 #address-cells = <1>;
0625 #size-cells = <0>;
0626 status = "disabled";
0627 };
0628
0629 pwm0: pwm@e6e30000 {
0630 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
0631 reg = <0 0xe6e30000 0 8>;
0632 #pwm-cells = <2>;
0633 clocks = <&cpg CPG_MOD 523>;
0634 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0635 resets = <&cpg 523>;
0636 status = "disabled";
0637 };
0638
0639 pwm1: pwm@e6e31000 {
0640 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
0641 reg = <0 0xe6e31000 0 8>;
0642 #pwm-cells = <2>;
0643 clocks = <&cpg CPG_MOD 523>;
0644 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0645 resets = <&cpg 523>;
0646 status = "disabled";
0647 };
0648
0649 pwm2: pwm@e6e32000 {
0650 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
0651 reg = <0 0xe6e32000 0 8>;
0652 #pwm-cells = <2>;
0653 clocks = <&cpg CPG_MOD 523>;
0654 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0655 resets = <&cpg 523>;
0656 status = "disabled";
0657 };
0658
0659 pwm3: pwm@e6e33000 {
0660 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
0661 reg = <0 0xe6e33000 0 8>;
0662 #pwm-cells = <2>;
0663 clocks = <&cpg CPG_MOD 523>;
0664 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0665 resets = <&cpg 523>;
0666 status = "disabled";
0667 };
0668
0669 pwm4: pwm@e6e34000 {
0670 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
0671 reg = <0 0xe6e34000 0 8>;
0672 #pwm-cells = <2>;
0673 clocks = <&cpg CPG_MOD 523>;
0674 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0675 resets = <&cpg 523>;
0676 status = "disabled";
0677 };
0678
0679 scif0: serial@e6e60000 {
0680 compatible = "renesas,scif-r8a77970",
0681 "renesas,rcar-gen3-scif",
0682 "renesas,scif";
0683 reg = <0 0xe6e60000 0 64>;
0684 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
0685 clocks = <&cpg CPG_MOD 207>,
0686 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0687 <&scif_clk>;
0688 clock-names = "fck", "brg_int", "scif_clk";
0689 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
0690 <&dmac2 0x51>, <&dmac2 0x50>;
0691 dma-names = "tx", "rx", "tx", "rx";
0692 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0693 resets = <&cpg 207>;
0694 status = "disabled";
0695 };
0696
0697 scif1: serial@e6e68000 {
0698 compatible = "renesas,scif-r8a77970",
0699 "renesas,rcar-gen3-scif",
0700 "renesas,scif";
0701 reg = <0 0xe6e68000 0 64>;
0702 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
0703 clocks = <&cpg CPG_MOD 206>,
0704 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0705 <&scif_clk>;
0706 clock-names = "fck", "brg_int", "scif_clk";
0707 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
0708 <&dmac2 0x53>, <&dmac2 0x52>;
0709 dma-names = "tx", "rx", "tx", "rx";
0710 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0711 resets = <&cpg 206>;
0712 status = "disabled";
0713 };
0714
0715 scif3: serial@e6c50000 {
0716 compatible = "renesas,scif-r8a77970",
0717 "renesas,rcar-gen3-scif",
0718 "renesas,scif";
0719 reg = <0 0xe6c50000 0 64>;
0720 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0721 clocks = <&cpg CPG_MOD 204>,
0722 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0723 <&scif_clk>;
0724 clock-names = "fck", "brg_int", "scif_clk";
0725 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
0726 <&dmac2 0x57>, <&dmac2 0x56>;
0727 dma-names = "tx", "rx", "tx", "rx";
0728 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0729 resets = <&cpg 204>;
0730 status = "disabled";
0731 };
0732
0733 scif4: serial@e6c40000 {
0734 compatible = "renesas,scif-r8a77970",
0735 "renesas,rcar-gen3-scif", "renesas,scif";
0736 reg = <0 0xe6c40000 0 64>;
0737 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
0738 clocks = <&cpg CPG_MOD 203>,
0739 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
0740 <&scif_clk>;
0741 clock-names = "fck", "brg_int", "scif_clk";
0742 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
0743 <&dmac2 0x59>, <&dmac2 0x58>;
0744 dma-names = "tx", "rx", "tx", "rx";
0745 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0746 resets = <&cpg 203>;
0747 status = "disabled";
0748 };
0749
0750 tpu: pwm@e6e80000 {
0751 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
0752 reg = <0 0xe6e80000 0 0x148>;
0753 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
0754 clocks = <&cpg CPG_MOD 304>;
0755 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0756 resets = <&cpg 304>;
0757 #pwm-cells = <3>;
0758 status = "disabled";
0759 };
0760
0761 msiof0: spi@e6e90000 {
0762 compatible = "renesas,msiof-r8a77970",
0763 "renesas,rcar-gen3-msiof";
0764 reg = <0 0xe6e90000 0 0x64>;
0765 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
0766 clocks = <&cpg CPG_MOD 211>;
0767 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0768 resets = <&cpg 211>;
0769 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
0770 <&dmac2 0x41>, <&dmac2 0x40>;
0771 dma-names = "tx", "rx", "tx", "rx";
0772 #address-cells = <1>;
0773 #size-cells = <0>;
0774 status = "disabled";
0775 };
0776
0777 msiof1: spi@e6ea0000 {
0778 compatible = "renesas,msiof-r8a77970",
0779 "renesas,rcar-gen3-msiof";
0780 reg = <0 0xe6ea0000 0 0x0064>;
0781 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
0782 clocks = <&cpg CPG_MOD 210>;
0783 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0784 resets = <&cpg 210>;
0785 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
0786 <&dmac2 0x43>, <&dmac2 0x42>;
0787 dma-names = "tx", "rx", "tx", "rx";
0788 #address-cells = <1>;
0789 #size-cells = <0>;
0790 status = "disabled";
0791 };
0792
0793 msiof2: spi@e6c00000 {
0794 compatible = "renesas,msiof-r8a77970",
0795 "renesas,rcar-gen3-msiof";
0796 reg = <0 0xe6c00000 0 0x0064>;
0797 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
0798 clocks = <&cpg CPG_MOD 209>;
0799 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0800 resets = <&cpg 209>;
0801 dmas = <&dmac1 0x45>, <&dmac1 0x44>,
0802 <&dmac2 0x45>, <&dmac2 0x44>;
0803 dma-names = "tx", "rx", "tx", "rx";
0804 #address-cells = <1>;
0805 #size-cells = <0>;
0806 status = "disabled";
0807 };
0808
0809 msiof3: spi@e6c10000 {
0810 compatible = "renesas,msiof-r8a77970",
0811 "renesas,rcar-gen3-msiof";
0812 reg = <0 0xe6c10000 0 0x0064>;
0813 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
0814 clocks = <&cpg CPG_MOD 208>;
0815 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0816 resets = <&cpg 208>;
0817 dmas = <&dmac1 0x47>, <&dmac1 0x46>,
0818 <&dmac2 0x47>, <&dmac2 0x46>;
0819 dma-names = "tx", "rx", "tx", "rx";
0820 #address-cells = <1>;
0821 #size-cells = <0>;
0822 status = "disabled";
0823 };
0824
0825 vin0: video@e6ef0000 {
0826 compatible = "renesas,vin-r8a77970";
0827 reg = <0 0xe6ef0000 0 0x1000>;
0828 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
0829 clocks = <&cpg CPG_MOD 811>;
0830 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0831 resets = <&cpg 811>;
0832 renesas,id = <0>;
0833 status = "disabled";
0834
0835 ports {
0836 #address-cells = <1>;
0837 #size-cells = <0>;
0838
0839 port@1 {
0840 #address-cells = <1>;
0841 #size-cells = <0>;
0842
0843 reg = <1>;
0844
0845 vin0csi40: endpoint@2 {
0846 reg = <2>;
0847 remote-endpoint = <&csi40vin0>;
0848 };
0849 };
0850 };
0851 };
0852
0853 vin1: video@e6ef1000 {
0854 compatible = "renesas,vin-r8a77970";
0855 reg = <0 0xe6ef1000 0 0x1000>;
0856 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
0857 clocks = <&cpg CPG_MOD 810>;
0858 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0859 resets = <&cpg 810>;
0860 renesas,id = <1>;
0861 status = "disabled";
0862
0863 ports {
0864 #address-cells = <1>;
0865 #size-cells = <0>;
0866
0867 port@1 {
0868 #address-cells = <1>;
0869 #size-cells = <0>;
0870
0871 reg = <1>;
0872
0873 vin1csi40: endpoint@2 {
0874 reg = <2>;
0875 remote-endpoint = <&csi40vin1>;
0876 };
0877 };
0878 };
0879 };
0880
0881 vin2: video@e6ef2000 {
0882 compatible = "renesas,vin-r8a77970";
0883 reg = <0 0xe6ef2000 0 0x1000>;
0884 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
0885 clocks = <&cpg CPG_MOD 809>;
0886 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0887 resets = <&cpg 809>;
0888 renesas,id = <2>;
0889 status = "disabled";
0890
0891 ports {
0892 #address-cells = <1>;
0893 #size-cells = <0>;
0894
0895 port@1 {
0896 #address-cells = <1>;
0897 #size-cells = <0>;
0898
0899 reg = <1>;
0900
0901 vin2csi40: endpoint@2 {
0902 reg = <2>;
0903 remote-endpoint = <&csi40vin2>;
0904 };
0905 };
0906 };
0907 };
0908
0909 vin3: video@e6ef3000 {
0910 compatible = "renesas,vin-r8a77970";
0911 reg = <0 0xe6ef3000 0 0x1000>;
0912 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
0913 clocks = <&cpg CPG_MOD 808>;
0914 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0915 resets = <&cpg 808>;
0916 renesas,id = <3>;
0917 status = "disabled";
0918
0919 ports {
0920 #address-cells = <1>;
0921 #size-cells = <0>;
0922
0923 port@1 {
0924 #address-cells = <1>;
0925 #size-cells = <0>;
0926
0927 reg = <1>;
0928
0929 vin3csi40: endpoint@2 {
0930 reg = <2>;
0931 remote-endpoint = <&csi40vin3>;
0932 };
0933 };
0934 };
0935 };
0936
0937 dmac1: dma-controller@e7300000 {
0938 compatible = "renesas,dmac-r8a77970",
0939 "renesas,rcar-dmac";
0940 reg = <0 0xe7300000 0 0x10000>;
0941 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0942 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0943 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0944 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0945 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0946 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0947 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0948 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0949 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
0950 interrupt-names = "error",
0951 "ch0", "ch1", "ch2", "ch3",
0952 "ch4", "ch5", "ch6", "ch7";
0953 clocks = <&cpg CPG_MOD 218>;
0954 clock-names = "fck";
0955 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0956 resets = <&cpg 218>;
0957 #dma-cells = <1>;
0958 dma-channels = <8>;
0959 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
0960 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
0961 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
0962 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
0963 };
0964
0965 dmac2: dma-controller@e7310000 {
0966 compatible = "renesas,dmac-r8a77970",
0967 "renesas,rcar-dmac";
0968 reg = <0 0xe7310000 0 0x10000>;
0969 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
0970 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0971 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0972 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0973 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0974 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0975 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0976 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
0977 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
0978 interrupt-names = "error",
0979 "ch0", "ch1", "ch2", "ch3",
0980 "ch4", "ch5", "ch6", "ch7";
0981 clocks = <&cpg CPG_MOD 217>;
0982 clock-names = "fck";
0983 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0984 resets = <&cpg 217>;
0985 #dma-cells = <1>;
0986 dma-channels = <8>;
0987 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
0988 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
0989 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
0990 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
0991 };
0992
0993 ipmmu_ds1: iommu@e7740000 {
0994 compatible = "renesas,ipmmu-r8a77970";
0995 reg = <0 0xe7740000 0 0x1000>;
0996 renesas,ipmmu-main = <&ipmmu_mm 0>;
0997 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
0998 #iommu-cells = <1>;
0999 };
1000
1001 ipmmu_ir: iommu@ff8b0000 {
1002 compatible = "renesas,ipmmu-r8a77970";
1003 reg = <0 0xff8b0000 0 0x1000>;
1004 renesas,ipmmu-main = <&ipmmu_mm 3>;
1005 power-domains = <&sysc R8A77970_PD_A3IR>;
1006 #iommu-cells = <1>;
1007 };
1008
1009 ipmmu_mm: iommu@e67b0000 {
1010 compatible = "renesas,ipmmu-r8a77970";
1011 reg = <0 0xe67b0000 0 0x1000>;
1012 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1013 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1014 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1015 #iommu-cells = <1>;
1016 };
1017
1018 ipmmu_rt: iommu@ffc80000 {
1019 compatible = "renesas,ipmmu-r8a77970";
1020 reg = <0 0xffc80000 0 0x1000>;
1021 renesas,ipmmu-main = <&ipmmu_mm 7>;
1022 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1023 #iommu-cells = <1>;
1024 };
1025
1026 ipmmu_vi0: iommu@febd0000 {
1027 compatible = "renesas,ipmmu-r8a77970";
1028 reg = <0 0xfebd0000 0 0x1000>;
1029 renesas,ipmmu-main = <&ipmmu_mm 9>;
1030 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1031 #iommu-cells = <1>;
1032 };
1033
1034 mmc0: mmc@ee140000 {
1035 compatible = "renesas,sdhi-r8a77970",
1036 "renesas,rcar-gen3-sdhi";
1037 reg = <0 0xee140000 0 0x2000>;
1038 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1039 clocks = <&cpg CPG_MOD 314>;
1040 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1041 resets = <&cpg 314>;
1042 max-frequency = <200000000>;
1043 iommus = <&ipmmu_ds1 32>;
1044 status = "disabled";
1045 };
1046
1047 rpc: spi@ee200000 {
1048 compatible = "renesas,r8a77970-rpc-if",
1049 "renesas,rcar-gen3-rpc-if";
1050 reg = <0 0xee200000 0 0x200>,
1051 <0 0x08000000 0 0x4000000>,
1052 <0 0xee208000 0 0x100>;
1053 reg-names = "regs", "dirmap", "wbuf";
1054 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1055 clocks = <&cpg CPG_MOD 917>;
1056 clock-names = "rpc";
1057 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1058 resets = <&cpg 917>;
1059 #address-cells = <1>;
1060 #size-cells = <0>;
1061 status = "disabled";
1062 };
1063
1064 gic: interrupt-controller@f1010000 {
1065 compatible = "arm,gic-400";
1066 #interrupt-cells = <3>;
1067 #address-cells = <0>;
1068 interrupt-controller;
1069 reg = <0 0xf1010000 0 0x1000>,
1070 <0 0xf1020000 0 0x20000>,
1071 <0 0xf1040000 0 0x20000>,
1072 <0 0xf1060000 0 0x20000>;
1073 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
1074 IRQ_TYPE_LEVEL_HIGH)>;
1075 clocks = <&cpg CPG_MOD 408>;
1076 clock-names = "clk";
1077 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1078 resets = <&cpg 408>;
1079 };
1080
1081 vspd0: vsp@fea20000 {
1082 compatible = "renesas,vsp2";
1083 reg = <0 0xfea20000 0 0x5000>;
1084 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1085 clocks = <&cpg CPG_MOD 623>;
1086 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1087 resets = <&cpg 623>;
1088 renesas,fcp = <&fcpvd0>;
1089 };
1090
1091 fcpvd0: fcp@fea27000 {
1092 compatible = "renesas,fcpv";
1093 reg = <0 0xfea27000 0 0x200>;
1094 clocks = <&cpg CPG_MOD 603>;
1095 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1096 resets = <&cpg 603>;
1097 };
1098
1099 csi40: csi2@feaa0000 {
1100 compatible = "renesas,r8a77970-csi2";
1101 reg = <0 0xfeaa0000 0 0x10000>;
1102 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1103 clocks = <&cpg CPG_MOD 716>;
1104 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1105 resets = <&cpg 716>;
1106 status = "disabled";
1107
1108 ports {
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1111
1112 port@0 {
1113 reg = <0>;
1114 };
1115
1116 port@1 {
1117 #address-cells = <1>;
1118 #size-cells = <0>;
1119
1120 reg = <1>;
1121
1122 csi40vin0: endpoint@0 {
1123 reg = <0>;
1124 remote-endpoint = <&vin0csi40>;
1125 };
1126 csi40vin1: endpoint@1 {
1127 reg = <1>;
1128 remote-endpoint = <&vin1csi40>;
1129 };
1130 csi40vin2: endpoint@2 {
1131 reg = <2>;
1132 remote-endpoint = <&vin2csi40>;
1133 };
1134 csi40vin3: endpoint@3 {
1135 reg = <3>;
1136 remote-endpoint = <&vin3csi40>;
1137 };
1138 };
1139 };
1140 };
1141
1142 du: display@feb00000 {
1143 compatible = "renesas,du-r8a77970";
1144 reg = <0 0xfeb00000 0 0x80000>;
1145 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1146 clocks = <&cpg CPG_MOD 724>;
1147 clock-names = "du.0";
1148 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1149 resets = <&cpg 724>;
1150 reset-names = "du.0";
1151 renesas,vsps = <&vspd0 0>;
1152
1153 status = "disabled";
1154
1155 ports {
1156 #address-cells = <1>;
1157 #size-cells = <0>;
1158
1159 port@0 {
1160 reg = <0>;
1161 };
1162
1163 port@1 {
1164 reg = <1>;
1165 du_out_lvds0: endpoint {
1166 remote-endpoint = <&lvds0_in>;
1167 };
1168 };
1169 };
1170 };
1171
1172 lvds0: lvds-encoder@feb90000 {
1173 compatible = "renesas,r8a77970-lvds";
1174 reg = <0 0xfeb90000 0 0x14>;
1175 clocks = <&cpg CPG_MOD 727>;
1176 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1177 resets = <&cpg 727>;
1178 status = "disabled";
1179
1180 ports {
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183
1184 port@0 {
1185 reg = <0>;
1186 lvds0_in: endpoint {
1187 remote-endpoint =
1188 <&du_out_lvds0>;
1189 };
1190 };
1191 port@1 {
1192 reg = <1>;
1193 };
1194 };
1195 };
1196
1197 prr: chipid@fff00044 {
1198 compatible = "renesas,prr";
1199 reg = <0 0xfff00044 0 4>;
1200 };
1201 };
1202
1203 thermal-zones {
1204 cpu-thermal {
1205 polling-delay-passive = <250>;
1206 polling-delay = <1000>;
1207 thermal-sensors = <&thermal>;
1208
1209 cooling-maps {
1210 };
1211
1212 trips {
1213 cpu-crit {
1214 temperature = <120000>;
1215 hysteresis = <2000>;
1216 type = "critical";
1217 };
1218 };
1219 };
1220 };
1221
1222 timer {
1223 compatible = "arm,armv8-timer";
1224 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1225 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1226 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1227 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1228 };
1229 };
