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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device Tree Source for the V3M Starter Kit board
0004  *
0005  * Copyright (C) 2017 Renesas Electronics Corp.
0006  * Copyright (C) 2017 Cogent Embedded, Inc.
0007  */
0008 
0009 /dts-v1/;
0010 #include "r8a77970.dtsi"
0011 #include <dt-bindings/gpio/gpio.h>
0012 
0013 / {
0014         model = "Renesas V3M Starter Kit board";
0015         compatible = "renesas,v3msk", "renesas,r8a77970";
0016 
0017         aliases {
0018                 serial0 = &scif0;
0019         };
0020 
0021         chosen {
0022                 stdout-path = "serial0:115200n8";
0023         };
0024 
0025         hdmi-out {
0026                 compatible = "hdmi-connector";
0027                 type = "a";
0028 
0029                 port {
0030                         hdmi_con: endpoint {
0031                                 remote-endpoint = <&adv7511_out>;
0032                         };
0033                 };
0034         };
0035 
0036         lvds-decoder {
0037                 compatible = "thine,thc63lvd1024";
0038                 vcc-supply = <&vcc_d3_3v>;
0039 
0040                 ports {
0041                         #address-cells = <1>;
0042                         #size-cells = <0>;
0043 
0044                         port@0 {
0045                                 reg = <0>;
0046                                 thc63lvd1024_in: endpoint {
0047                                         remote-endpoint = <&lvds0_out>;
0048                                 };
0049                         };
0050 
0051                         port@2 {
0052                                 reg = <2>;
0053                                 thc63lvd1024_out: endpoint {
0054                                         remote-endpoint = <&adv7511_in>;
0055                                 };
0056                         };
0057                 };
0058         };
0059 
0060         memory@48000000 {
0061                 device_type = "memory";
0062                 /* first 128MB is reserved for secure area. */
0063                 reg = <0x0 0x48000000 0x0 0x78000000>;
0064         };
0065 
0066         osc5_clk: osc5-clock {
0067                 compatible = "fixed-clock";
0068                 #clock-cells = <0>;
0069                 clock-frequency = <148500000>;
0070         };
0071 
0072         vcc_d1_8v: regulator-0 {
0073                 compatible = "regulator-fixed";
0074                 regulator-name = "VCC_D1.8V";
0075                 regulator-min-microvolt = <1800000>;
0076                 regulator-max-microvolt = <1800000>;
0077                 regulator-boot-on;
0078                 regulator-always-on;
0079         };
0080 
0081         vcc_d3_3v: regulator-1 {
0082                 compatible = "regulator-fixed";
0083                 regulator-name = "VCC_D3.3V";
0084                 regulator-min-microvolt = <3300000>;
0085                 regulator-max-microvolt = <3300000>;
0086                 regulator-boot-on;
0087                 regulator-always-on;
0088         };
0089 
0090         vcc_vddq_vin0: regulator-2 {
0091                 compatible = "regulator-fixed";
0092                 regulator-name = "VCC_VDDQ_VIN0";
0093                 regulator-min-microvolt = <3300000>;
0094                 regulator-max-microvolt = <3300000>;
0095                 regulator-boot-on;
0096                 regulator-always-on;
0097         };
0098 };
0099 
0100 &avb {
0101         pinctrl-0 = <&avb_pins>;
0102         pinctrl-names = "default";
0103 
0104         renesas,no-ether-link;
0105         phy-handle = <&phy0>;
0106         rx-internal-delay-ps = <1800>;
0107         tx-internal-delay-ps = <2000>;
0108         status = "okay";
0109 
0110         phy0: ethernet-phy@0 {
0111                 compatible = "ethernet-phy-id0022.1622",
0112                              "ethernet-phy-ieee802.3-c22";
0113                 rxc-skew-ps = <1500>;
0114                 reg = <0>;
0115                 interrupt-parent = <&gpio1>;
0116                 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
0117                 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
0118         };
0119 };
0120 
0121 &du {
0122         clocks = <&cpg CPG_MOD 724>,
0123                  <&osc5_clk>;
0124         clock-names = "du.0", "dclkin.0";
0125         status = "okay";
0126 };
0127 
0128 &extal_clk {
0129         clock-frequency = <16666666>;
0130 };
0131 
0132 &extalr_clk {
0133         clock-frequency = <32768>;
0134 };
0135 
0136 &i2c0 {
0137         pinctrl-0 = <&i2c0_pins>;
0138         pinctrl-names = "default";
0139 
0140         status = "okay";
0141         clock-frequency = <400000>;
0142 
0143         hdmi@39{
0144                 compatible = "adi,adv7511w";
0145                 #sound-dai-cells = <0>;
0146                 reg = <0x39>;
0147                 interrupt-parent = <&gpio1>;
0148                 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
0149                 avdd-supply = <&vcc_d1_8v>;
0150                 dvdd-supply = <&vcc_d1_8v>;
0151                 pvdd-supply = <&vcc_d1_8v>;
0152                 bgvdd-supply = <&vcc_d1_8v>;
0153                 dvdd-3v-supply = <&vcc_d3_3v>;
0154 
0155                 adi,input-depth = <8>;
0156                 adi,input-colorspace = "rgb";
0157                 adi,input-clock = "1x";
0158 
0159                 ports {
0160                         #address-cells = <1>;
0161                         #size-cells = <0>;
0162 
0163                         port@0 {
0164                                 reg = <0>;
0165                                 adv7511_in: endpoint {
0166                                         remote-endpoint = <&thc63lvd1024_out>;
0167                                 };
0168                         };
0169 
0170                         port@1 {
0171                                 reg = <1>;
0172                                 adv7511_out: endpoint {
0173                                         remote-endpoint = <&hdmi_con>;
0174                                 };
0175                         };
0176                 };
0177         };
0178 };
0179 
0180 &lvds0 {
0181         status = "okay";
0182 
0183         ports {
0184                 port@1 {
0185                         lvds0_out: endpoint {
0186                                 remote-endpoint = <&thc63lvd1024_in>;
0187                         };
0188                 };
0189         };
0190 };
0191 
0192 &mmc0 {
0193         pinctrl-0 = <&mmc_pins>;
0194         pinctrl-names = "default";
0195 
0196         vmmc-supply = <&vcc_d3_3v>;
0197         vqmmc-supply = <&vcc_vddq_vin0>;
0198         bus-width = <8>;
0199         non-removable;
0200         status = "okay";
0201 };
0202 
0203 &pfc {
0204         avb_pins: avb0 {
0205                 groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
0206                 function = "avb0";
0207         };
0208 
0209         i2c0_pins: i2c0 {
0210                 groups = "i2c0";
0211                 function = "i2c0";
0212         };
0213 
0214         mmc_pins: mmc_3_3v {
0215                 groups = "mmc_data8", "mmc_ctrl";
0216                 function = "mmc";
0217                 power-source = <3300>;
0218         };
0219 
0220         qspi0_pins: qspi0 {
0221                 groups = "qspi0_ctrl", "qspi0_data4";
0222                 function = "qspi0";
0223         };
0224 
0225         scif0_pins: scif0 {
0226                 groups = "scif0_data";
0227                 function = "scif0";
0228         };
0229 };
0230 
0231 &rpc {
0232         pinctrl-0 = <&qspi0_pins>;
0233         pinctrl-names = "default";
0234 
0235         status = "okay";
0236 
0237         flash@0 {
0238                 compatible = "spansion,s25fs512s", "jedec,spi-nor";
0239                 reg = <0>;
0240                 spi-max-frequency = <50000000>;
0241                 spi-rx-bus-width = <4>;
0242 
0243                 partitions {
0244                         compatible = "fixed-partitions";
0245                         #address-cells = <1>;
0246                         #size-cells = <1>;
0247 
0248                         bootparam@0 {
0249                                 reg = <0x00000000 0x040000>;
0250                                 read-only;
0251                         };
0252                         cr7@40000 {
0253                                 reg = <0x00040000 0x080000>;
0254                                 read-only;
0255                         };
0256                         cert_header_sa3@c0000 {
0257                                 reg = <0x000c0000 0x080000>;
0258                                 read-only;
0259                         };
0260                         bl2@140000 {
0261                                 reg = <0x00140000 0x040000>;
0262                                 read-only;
0263                         };
0264                         cert_header_sa6@180000 {
0265                                 reg = <0x00180000 0x040000>;
0266                                 read-only;
0267                         };
0268                         bl31@1c0000 {
0269                                 reg = <0x001c0000 0x460000>;
0270                                 read-only;
0271                         };
0272                         uboot@640000 {
0273                                 reg = <0x00640000 0x0c0000>;
0274                                 read-only;
0275                         };
0276                         uboot-env@700000 {
0277                                 reg = <0x00700000 0x040000>;
0278                                 read-only;
0279                         };
0280                         dtb@740000 {
0281                                 reg = <0x00740000 0x080000>;
0282                         };
0283                         kernel@7c0000 {
0284                                 reg = <0x007c0000 0x1400000>;
0285                         };
0286                         user@1bc0000 {
0287                                 reg = <0x01bc0000 0x2440000>;
0288                         };
0289                 };
0290         };
0291 };
0292 
0293 &scif0 {
0294         pinctrl-0 = <&scif0_pins>;
0295         pinctrl-names = "default";
0296 
0297         status = "okay";
0298 };