0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
0004 *
0005 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
0006 *
0007 * Based on r8a7796.dtsi
0008 * Copyright (C) 2016 Renesas Electronics Corp.
0009 */
0010
0011 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
0012 #include <dt-bindings/interrupt-controller/arm-gic.h>
0013 #include <dt-bindings/power/r8a77965-sysc.h>
0014
0015 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
0016
0017 #define SOC_HAS_SATA
0018
0019 / {
0020 compatible = "renesas,r8a77965";
0021 #address-cells = <2>;
0022 #size-cells = <2>;
0023
0024 aliases {
0025 i2c0 = &i2c0;
0026 i2c1 = &i2c1;
0027 i2c2 = &i2c2;
0028 i2c3 = &i2c3;
0029 i2c4 = &i2c4;
0030 i2c5 = &i2c5;
0031 i2c6 = &i2c6;
0032 i2c7 = &i2c_dvfs;
0033 };
0034
0035 /*
0036 * The external audio clocks are configured as 0 Hz fixed frequency
0037 * clocks by default.
0038 * Boards that provide audio clocks should override them.
0039 */
0040 audio_clk_a: audio_clk_a {
0041 compatible = "fixed-clock";
0042 #clock-cells = <0>;
0043 clock-frequency = <0>;
0044 };
0045
0046 audio_clk_b: audio_clk_b {
0047 compatible = "fixed-clock";
0048 #clock-cells = <0>;
0049 clock-frequency = <0>;
0050 };
0051
0052 audio_clk_c: audio_clk_c {
0053 compatible = "fixed-clock";
0054 #clock-cells = <0>;
0055 clock-frequency = <0>;
0056 };
0057
0058 /* External CAN clock - to be overridden by boards that provide it */
0059 can_clk: can {
0060 compatible = "fixed-clock";
0061 #clock-cells = <0>;
0062 clock-frequency = <0>;
0063 };
0064
0065 cluster0_opp: opp-table-0 {
0066 compatible = "operating-points-v2";
0067 opp-shared;
0068
0069 opp-500000000 {
0070 opp-hz = /bits/ 64 <500000000>;
0071 opp-microvolt = <830000>;
0072 clock-latency-ns = <300000>;
0073 };
0074 opp-1000000000 {
0075 opp-hz = /bits/ 64 <1000000000>;
0076 opp-microvolt = <830000>;
0077 clock-latency-ns = <300000>;
0078 };
0079 opp-1500000000 {
0080 opp-hz = /bits/ 64 <1500000000>;
0081 opp-microvolt = <830000>;
0082 clock-latency-ns = <300000>;
0083 opp-suspend;
0084 };
0085 opp-1600000000 {
0086 opp-hz = /bits/ 64 <1600000000>;
0087 opp-microvolt = <900000>;
0088 clock-latency-ns = <300000>;
0089 turbo-mode;
0090 };
0091 opp-1700000000 {
0092 opp-hz = /bits/ 64 <1700000000>;
0093 opp-microvolt = <900000>;
0094 clock-latency-ns = <300000>;
0095 turbo-mode;
0096 };
0097 opp-1800000000 {
0098 opp-hz = /bits/ 64 <1800000000>;
0099 opp-microvolt = <960000>;
0100 clock-latency-ns = <300000>;
0101 turbo-mode;
0102 };
0103 };
0104
0105 cpus {
0106 #address-cells = <1>;
0107 #size-cells = <0>;
0108
0109 a57_0: cpu@0 {
0110 compatible = "arm,cortex-a57";
0111 reg = <0x0>;
0112 device_type = "cpu";
0113 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
0114 next-level-cache = <&L2_CA57>;
0115 enable-method = "psci";
0116 cpu-idle-states = <&CPU_SLEEP_0>;
0117 #cooling-cells = <2>;
0118 dynamic-power-coefficient = <854>;
0119 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
0120 operating-points-v2 = <&cluster0_opp>;
0121 };
0122
0123 a57_1: cpu@1 {
0124 compatible = "arm,cortex-a57";
0125 reg = <0x1>;
0126 device_type = "cpu";
0127 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
0128 next-level-cache = <&L2_CA57>;
0129 enable-method = "psci";
0130 cpu-idle-states = <&CPU_SLEEP_0>;
0131 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
0132 operating-points-v2 = <&cluster0_opp>;
0133 };
0134
0135 L2_CA57: cache-controller-0 {
0136 compatible = "cache";
0137 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
0138 cache-unified;
0139 cache-level = <2>;
0140 };
0141
0142 idle-states {
0143 entry-method = "psci";
0144
0145 CPU_SLEEP_0: cpu-sleep-0 {
0146 compatible = "arm,idle-state";
0147 arm,psci-suspend-param = <0x0010000>;
0148 local-timer-stop;
0149 entry-latency-us = <400>;
0150 exit-latency-us = <500>;
0151 min-residency-us = <4000>;
0152 };
0153 };
0154 };
0155
0156 extal_clk: extal {
0157 compatible = "fixed-clock";
0158 #clock-cells = <0>;
0159 /* This value must be overridden by the board */
0160 clock-frequency = <0>;
0161 };
0162
0163 extalr_clk: extalr {
0164 compatible = "fixed-clock";
0165 #clock-cells = <0>;
0166 /* This value must be overridden by the board */
0167 clock-frequency = <0>;
0168 };
0169
0170 /* External PCIe clock - can be overridden by the board */
0171 pcie_bus_clk: pcie_bus {
0172 compatible = "fixed-clock";
0173 #clock-cells = <0>;
0174 clock-frequency = <0>;
0175 };
0176
0177 pmu_a57 {
0178 compatible = "arm,cortex-a57-pmu";
0179 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0180 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0181 interrupt-affinity = <&a57_0>,
0182 <&a57_1>;
0183 };
0184
0185 psci {
0186 compatible = "arm,psci-1.0", "arm,psci-0.2";
0187 method = "smc";
0188 };
0189
0190 /* External SCIF clock - to be overridden by boards that provide it */
0191 scif_clk: scif {
0192 compatible = "fixed-clock";
0193 #clock-cells = <0>;
0194 clock-frequency = <0>;
0195 };
0196
0197 soc {
0198 compatible = "simple-bus";
0199 interrupt-parent = <&gic>;
0200 #address-cells = <2>;
0201 #size-cells = <2>;
0202 ranges;
0203
0204 rwdt: watchdog@e6020000 {
0205 compatible = "renesas,r8a77965-wdt",
0206 "renesas,rcar-gen3-wdt";
0207 reg = <0 0xe6020000 0 0x0c>;
0208 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0209 clocks = <&cpg CPG_MOD 402>;
0210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0211 resets = <&cpg 402>;
0212 status = "disabled";
0213 };
0214
0215 gpio0: gpio@e6050000 {
0216 compatible = "renesas,gpio-r8a77965",
0217 "renesas,rcar-gen3-gpio";
0218 reg = <0 0xe6050000 0 0x50>;
0219 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0220 #gpio-cells = <2>;
0221 gpio-controller;
0222 gpio-ranges = <&pfc 0 0 16>;
0223 #interrupt-cells = <2>;
0224 interrupt-controller;
0225 clocks = <&cpg CPG_MOD 912>;
0226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0227 resets = <&cpg 912>;
0228 };
0229
0230 gpio1: gpio@e6051000 {
0231 compatible = "renesas,gpio-r8a77965",
0232 "renesas,rcar-gen3-gpio";
0233 reg = <0 0xe6051000 0 0x50>;
0234 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0235 #gpio-cells = <2>;
0236 gpio-controller;
0237 gpio-ranges = <&pfc 0 32 29>;
0238 #interrupt-cells = <2>;
0239 interrupt-controller;
0240 clocks = <&cpg CPG_MOD 911>;
0241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0242 resets = <&cpg 911>;
0243 };
0244
0245 gpio2: gpio@e6052000 {
0246 compatible = "renesas,gpio-r8a77965",
0247 "renesas,rcar-gen3-gpio";
0248 reg = <0 0xe6052000 0 0x50>;
0249 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0250 #gpio-cells = <2>;
0251 gpio-controller;
0252 gpio-ranges = <&pfc 0 64 15>;
0253 #interrupt-cells = <2>;
0254 interrupt-controller;
0255 clocks = <&cpg CPG_MOD 910>;
0256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0257 resets = <&cpg 910>;
0258 };
0259
0260 gpio3: gpio@e6053000 {
0261 compatible = "renesas,gpio-r8a77965",
0262 "renesas,rcar-gen3-gpio";
0263 reg = <0 0xe6053000 0 0x50>;
0264 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0265 #gpio-cells = <2>;
0266 gpio-controller;
0267 gpio-ranges = <&pfc 0 96 16>;
0268 #interrupt-cells = <2>;
0269 interrupt-controller;
0270 clocks = <&cpg CPG_MOD 909>;
0271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0272 resets = <&cpg 909>;
0273 };
0274
0275 gpio4: gpio@e6054000 {
0276 compatible = "renesas,gpio-r8a77965",
0277 "renesas,rcar-gen3-gpio";
0278 reg = <0 0xe6054000 0 0x50>;
0279 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0280 #gpio-cells = <2>;
0281 gpio-controller;
0282 gpio-ranges = <&pfc 0 128 18>;
0283 #interrupt-cells = <2>;
0284 interrupt-controller;
0285 clocks = <&cpg CPG_MOD 908>;
0286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0287 resets = <&cpg 908>;
0288 };
0289
0290 gpio5: gpio@e6055000 {
0291 compatible = "renesas,gpio-r8a77965",
0292 "renesas,rcar-gen3-gpio";
0293 reg = <0 0xe6055000 0 0x50>;
0294 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0295 #gpio-cells = <2>;
0296 gpio-controller;
0297 gpio-ranges = <&pfc 0 160 26>;
0298 #interrupt-cells = <2>;
0299 interrupt-controller;
0300 clocks = <&cpg CPG_MOD 907>;
0301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0302 resets = <&cpg 907>;
0303 };
0304
0305 gpio6: gpio@e6055400 {
0306 compatible = "renesas,gpio-r8a77965",
0307 "renesas,rcar-gen3-gpio";
0308 reg = <0 0xe6055400 0 0x50>;
0309 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0310 #gpio-cells = <2>;
0311 gpio-controller;
0312 gpio-ranges = <&pfc 0 192 32>;
0313 #interrupt-cells = <2>;
0314 interrupt-controller;
0315 clocks = <&cpg CPG_MOD 906>;
0316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0317 resets = <&cpg 906>;
0318 };
0319
0320 gpio7: gpio@e6055800 {
0321 compatible = "renesas,gpio-r8a77965",
0322 "renesas,rcar-gen3-gpio";
0323 reg = <0 0xe6055800 0 0x50>;
0324 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0325 #gpio-cells = <2>;
0326 gpio-controller;
0327 gpio-ranges = <&pfc 0 224 4>;
0328 #interrupt-cells = <2>;
0329 interrupt-controller;
0330 clocks = <&cpg CPG_MOD 905>;
0331 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0332 resets = <&cpg 905>;
0333 };
0334
0335 pfc: pinctrl@e6060000 {
0336 compatible = "renesas,pfc-r8a77965";
0337 reg = <0 0xe6060000 0 0x50c>;
0338 };
0339
0340 cmt0: timer@e60f0000 {
0341 compatible = "renesas,r8a77965-cmt0",
0342 "renesas,rcar-gen3-cmt0";
0343 reg = <0 0xe60f0000 0 0x1004>;
0344 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0345 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0346 clocks = <&cpg CPG_MOD 303>;
0347 clock-names = "fck";
0348 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0349 resets = <&cpg 303>;
0350 status = "disabled";
0351 };
0352
0353 cmt1: timer@e6130000 {
0354 compatible = "renesas,r8a77965-cmt1",
0355 "renesas,rcar-gen3-cmt1";
0356 reg = <0 0xe6130000 0 0x1004>;
0357 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0358 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0359 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0360 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0361 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0362 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0363 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0364 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0365 clocks = <&cpg CPG_MOD 302>;
0366 clock-names = "fck";
0367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0368 resets = <&cpg 302>;
0369 status = "disabled";
0370 };
0371
0372 cmt2: timer@e6140000 {
0373 compatible = "renesas,r8a77965-cmt1",
0374 "renesas,rcar-gen3-cmt1";
0375 reg = <0 0xe6140000 0 0x1004>;
0376 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0377 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0378 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0379 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0380 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0381 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0382 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0383 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0384 clocks = <&cpg CPG_MOD 301>;
0385 clock-names = "fck";
0386 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0387 resets = <&cpg 301>;
0388 status = "disabled";
0389 };
0390
0391 cmt3: timer@e6148000 {
0392 compatible = "renesas,r8a77965-cmt1",
0393 "renesas,rcar-gen3-cmt1";
0394 reg = <0 0xe6148000 0 0x1004>;
0395 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0396 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0397 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0398 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0399 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0400 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0401 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0402 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0403 clocks = <&cpg CPG_MOD 300>;
0404 clock-names = "fck";
0405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0406 resets = <&cpg 300>;
0407 status = "disabled";
0408 };
0409
0410 cpg: clock-controller@e6150000 {
0411 compatible = "renesas,r8a77965-cpg-mssr";
0412 reg = <0 0xe6150000 0 0x1000>;
0413 clocks = <&extal_clk>, <&extalr_clk>;
0414 clock-names = "extal", "extalr";
0415 #clock-cells = <2>;
0416 #power-domain-cells = <0>;
0417 #reset-cells = <1>;
0418 };
0419
0420 rst: reset-controller@e6160000 {
0421 compatible = "renesas,r8a77965-rst";
0422 reg = <0 0xe6160000 0 0x0200>;
0423 };
0424
0425 sysc: system-controller@e6180000 {
0426 compatible = "renesas,r8a77965-sysc";
0427 reg = <0 0xe6180000 0 0x0400>;
0428 #power-domain-cells = <1>;
0429 };
0430
0431 tsc: thermal@e6198000 {
0432 compatible = "renesas,r8a77965-thermal";
0433 reg = <0 0xe6198000 0 0x100>,
0434 <0 0xe61a0000 0 0x100>,
0435 <0 0xe61a8000 0 0x100>;
0436 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0437 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0438 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0439 clocks = <&cpg CPG_MOD 522>;
0440 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0441 resets = <&cpg 522>;
0442 #thermal-sensor-cells = <1>;
0443 };
0444
0445 intc_ex: interrupt-controller@e61c0000 {
0446 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
0447 #interrupt-cells = <2>;
0448 interrupt-controller;
0449 reg = <0 0xe61c0000 0 0x200>;
0450 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0451 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0452 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0453 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0454 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0455 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0456 clocks = <&cpg CPG_MOD 407>;
0457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0458 resets = <&cpg 407>;
0459 };
0460
0461 tmu0: timer@e61e0000 {
0462 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
0463 reg = <0 0xe61e0000 0 0x30>;
0464 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0465 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0466 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0467 clocks = <&cpg CPG_MOD 125>;
0468 clock-names = "fck";
0469 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0470 resets = <&cpg 125>;
0471 status = "disabled";
0472 };
0473
0474 tmu1: timer@e6fc0000 {
0475 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
0476 reg = <0 0xe6fc0000 0 0x30>;
0477 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0478 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0479 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0480 clocks = <&cpg CPG_MOD 124>;
0481 clock-names = "fck";
0482 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0483 resets = <&cpg 124>;
0484 status = "disabled";
0485 };
0486
0487 tmu2: timer@e6fd0000 {
0488 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
0489 reg = <0 0xe6fd0000 0 0x30>;
0490 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0491 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0492 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0493 clocks = <&cpg CPG_MOD 123>;
0494 clock-names = "fck";
0495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0496 resets = <&cpg 123>;
0497 status = "disabled";
0498 };
0499
0500 tmu3: timer@e6fe0000 {
0501 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
0502 reg = <0 0xe6fe0000 0 0x30>;
0503 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0504 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0505 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0506 clocks = <&cpg CPG_MOD 122>;
0507 clock-names = "fck";
0508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0509 resets = <&cpg 122>;
0510 status = "disabled";
0511 };
0512
0513 tmu4: timer@ffc00000 {
0514 compatible = "renesas,tmu-r8a77965", "renesas,tmu";
0515 reg = <0 0xffc00000 0 0x30>;
0516 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0517 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0518 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0519 clocks = <&cpg CPG_MOD 121>;
0520 clock-names = "fck";
0521 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0522 resets = <&cpg 121>;
0523 status = "disabled";
0524 };
0525
0526 i2c0: i2c@e6500000 {
0527 #address-cells = <1>;
0528 #size-cells = <0>;
0529 compatible = "renesas,i2c-r8a77965",
0530 "renesas,rcar-gen3-i2c";
0531 reg = <0 0xe6500000 0 0x40>;
0532 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0533 clocks = <&cpg CPG_MOD 931>;
0534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0535 resets = <&cpg 931>;
0536 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0537 <&dmac2 0x91>, <&dmac2 0x90>;
0538 dma-names = "tx", "rx", "tx", "rx";
0539 i2c-scl-internal-delay-ns = <110>;
0540 status = "disabled";
0541 };
0542
0543 i2c1: i2c@e6508000 {
0544 #address-cells = <1>;
0545 #size-cells = <0>;
0546 compatible = "renesas,i2c-r8a77965",
0547 "renesas,rcar-gen3-i2c";
0548 reg = <0 0xe6508000 0 0x40>;
0549 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0550 clocks = <&cpg CPG_MOD 930>;
0551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0552 resets = <&cpg 930>;
0553 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0554 <&dmac2 0x93>, <&dmac2 0x92>;
0555 dma-names = "tx", "rx", "tx", "rx";
0556 i2c-scl-internal-delay-ns = <6>;
0557 status = "disabled";
0558 };
0559
0560 i2c2: i2c@e6510000 {
0561 #address-cells = <1>;
0562 #size-cells = <0>;
0563 compatible = "renesas,i2c-r8a77965",
0564 "renesas,rcar-gen3-i2c";
0565 reg = <0 0xe6510000 0 0x40>;
0566 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0567 clocks = <&cpg CPG_MOD 929>;
0568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0569 resets = <&cpg 929>;
0570 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0571 <&dmac2 0x95>, <&dmac2 0x94>;
0572 dma-names = "tx", "rx", "tx", "rx";
0573 i2c-scl-internal-delay-ns = <6>;
0574 status = "disabled";
0575 };
0576
0577 i2c3: i2c@e66d0000 {
0578 #address-cells = <1>;
0579 #size-cells = <0>;
0580 compatible = "renesas,i2c-r8a77965",
0581 "renesas,rcar-gen3-i2c";
0582 reg = <0 0xe66d0000 0 0x40>;
0583 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0584 clocks = <&cpg CPG_MOD 928>;
0585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0586 resets = <&cpg 928>;
0587 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0588 dma-names = "tx", "rx";
0589 i2c-scl-internal-delay-ns = <110>;
0590 status = "disabled";
0591 };
0592
0593 i2c4: i2c@e66d8000 {
0594 #address-cells = <1>;
0595 #size-cells = <0>;
0596 compatible = "renesas,i2c-r8a77965",
0597 "renesas,rcar-gen3-i2c";
0598 reg = <0 0xe66d8000 0 0x40>;
0599 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0600 clocks = <&cpg CPG_MOD 927>;
0601 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0602 resets = <&cpg 927>;
0603 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
0604 dma-names = "tx", "rx";
0605 i2c-scl-internal-delay-ns = <110>;
0606 status = "disabled";
0607 };
0608
0609 i2c5: i2c@e66e0000 {
0610 #address-cells = <1>;
0611 #size-cells = <0>;
0612 compatible = "renesas,i2c-r8a77965",
0613 "renesas,rcar-gen3-i2c";
0614 reg = <0 0xe66e0000 0 0x40>;
0615 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0616 clocks = <&cpg CPG_MOD 919>;
0617 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0618 resets = <&cpg 919>;
0619 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
0620 dma-names = "tx", "rx";
0621 i2c-scl-internal-delay-ns = <110>;
0622 status = "disabled";
0623 };
0624
0625 i2c6: i2c@e66e8000 {
0626 #address-cells = <1>;
0627 #size-cells = <0>;
0628 compatible = "renesas,i2c-r8a77965",
0629 "renesas,rcar-gen3-i2c";
0630 reg = <0 0xe66e8000 0 0x40>;
0631 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0632 clocks = <&cpg CPG_MOD 918>;
0633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0634 resets = <&cpg 918>;
0635 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
0636 dma-names = "tx", "rx";
0637 i2c-scl-internal-delay-ns = <6>;
0638 status = "disabled";
0639 };
0640
0641 i2c_dvfs: i2c@e60b0000 {
0642 #address-cells = <1>;
0643 #size-cells = <0>;
0644 compatible = "renesas,iic-r8a77965",
0645 "renesas,rcar-gen3-iic",
0646 "renesas,rmobile-iic";
0647 reg = <0 0xe60b0000 0 0x425>;
0648 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0649 clocks = <&cpg CPG_MOD 926>;
0650 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0651 resets = <&cpg 926>;
0652 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
0653 dma-names = "tx", "rx";
0654 status = "disabled";
0655 };
0656
0657 hscif0: serial@e6540000 {
0658 compatible = "renesas,hscif-r8a77965",
0659 "renesas,rcar-gen3-hscif",
0660 "renesas,hscif";
0661 reg = <0 0xe6540000 0 0x60>;
0662 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0663 clocks = <&cpg CPG_MOD 520>,
0664 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0665 <&scif_clk>;
0666 clock-names = "fck", "brg_int", "scif_clk";
0667 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0668 <&dmac2 0x31>, <&dmac2 0x30>;
0669 dma-names = "tx", "rx", "tx", "rx";
0670 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0671 resets = <&cpg 520>;
0672 status = "disabled";
0673 };
0674
0675 hscif1: serial@e6550000 {
0676 compatible = "renesas,hscif-r8a77965",
0677 "renesas,rcar-gen3-hscif",
0678 "renesas,hscif";
0679 reg = <0 0xe6550000 0 0x60>;
0680 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0681 clocks = <&cpg CPG_MOD 519>,
0682 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0683 <&scif_clk>;
0684 clock-names = "fck", "brg_int", "scif_clk";
0685 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0686 <&dmac2 0x33>, <&dmac2 0x32>;
0687 dma-names = "tx", "rx", "tx", "rx";
0688 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0689 resets = <&cpg 519>;
0690 status = "disabled";
0691 };
0692
0693 hscif2: serial@e6560000 {
0694 compatible = "renesas,hscif-r8a77965",
0695 "renesas,rcar-gen3-hscif",
0696 "renesas,hscif";
0697 reg = <0 0xe6560000 0 0x60>;
0698 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0699 clocks = <&cpg CPG_MOD 518>,
0700 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0701 <&scif_clk>;
0702 clock-names = "fck", "brg_int", "scif_clk";
0703 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0704 <&dmac2 0x35>, <&dmac2 0x34>;
0705 dma-names = "tx", "rx", "tx", "rx";
0706 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0707 resets = <&cpg 518>;
0708 status = "disabled";
0709 };
0710
0711 hscif3: serial@e66a0000 {
0712 compatible = "renesas,hscif-r8a77965",
0713 "renesas,rcar-gen3-hscif",
0714 "renesas,hscif";
0715 reg = <0 0xe66a0000 0 0x60>;
0716 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0717 clocks = <&cpg CPG_MOD 517>,
0718 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0719 <&scif_clk>;
0720 clock-names = "fck", "brg_int", "scif_clk";
0721 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0722 dma-names = "tx", "rx";
0723 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0724 resets = <&cpg 517>;
0725 status = "disabled";
0726 };
0727
0728 hscif4: serial@e66b0000 {
0729 compatible = "renesas,hscif-r8a77965",
0730 "renesas,rcar-gen3-hscif",
0731 "renesas,hscif";
0732 reg = <0 0xe66b0000 0 0x60>;
0733 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0734 clocks = <&cpg CPG_MOD 516>,
0735 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
0736 <&scif_clk>;
0737 clock-names = "fck", "brg_int", "scif_clk";
0738 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
0739 dma-names = "tx", "rx";
0740 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0741 resets = <&cpg 516>;
0742 status = "disabled";
0743 };
0744
0745 hsusb: usb@e6590000 {
0746 compatible = "renesas,usbhs-r8a77965",
0747 "renesas,rcar-gen3-usbhs";
0748 reg = <0 0xe6590000 0 0x200>;
0749 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0750 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0751 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0752 <&usb_dmac1 0>, <&usb_dmac1 1>;
0753 dma-names = "ch0", "ch1", "ch2", "ch3";
0754 renesas,buswait = <11>;
0755 phys = <&usb2_phy0 3>;
0756 phy-names = "usb";
0757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0758 resets = <&cpg 704>, <&cpg 703>;
0759 status = "disabled";
0760 };
0761
0762 usb_dmac0: dma-controller@e65a0000 {
0763 compatible = "renesas,r8a77965-usb-dmac",
0764 "renesas,usb-dmac";
0765 reg = <0 0xe65a0000 0 0x100>;
0766 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0767 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0768 interrupt-names = "ch0", "ch1";
0769 clocks = <&cpg CPG_MOD 330>;
0770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0771 resets = <&cpg 330>;
0772 #dma-cells = <1>;
0773 dma-channels = <2>;
0774 };
0775
0776 usb_dmac1: dma-controller@e65b0000 {
0777 compatible = "renesas,r8a77965-usb-dmac",
0778 "renesas,usb-dmac";
0779 reg = <0 0xe65b0000 0 0x100>;
0780 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0781 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0782 interrupt-names = "ch0", "ch1";
0783 clocks = <&cpg CPG_MOD 331>;
0784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0785 resets = <&cpg 331>;
0786 #dma-cells = <1>;
0787 dma-channels = <2>;
0788 };
0789
0790 usb3_phy0: usb-phy@e65ee000 {
0791 compatible = "renesas,r8a77965-usb3-phy",
0792 "renesas,rcar-gen3-usb3-phy";
0793 reg = <0 0xe65ee000 0 0x90>;
0794 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
0795 <&usb_extal_clk>;
0796 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
0797 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0798 resets = <&cpg 328>;
0799 #phy-cells = <0>;
0800 status = "disabled";
0801 };
0802
0803 arm_cc630p: crypto@e6601000 {
0804 compatible = "arm,cryptocell-630p-ree";
0805 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
0806 reg = <0x0 0xe6601000 0 0x1000>;
0807 clocks = <&cpg CPG_MOD 229>;
0808 resets = <&cpg 229>;
0809 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0810 };
0811
0812 dmac0: dma-controller@e6700000 {
0813 compatible = "renesas,dmac-r8a77965",
0814 "renesas,rcar-dmac";
0815 reg = <0 0xe6700000 0 0x10000>;
0816 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0817 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0818 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0819 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0820 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0821 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0822 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0823 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0824 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0825 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0826 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0827 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0828 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0829 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0830 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0831 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
0832 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0833 interrupt-names = "error",
0834 "ch0", "ch1", "ch2", "ch3",
0835 "ch4", "ch5", "ch6", "ch7",
0836 "ch8", "ch9", "ch10", "ch11",
0837 "ch12", "ch13", "ch14", "ch15";
0838 clocks = <&cpg CPG_MOD 219>;
0839 clock-names = "fck";
0840 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0841 resets = <&cpg 219>;
0842 #dma-cells = <1>;
0843 dma-channels = <16>;
0844 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0845 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0846 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0847 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
0848 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
0849 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
0850 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
0851 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
0852 };
0853
0854 dmac1: dma-controller@e7300000 {
0855 compatible = "renesas,dmac-r8a77965",
0856 "renesas,rcar-dmac";
0857 reg = <0 0xe7300000 0 0x10000>;
0858 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0859 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0860 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0861 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0862 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0863 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0864 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0865 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0866 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0867 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0868 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0869 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0870 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0871 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0872 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0873 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
0874 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
0875 interrupt-names = "error",
0876 "ch0", "ch1", "ch2", "ch3",
0877 "ch4", "ch5", "ch6", "ch7",
0878 "ch8", "ch9", "ch10", "ch11",
0879 "ch12", "ch13", "ch14", "ch15";
0880 clocks = <&cpg CPG_MOD 218>;
0881 clock-names = "fck";
0882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0883 resets = <&cpg 218>;
0884 #dma-cells = <1>;
0885 dma-channels = <16>;
0886 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
0887 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
0888 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
0889 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
0890 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
0891 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
0892 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
0893 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
0894 };
0895
0896 dmac2: dma-controller@e7310000 {
0897 compatible = "renesas,dmac-r8a77965",
0898 "renesas,rcar-dmac";
0899 reg = <0 0xe7310000 0 0x10000>;
0900 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
0901 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
0902 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
0903 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
0904 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
0905 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
0906 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
0907 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
0908 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
0909 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
0910 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
0911 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
0912 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
0913 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
0914 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
0915 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
0916 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
0917 interrupt-names = "error",
0918 "ch0", "ch1", "ch2", "ch3",
0919 "ch4", "ch5", "ch6", "ch7",
0920 "ch8", "ch9", "ch10", "ch11",
0921 "ch12", "ch13", "ch14", "ch15";
0922 clocks = <&cpg CPG_MOD 217>;
0923 clock-names = "fck";
0924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0925 resets = <&cpg 217>;
0926 #dma-cells = <1>;
0927 dma-channels = <16>;
0928 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
0929 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
0930 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
0931 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
0932 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
0933 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
0934 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
0935 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
0936 };
0937
0938 ipmmu_ds0: iommu@e6740000 {
0939 compatible = "renesas,ipmmu-r8a77965";
0940 reg = <0 0xe6740000 0 0x1000>;
0941 renesas,ipmmu-main = <&ipmmu_mm 0>;
0942 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0943 #iommu-cells = <1>;
0944 };
0945
0946 ipmmu_ds1: iommu@e7740000 {
0947 compatible = "renesas,ipmmu-r8a77965";
0948 reg = <0 0xe7740000 0 0x1000>;
0949 renesas,ipmmu-main = <&ipmmu_mm 1>;
0950 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0951 #iommu-cells = <1>;
0952 };
0953
0954 ipmmu_hc: iommu@e6570000 {
0955 compatible = "renesas,ipmmu-r8a77965";
0956 reg = <0 0xe6570000 0 0x1000>;
0957 renesas,ipmmu-main = <&ipmmu_mm 2>;
0958 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0959 #iommu-cells = <1>;
0960 };
0961
0962 ipmmu_mm: iommu@e67b0000 {
0963 compatible = "renesas,ipmmu-r8a77965";
0964 reg = <0 0xe67b0000 0 0x1000>;
0965 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
0966 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
0967 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0968 #iommu-cells = <1>;
0969 };
0970
0971 ipmmu_mp: iommu@ec670000 {
0972 compatible = "renesas,ipmmu-r8a77965";
0973 reg = <0 0xec670000 0 0x1000>;
0974 renesas,ipmmu-main = <&ipmmu_mm 4>;
0975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0976 #iommu-cells = <1>;
0977 };
0978
0979 ipmmu_pv0: iommu@fd800000 {
0980 compatible = "renesas,ipmmu-r8a77965";
0981 reg = <0 0xfd800000 0 0x1000>;
0982 renesas,ipmmu-main = <&ipmmu_mm 6>;
0983 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0984 #iommu-cells = <1>;
0985 };
0986
0987 ipmmu_rt: iommu@ffc80000 {
0988 compatible = "renesas,ipmmu-r8a77965";
0989 reg = <0 0xffc80000 0 0x1000>;
0990 renesas,ipmmu-main = <&ipmmu_mm 10>;
0991 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
0992 #iommu-cells = <1>;
0993 };
0994
0995 ipmmu_vc0: iommu@fe6b0000 {
0996 compatible = "renesas,ipmmu-r8a77965";
0997 reg = <0 0xfe6b0000 0 0x1000>;
0998 renesas,ipmmu-main = <&ipmmu_mm 12>;
0999 power-domains = <&sysc R8A77965_PD_A3VC>;
1000 #iommu-cells = <1>;
1001 };
1002
1003 ipmmu_vi0: iommu@febd0000 {
1004 compatible = "renesas,ipmmu-r8a77965";
1005 reg = <0 0xfebd0000 0 0x1000>;
1006 renesas,ipmmu-main = <&ipmmu_mm 14>;
1007 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1008 #iommu-cells = <1>;
1009 };
1010
1011 ipmmu_vp0: iommu@fe990000 {
1012 compatible = "renesas,ipmmu-r8a77965";
1013 reg = <0 0xfe990000 0 0x1000>;
1014 renesas,ipmmu-main = <&ipmmu_mm 16>;
1015 power-domains = <&sysc R8A77965_PD_A3VP>;
1016 #iommu-cells = <1>;
1017 };
1018
1019 avb: ethernet@e6800000 {
1020 compatible = "renesas,etheravb-r8a77965",
1021 "renesas,etheravb-rcar-gen3";
1022 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1023 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1024 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1025 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1026 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1027 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1028 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1029 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1040 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1041 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1042 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1043 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1046 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1048 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1049 "ch4", "ch5", "ch6", "ch7",
1050 "ch8", "ch9", "ch10", "ch11",
1051 "ch12", "ch13", "ch14", "ch15",
1052 "ch16", "ch17", "ch18", "ch19",
1053 "ch20", "ch21", "ch22", "ch23",
1054 "ch24";
1055 clocks = <&cpg CPG_MOD 812>;
1056 clock-names = "fck";
1057 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1058 resets = <&cpg 812>;
1059 phy-mode = "rgmii";
1060 rx-internal-delay-ps = <0>;
1061 tx-internal-delay-ps = <0>;
1062 iommus = <&ipmmu_ds0 16>;
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1065 status = "disabled";
1066 };
1067
1068 can0: can@e6c30000 {
1069 compatible = "renesas,can-r8a77965",
1070 "renesas,rcar-gen3-can";
1071 reg = <0 0xe6c30000 0 0x1000>;
1072 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1073 clocks = <&cpg CPG_MOD 916>,
1074 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1075 <&can_clk>;
1076 clock-names = "clkp1", "clkp2", "can_clk";
1077 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1078 assigned-clock-rates = <40000000>;
1079 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1080 resets = <&cpg 916>;
1081 status = "disabled";
1082 };
1083
1084 can1: can@e6c38000 {
1085 compatible = "renesas,can-r8a77965",
1086 "renesas,rcar-gen3-can";
1087 reg = <0 0xe6c38000 0 0x1000>;
1088 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1089 clocks = <&cpg CPG_MOD 915>,
1090 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1091 <&can_clk>;
1092 clock-names = "clkp1", "clkp2", "can_clk";
1093 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1094 assigned-clock-rates = <40000000>;
1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1096 resets = <&cpg 915>;
1097 status = "disabled";
1098 };
1099
1100 canfd: can@e66c0000 {
1101 compatible = "renesas,r8a77965-canfd",
1102 "renesas,rcar-gen3-canfd";
1103 reg = <0 0xe66c0000 0 0x8000>;
1104 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1105 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1106 interrupt-names = "ch_int", "g_int";
1107 clocks = <&cpg CPG_MOD 914>,
1108 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1109 <&can_clk>;
1110 clock-names = "fck", "canfd", "can_clk";
1111 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1112 assigned-clock-rates = <40000000>;
1113 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1114 resets = <&cpg 914>;
1115 status = "disabled";
1116
1117 channel0 {
1118 status = "disabled";
1119 };
1120
1121 channel1 {
1122 status = "disabled";
1123 };
1124 };
1125
1126 pwm0: pwm@e6e30000 {
1127 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1128 reg = <0 0xe6e30000 0 8>;
1129 #pwm-cells = <2>;
1130 clocks = <&cpg CPG_MOD 523>;
1131 resets = <&cpg 523>;
1132 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1133 status = "disabled";
1134 };
1135
1136 pwm1: pwm@e6e31000 {
1137 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1138 reg = <0 0xe6e31000 0 8>;
1139 #pwm-cells = <2>;
1140 clocks = <&cpg CPG_MOD 523>;
1141 resets = <&cpg 523>;
1142 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1143 status = "disabled";
1144 };
1145
1146 pwm2: pwm@e6e32000 {
1147 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1148 reg = <0 0xe6e32000 0 8>;
1149 #pwm-cells = <2>;
1150 clocks = <&cpg CPG_MOD 523>;
1151 resets = <&cpg 523>;
1152 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1153 status = "disabled";
1154 };
1155
1156 pwm3: pwm@e6e33000 {
1157 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1158 reg = <0 0xe6e33000 0 8>;
1159 #pwm-cells = <2>;
1160 clocks = <&cpg CPG_MOD 523>;
1161 resets = <&cpg 523>;
1162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1163 status = "disabled";
1164 };
1165
1166 pwm4: pwm@e6e34000 {
1167 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1168 reg = <0 0xe6e34000 0 8>;
1169 #pwm-cells = <2>;
1170 clocks = <&cpg CPG_MOD 523>;
1171 resets = <&cpg 523>;
1172 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1173 status = "disabled";
1174 };
1175
1176 pwm5: pwm@e6e35000 {
1177 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1178 reg = <0 0xe6e35000 0 8>;
1179 #pwm-cells = <2>;
1180 clocks = <&cpg CPG_MOD 523>;
1181 resets = <&cpg 523>;
1182 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1183 status = "disabled";
1184 };
1185
1186 pwm6: pwm@e6e36000 {
1187 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1188 reg = <0 0xe6e36000 0 8>;
1189 #pwm-cells = <2>;
1190 clocks = <&cpg CPG_MOD 523>;
1191 resets = <&cpg 523>;
1192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1193 status = "disabled";
1194 };
1195
1196 scif0: serial@e6e60000 {
1197 compatible = "renesas,scif-r8a77965",
1198 "renesas,rcar-gen3-scif", "renesas,scif";
1199 reg = <0 0xe6e60000 0 64>;
1200 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1201 clocks = <&cpg CPG_MOD 207>,
1202 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1203 <&scif_clk>;
1204 clock-names = "fck", "brg_int", "scif_clk";
1205 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1206 <&dmac2 0x51>, <&dmac2 0x50>;
1207 dma-names = "tx", "rx", "tx", "rx";
1208 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1209 resets = <&cpg 207>;
1210 status = "disabled";
1211 };
1212
1213 scif1: serial@e6e68000 {
1214 compatible = "renesas,scif-r8a77965",
1215 "renesas,rcar-gen3-scif", "renesas,scif";
1216 reg = <0 0xe6e68000 0 64>;
1217 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1218 clocks = <&cpg CPG_MOD 206>,
1219 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1220 <&scif_clk>;
1221 clock-names = "fck", "brg_int", "scif_clk";
1222 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1223 <&dmac2 0x53>, <&dmac2 0x52>;
1224 dma-names = "tx", "rx", "tx", "rx";
1225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1226 resets = <&cpg 206>;
1227 status = "disabled";
1228 };
1229
1230 scif2: serial@e6e88000 {
1231 compatible = "renesas,scif-r8a77965",
1232 "renesas,rcar-gen3-scif", "renesas,scif";
1233 reg = <0 0xe6e88000 0 64>;
1234 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1235 clocks = <&cpg CPG_MOD 310>,
1236 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1237 <&scif_clk>;
1238 clock-names = "fck", "brg_int", "scif_clk";
1239 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1240 <&dmac2 0x13>, <&dmac2 0x12>;
1241 dma-names = "tx", "rx", "tx", "rx";
1242 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1243 resets = <&cpg 310>;
1244 status = "disabled";
1245 };
1246
1247 scif3: serial@e6c50000 {
1248 compatible = "renesas,scif-r8a77965",
1249 "renesas,rcar-gen3-scif", "renesas,scif";
1250 reg = <0 0xe6c50000 0 64>;
1251 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1252 clocks = <&cpg CPG_MOD 204>,
1253 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1254 <&scif_clk>;
1255 clock-names = "fck", "brg_int", "scif_clk";
1256 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1257 dma-names = "tx", "rx";
1258 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1259 resets = <&cpg 204>;
1260 status = "disabled";
1261 };
1262
1263 scif4: serial@e6c40000 {
1264 compatible = "renesas,scif-r8a77965",
1265 "renesas,rcar-gen3-scif", "renesas,scif";
1266 reg = <0 0xe6c40000 0 64>;
1267 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1268 clocks = <&cpg CPG_MOD 203>,
1269 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1270 <&scif_clk>;
1271 clock-names = "fck", "brg_int", "scif_clk";
1272 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1273 dma-names = "tx", "rx";
1274 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1275 resets = <&cpg 203>;
1276 status = "disabled";
1277 };
1278
1279 scif5: serial@e6f30000 {
1280 compatible = "renesas,scif-r8a77965",
1281 "renesas,rcar-gen3-scif", "renesas,scif";
1282 reg = <0 0xe6f30000 0 64>;
1283 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1284 clocks = <&cpg CPG_MOD 202>,
1285 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1286 <&scif_clk>;
1287 clock-names = "fck", "brg_int", "scif_clk";
1288 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1289 <&dmac2 0x5b>, <&dmac2 0x5a>;
1290 dma-names = "tx", "rx", "tx", "rx";
1291 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1292 resets = <&cpg 202>;
1293 status = "disabled";
1294 };
1295
1296 tpu: pwm@e6e80000 {
1297 compatible = "renesas,tpu-r8a77965", "renesas,tpu";
1298 reg = <0 0xe6e80000 0 0x148>;
1299 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1300 clocks = <&cpg CPG_MOD 304>;
1301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1302 resets = <&cpg 304>;
1303 #pwm-cells = <3>;
1304 status = "disabled";
1305 };
1306
1307 msiof0: spi@e6e90000 {
1308 compatible = "renesas,msiof-r8a77965",
1309 "renesas,rcar-gen3-msiof";
1310 reg = <0 0xe6e90000 0 0x0064>;
1311 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1312 clocks = <&cpg CPG_MOD 211>;
1313 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1314 <&dmac2 0x41>, <&dmac2 0x40>;
1315 dma-names = "tx", "rx", "tx", "rx";
1316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1317 resets = <&cpg 211>;
1318 #address-cells = <1>;
1319 #size-cells = <0>;
1320 status = "disabled";
1321 };
1322
1323 msiof1: spi@e6ea0000 {
1324 compatible = "renesas,msiof-r8a77965",
1325 "renesas,rcar-gen3-msiof";
1326 reg = <0 0xe6ea0000 0 0x0064>;
1327 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1328 clocks = <&cpg CPG_MOD 210>;
1329 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1330 <&dmac2 0x43>, <&dmac2 0x42>;
1331 dma-names = "tx", "rx", "tx", "rx";
1332 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1333 resets = <&cpg 210>;
1334 #address-cells = <1>;
1335 #size-cells = <0>;
1336 status = "disabled";
1337 };
1338
1339 msiof2: spi@e6c00000 {
1340 compatible = "renesas,msiof-r8a77965",
1341 "renesas,rcar-gen3-msiof";
1342 reg = <0 0xe6c00000 0 0x0064>;
1343 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1344 clocks = <&cpg CPG_MOD 209>;
1345 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1346 dma-names = "tx", "rx";
1347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1348 resets = <&cpg 209>;
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1351 status = "disabled";
1352 };
1353
1354 msiof3: spi@e6c10000 {
1355 compatible = "renesas,msiof-r8a77965",
1356 "renesas,rcar-gen3-msiof";
1357 reg = <0 0xe6c10000 0 0x0064>;
1358 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1359 clocks = <&cpg CPG_MOD 208>;
1360 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1361 dma-names = "tx", "rx";
1362 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1363 resets = <&cpg 208>;
1364 #address-cells = <1>;
1365 #size-cells = <0>;
1366 status = "disabled";
1367 };
1368
1369 vin0: video@e6ef0000 {
1370 compatible = "renesas,vin-r8a77965";
1371 reg = <0 0xe6ef0000 0 0x1000>;
1372 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1373 clocks = <&cpg CPG_MOD 811>;
1374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1375 resets = <&cpg 811>;
1376 renesas,id = <0>;
1377 status = "disabled";
1378
1379 ports {
1380 #address-cells = <1>;
1381 #size-cells = <0>;
1382
1383 port@1 {
1384 #address-cells = <1>;
1385 #size-cells = <0>;
1386
1387 reg = <1>;
1388
1389 vin0csi20: endpoint@0 {
1390 reg = <0>;
1391 remote-endpoint = <&csi20vin0>;
1392 };
1393 vin0csi40: endpoint@2 {
1394 reg = <2>;
1395 remote-endpoint = <&csi40vin0>;
1396 };
1397 };
1398 };
1399 };
1400
1401 vin1: video@e6ef1000 {
1402 compatible = "renesas,vin-r8a77965";
1403 reg = <0 0xe6ef1000 0 0x1000>;
1404 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1405 clocks = <&cpg CPG_MOD 810>;
1406 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1407 resets = <&cpg 810>;
1408 renesas,id = <1>;
1409 status = "disabled";
1410
1411 ports {
1412 #address-cells = <1>;
1413 #size-cells = <0>;
1414
1415 port@1 {
1416 #address-cells = <1>;
1417 #size-cells = <0>;
1418
1419 reg = <1>;
1420
1421 vin1csi20: endpoint@0 {
1422 reg = <0>;
1423 remote-endpoint = <&csi20vin1>;
1424 };
1425 vin1csi40: endpoint@2 {
1426 reg = <2>;
1427 remote-endpoint = <&csi40vin1>;
1428 };
1429 };
1430 };
1431 };
1432
1433 vin2: video@e6ef2000 {
1434 compatible = "renesas,vin-r8a77965";
1435 reg = <0 0xe6ef2000 0 0x1000>;
1436 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1437 clocks = <&cpg CPG_MOD 809>;
1438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1439 resets = <&cpg 809>;
1440 renesas,id = <2>;
1441 status = "disabled";
1442
1443 ports {
1444 #address-cells = <1>;
1445 #size-cells = <0>;
1446
1447 port@1 {
1448 #address-cells = <1>;
1449 #size-cells = <0>;
1450
1451 reg = <1>;
1452
1453 vin2csi20: endpoint@0 {
1454 reg = <0>;
1455 remote-endpoint = <&csi20vin2>;
1456 };
1457 vin2csi40: endpoint@2 {
1458 reg = <2>;
1459 remote-endpoint = <&csi40vin2>;
1460 };
1461 };
1462 };
1463 };
1464
1465 vin3: video@e6ef3000 {
1466 compatible = "renesas,vin-r8a77965";
1467 reg = <0 0xe6ef3000 0 0x1000>;
1468 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1469 clocks = <&cpg CPG_MOD 808>;
1470 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1471 resets = <&cpg 808>;
1472 renesas,id = <3>;
1473 status = "disabled";
1474
1475 ports {
1476 #address-cells = <1>;
1477 #size-cells = <0>;
1478
1479 port@1 {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1482
1483 reg = <1>;
1484
1485 vin3csi20: endpoint@0 {
1486 reg = <0>;
1487 remote-endpoint = <&csi20vin3>;
1488 };
1489 vin3csi40: endpoint@2 {
1490 reg = <2>;
1491 remote-endpoint = <&csi40vin3>;
1492 };
1493 };
1494 };
1495 };
1496
1497 vin4: video@e6ef4000 {
1498 compatible = "renesas,vin-r8a77965";
1499 reg = <0 0xe6ef4000 0 0x1000>;
1500 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1501 clocks = <&cpg CPG_MOD 807>;
1502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1503 resets = <&cpg 807>;
1504 renesas,id = <4>;
1505 status = "disabled";
1506
1507 ports {
1508 #address-cells = <1>;
1509 #size-cells = <0>;
1510
1511 port@1 {
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1514
1515 reg = <1>;
1516
1517 vin4csi20: endpoint@0 {
1518 reg = <0>;
1519 remote-endpoint = <&csi20vin4>;
1520 };
1521 vin4csi40: endpoint@2 {
1522 reg = <2>;
1523 remote-endpoint = <&csi40vin4>;
1524 };
1525 };
1526 };
1527 };
1528
1529 vin5: video@e6ef5000 {
1530 compatible = "renesas,vin-r8a77965";
1531 reg = <0 0xe6ef5000 0 0x1000>;
1532 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1533 clocks = <&cpg CPG_MOD 806>;
1534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1535 resets = <&cpg 806>;
1536 renesas,id = <5>;
1537 status = "disabled";
1538
1539 ports {
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1542
1543 port@1 {
1544 #address-cells = <1>;
1545 #size-cells = <0>;
1546
1547 reg = <1>;
1548
1549 vin5csi20: endpoint@0 {
1550 reg = <0>;
1551 remote-endpoint = <&csi20vin5>;
1552 };
1553 vin5csi40: endpoint@2 {
1554 reg = <2>;
1555 remote-endpoint = <&csi40vin5>;
1556 };
1557 };
1558 };
1559 };
1560
1561 vin6: video@e6ef6000 {
1562 compatible = "renesas,vin-r8a77965";
1563 reg = <0 0xe6ef6000 0 0x1000>;
1564 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1565 clocks = <&cpg CPG_MOD 805>;
1566 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1567 resets = <&cpg 805>;
1568 renesas,id = <6>;
1569 status = "disabled";
1570
1571 ports {
1572 #address-cells = <1>;
1573 #size-cells = <0>;
1574
1575 port@1 {
1576 #address-cells = <1>;
1577 #size-cells = <0>;
1578
1579 reg = <1>;
1580
1581 vin6csi20: endpoint@0 {
1582 reg = <0>;
1583 remote-endpoint = <&csi20vin6>;
1584 };
1585 vin6csi40: endpoint@2 {
1586 reg = <2>;
1587 remote-endpoint = <&csi40vin6>;
1588 };
1589 };
1590 };
1591 };
1592
1593 vin7: video@e6ef7000 {
1594 compatible = "renesas,vin-r8a77965";
1595 reg = <0 0xe6ef7000 0 0x1000>;
1596 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1597 clocks = <&cpg CPG_MOD 804>;
1598 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1599 resets = <&cpg 804>;
1600 renesas,id = <7>;
1601 status = "disabled";
1602
1603 ports {
1604 #address-cells = <1>;
1605 #size-cells = <0>;
1606
1607 port@1 {
1608 #address-cells = <1>;
1609 #size-cells = <0>;
1610
1611 reg = <1>;
1612
1613 vin7csi20: endpoint@0 {
1614 reg = <0>;
1615 remote-endpoint = <&csi20vin7>;
1616 };
1617 vin7csi40: endpoint@2 {
1618 reg = <2>;
1619 remote-endpoint = <&csi40vin7>;
1620 };
1621 };
1622 };
1623 };
1624
1625 drif00: rif@e6f40000 {
1626 compatible = "renesas,r8a77965-drif",
1627 "renesas,rcar-gen3-drif";
1628 reg = <0 0xe6f40000 0 0x84>;
1629 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1630 clocks = <&cpg CPG_MOD 515>;
1631 clock-names = "fck";
1632 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1633 dma-names = "rx", "rx";
1634 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1635 resets = <&cpg 515>;
1636 renesas,bonding = <&drif01>;
1637 status = "disabled";
1638 };
1639
1640 drif01: rif@e6f50000 {
1641 compatible = "renesas,r8a77965-drif",
1642 "renesas,rcar-gen3-drif";
1643 reg = <0 0xe6f50000 0 0x84>;
1644 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1645 clocks = <&cpg CPG_MOD 514>;
1646 clock-names = "fck";
1647 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1648 dma-names = "rx", "rx";
1649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1650 resets = <&cpg 514>;
1651 renesas,bonding = <&drif00>;
1652 status = "disabled";
1653 };
1654
1655 drif10: rif@e6f60000 {
1656 compatible = "renesas,r8a77965-drif",
1657 "renesas,rcar-gen3-drif";
1658 reg = <0 0xe6f60000 0 0x84>;
1659 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1660 clocks = <&cpg CPG_MOD 513>;
1661 clock-names = "fck";
1662 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1663 dma-names = "rx", "rx";
1664 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1665 resets = <&cpg 513>;
1666 renesas,bonding = <&drif11>;
1667 status = "disabled";
1668 };
1669
1670 drif11: rif@e6f70000 {
1671 compatible = "renesas,r8a77965-drif",
1672 "renesas,rcar-gen3-drif";
1673 reg = <0 0xe6f70000 0 0x84>;
1674 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1675 clocks = <&cpg CPG_MOD 512>;
1676 clock-names = "fck";
1677 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1678 dma-names = "rx", "rx";
1679 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1680 resets = <&cpg 512>;
1681 renesas,bonding = <&drif10>;
1682 status = "disabled";
1683 };
1684
1685 drif20: rif@e6f80000 {
1686 compatible = "renesas,r8a77965-drif",
1687 "renesas,rcar-gen3-drif";
1688 reg = <0 0xe6f80000 0 0x84>;
1689 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1690 clocks = <&cpg CPG_MOD 511>;
1691 clock-names = "fck";
1692 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1693 dma-names = "rx", "rx";
1694 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1695 resets = <&cpg 511>;
1696 renesas,bonding = <&drif21>;
1697 status = "disabled";
1698 };
1699
1700 drif21: rif@e6f90000 {
1701 compatible = "renesas,r8a77965-drif",
1702 "renesas,rcar-gen3-drif";
1703 reg = <0 0xe6f90000 0 0x84>;
1704 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1705 clocks = <&cpg CPG_MOD 510>;
1706 clock-names = "fck";
1707 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1708 dma-names = "rx", "rx";
1709 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1710 resets = <&cpg 510>;
1711 renesas,bonding = <&drif20>;
1712 status = "disabled";
1713 };
1714
1715 drif30: rif@e6fa0000 {
1716 compatible = "renesas,r8a77965-drif",
1717 "renesas,rcar-gen3-drif";
1718 reg = <0 0xe6fa0000 0 0x84>;
1719 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1720 clocks = <&cpg CPG_MOD 509>;
1721 clock-names = "fck";
1722 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1723 dma-names = "rx", "rx";
1724 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1725 resets = <&cpg 509>;
1726 renesas,bonding = <&drif31>;
1727 status = "disabled";
1728 };
1729
1730 drif31: rif@e6fb0000 {
1731 compatible = "renesas,r8a77965-drif",
1732 "renesas,rcar-gen3-drif";
1733 reg = <0 0xe6fb0000 0 0x84>;
1734 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1735 clocks = <&cpg CPG_MOD 508>;
1736 clock-names = "fck";
1737 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1738 dma-names = "rx", "rx";
1739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1740 resets = <&cpg 508>;
1741 renesas,bonding = <&drif30>;
1742 status = "disabled";
1743 };
1744
1745 rcar_sound: sound@ec500000 {
1746 /*
1747 * #sound-dai-cells is required
1748 *
1749 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1750 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1751 */
1752 /*
1753 * #clock-cells is required for audio_clkout0/1/2/3
1754 *
1755 * clkout : #clock-cells = <0>; <&rcar_sound>;
1756 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1757 */
1758 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1759 reg = <0 0xec500000 0 0x1000>, /* SCU */
1760 <0 0xec5a0000 0 0x100>, /* ADG */
1761 <0 0xec540000 0 0x1000>, /* SSIU */
1762 <0 0xec541000 0 0x280>, /* SSI */
1763 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1764 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1765
1766 clocks = <&cpg CPG_MOD 1005>,
1767 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1768 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1769 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1770 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1771 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1772 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1773 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1774 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1775 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1776 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1777 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1778 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1779 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1780 <&audio_clk_a>, <&audio_clk_b>,
1781 <&audio_clk_c>,
1782 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1783 clock-names = "ssi-all",
1784 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1785 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1786 "ssi.1", "ssi.0",
1787 "src.9", "src.8", "src.7", "src.6",
1788 "src.5", "src.4", "src.3", "src.2",
1789 "src.1", "src.0",
1790 "mix.1", "mix.0",
1791 "ctu.1", "ctu.0",
1792 "dvc.0", "dvc.1",
1793 "clk_a", "clk_b", "clk_c", "clk_i";
1794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1795 resets = <&cpg 1005>,
1796 <&cpg 1006>, <&cpg 1007>,
1797 <&cpg 1008>, <&cpg 1009>,
1798 <&cpg 1010>, <&cpg 1011>,
1799 <&cpg 1012>, <&cpg 1013>,
1800 <&cpg 1014>, <&cpg 1015>;
1801 reset-names = "ssi-all",
1802 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1803 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1804 "ssi.1", "ssi.0";
1805 status = "disabled";
1806
1807 rcar_sound,dvc {
1808 dvc0: dvc-0 {
1809 dmas = <&audma1 0xbc>;
1810 dma-names = "tx";
1811 };
1812 dvc1: dvc-1 {
1813 dmas = <&audma1 0xbe>;
1814 dma-names = "tx";
1815 };
1816 };
1817
1818 rcar_sound,mix {
1819 mix0: mix-0 { };
1820 mix1: mix-1 { };
1821 };
1822
1823 rcar_sound,ctu {
1824 ctu00: ctu-0 { };
1825 ctu01: ctu-1 { };
1826 ctu02: ctu-2 { };
1827 ctu03: ctu-3 { };
1828 ctu10: ctu-4 { };
1829 ctu11: ctu-5 { };
1830 ctu12: ctu-6 { };
1831 ctu13: ctu-7 { };
1832 };
1833
1834 rcar_sound,src {
1835 src0: src-0 {
1836 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1837 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1838 dma-names = "rx", "tx";
1839 };
1840 src1: src-1 {
1841 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1842 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1843 dma-names = "rx", "tx";
1844 };
1845 src2: src-2 {
1846 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1847 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1848 dma-names = "rx", "tx";
1849 };
1850 src3: src-3 {
1851 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1852 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1853 dma-names = "rx", "tx";
1854 };
1855 src4: src-4 {
1856 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1857 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1858 dma-names = "rx", "tx";
1859 };
1860 src5: src-5 {
1861 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1862 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1863 dma-names = "rx", "tx";
1864 };
1865 src6: src-6 {
1866 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1867 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1868 dma-names = "rx", "tx";
1869 };
1870 src7: src-7 {
1871 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1872 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1873 dma-names = "rx", "tx";
1874 };
1875 src8: src-8 {
1876 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1877 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1878 dma-names = "rx", "tx";
1879 };
1880 src9: src-9 {
1881 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1882 dmas = <&audma0 0x97>, <&audma1 0xba>;
1883 dma-names = "rx", "tx";
1884 };
1885 };
1886
1887 rcar_sound,ssiu {
1888 ssiu00: ssiu-0 {
1889 dmas = <&audma0 0x15>, <&audma1 0x16>;
1890 dma-names = "rx", "tx";
1891 };
1892 ssiu01: ssiu-1 {
1893 dmas = <&audma0 0x35>, <&audma1 0x36>;
1894 dma-names = "rx", "tx";
1895 };
1896 ssiu02: ssiu-2 {
1897 dmas = <&audma0 0x37>, <&audma1 0x38>;
1898 dma-names = "rx", "tx";
1899 };
1900 ssiu03: ssiu-3 {
1901 dmas = <&audma0 0x47>, <&audma1 0x48>;
1902 dma-names = "rx", "tx";
1903 };
1904 ssiu04: ssiu-4 {
1905 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1906 dma-names = "rx", "tx";
1907 };
1908 ssiu05: ssiu-5 {
1909 dmas = <&audma0 0x43>, <&audma1 0x44>;
1910 dma-names = "rx", "tx";
1911 };
1912 ssiu06: ssiu-6 {
1913 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1914 dma-names = "rx", "tx";
1915 };
1916 ssiu07: ssiu-7 {
1917 dmas = <&audma0 0x53>, <&audma1 0x54>;
1918 dma-names = "rx", "tx";
1919 };
1920 ssiu10: ssiu-8 {
1921 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1922 dma-names = "rx", "tx";
1923 };
1924 ssiu11: ssiu-9 {
1925 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1926 dma-names = "rx", "tx";
1927 };
1928 ssiu12: ssiu-10 {
1929 dmas = <&audma0 0x57>, <&audma1 0x58>;
1930 dma-names = "rx", "tx";
1931 };
1932 ssiu13: ssiu-11 {
1933 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1934 dma-names = "rx", "tx";
1935 };
1936 ssiu14: ssiu-12 {
1937 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1938 dma-names = "rx", "tx";
1939 };
1940 ssiu15: ssiu-13 {
1941 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1942 dma-names = "rx", "tx";
1943 };
1944 ssiu16: ssiu-14 {
1945 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1946 dma-names = "rx", "tx";
1947 };
1948 ssiu17: ssiu-15 {
1949 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1950 dma-names = "rx", "tx";
1951 };
1952 ssiu20: ssiu-16 {
1953 dmas = <&audma0 0x63>, <&audma1 0x64>;
1954 dma-names = "rx", "tx";
1955 };
1956 ssiu21: ssiu-17 {
1957 dmas = <&audma0 0x67>, <&audma1 0x68>;
1958 dma-names = "rx", "tx";
1959 };
1960 ssiu22: ssiu-18 {
1961 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1962 dma-names = "rx", "tx";
1963 };
1964 ssiu23: ssiu-19 {
1965 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1966 dma-names = "rx", "tx";
1967 };
1968 ssiu24: ssiu-20 {
1969 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1970 dma-names = "rx", "tx";
1971 };
1972 ssiu25: ssiu-21 {
1973 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1974 dma-names = "rx", "tx";
1975 };
1976 ssiu26: ssiu-22 {
1977 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1978 dma-names = "rx", "tx";
1979 };
1980 ssiu27: ssiu-23 {
1981 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1982 dma-names = "rx", "tx";
1983 };
1984 ssiu30: ssiu-24 {
1985 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1986 dma-names = "rx", "tx";
1987 };
1988 ssiu31: ssiu-25 {
1989 dmas = <&audma0 0x21>, <&audma1 0x22>;
1990 dma-names = "rx", "tx";
1991 };
1992 ssiu32: ssiu-26 {
1993 dmas = <&audma0 0x23>, <&audma1 0x24>;
1994 dma-names = "rx", "tx";
1995 };
1996 ssiu33: ssiu-27 {
1997 dmas = <&audma0 0x25>, <&audma1 0x26>;
1998 dma-names = "rx", "tx";
1999 };
2000 ssiu34: ssiu-28 {
2001 dmas = <&audma0 0x27>, <&audma1 0x28>;
2002 dma-names = "rx", "tx";
2003 };
2004 ssiu35: ssiu-29 {
2005 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2006 dma-names = "rx", "tx";
2007 };
2008 ssiu36: ssiu-30 {
2009 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2010 dma-names = "rx", "tx";
2011 };
2012 ssiu37: ssiu-31 {
2013 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2014 dma-names = "rx", "tx";
2015 };
2016 ssiu40: ssiu-32 {
2017 dmas = <&audma0 0x71>, <&audma1 0x72>;
2018 dma-names = "rx", "tx";
2019 };
2020 ssiu41: ssiu-33 {
2021 dmas = <&audma0 0x17>, <&audma1 0x18>;
2022 dma-names = "rx", "tx";
2023 };
2024 ssiu42: ssiu-34 {
2025 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2026 dma-names = "rx", "tx";
2027 };
2028 ssiu43: ssiu-35 {
2029 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2030 dma-names = "rx", "tx";
2031 };
2032 ssiu44: ssiu-36 {
2033 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2034 dma-names = "rx", "tx";
2035 };
2036 ssiu45: ssiu-37 {
2037 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2038 dma-names = "rx", "tx";
2039 };
2040 ssiu46: ssiu-38 {
2041 dmas = <&audma0 0x31>, <&audma1 0x32>;
2042 dma-names = "rx", "tx";
2043 };
2044 ssiu47: ssiu-39 {
2045 dmas = <&audma0 0x33>, <&audma1 0x34>;
2046 dma-names = "rx", "tx";
2047 };
2048 ssiu50: ssiu-40 {
2049 dmas = <&audma0 0x73>, <&audma1 0x74>;
2050 dma-names = "rx", "tx";
2051 };
2052 ssiu60: ssiu-41 {
2053 dmas = <&audma0 0x75>, <&audma1 0x76>;
2054 dma-names = "rx", "tx";
2055 };
2056 ssiu70: ssiu-42 {
2057 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2058 dma-names = "rx", "tx";
2059 };
2060 ssiu80: ssiu-43 {
2061 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2062 dma-names = "rx", "tx";
2063 };
2064 ssiu90: ssiu-44 {
2065 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2066 dma-names = "rx", "tx";
2067 };
2068 ssiu91: ssiu-45 {
2069 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2070 dma-names = "rx", "tx";
2071 };
2072 ssiu92: ssiu-46 {
2073 dmas = <&audma0 0x81>, <&audma1 0x82>;
2074 dma-names = "rx", "tx";
2075 };
2076 ssiu93: ssiu-47 {
2077 dmas = <&audma0 0x83>, <&audma1 0x84>;
2078 dma-names = "rx", "tx";
2079 };
2080 ssiu94: ssiu-48 {
2081 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2082 dma-names = "rx", "tx";
2083 };
2084 ssiu95: ssiu-49 {
2085 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2086 dma-names = "rx", "tx";
2087 };
2088 ssiu96: ssiu-50 {
2089 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2090 dma-names = "rx", "tx";
2091 };
2092 ssiu97: ssiu-51 {
2093 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2094 dma-names = "rx", "tx";
2095 };
2096 };
2097
2098 rcar_sound,ssi {
2099 ssi0: ssi-0 {
2100 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2101 dmas = <&audma0 0x01>, <&audma1 0x02>;
2102 dma-names = "rx", "tx";
2103 };
2104 ssi1: ssi-1 {
2105 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2106 dmas = <&audma0 0x03>, <&audma1 0x04>;
2107 dma-names = "rx", "tx";
2108 };
2109 ssi2: ssi-2 {
2110 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2111 dmas = <&audma0 0x05>, <&audma1 0x06>;
2112 dma-names = "rx", "tx";
2113 };
2114 ssi3: ssi-3 {
2115 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2116 dmas = <&audma0 0x07>, <&audma1 0x08>;
2117 dma-names = "rx", "tx";
2118 };
2119 ssi4: ssi-4 {
2120 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2121 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2122 dma-names = "rx", "tx";
2123 };
2124 ssi5: ssi-5 {
2125 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2126 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2127 dma-names = "rx", "tx";
2128 };
2129 ssi6: ssi-6 {
2130 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2131 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2132 dma-names = "rx", "tx";
2133 };
2134 ssi7: ssi-7 {
2135 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2136 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2137 dma-names = "rx", "tx";
2138 };
2139 ssi8: ssi-8 {
2140 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2141 dmas = <&audma0 0x11>, <&audma1 0x12>;
2142 dma-names = "rx", "tx";
2143 };
2144 ssi9: ssi-9 {
2145 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2146 dmas = <&audma0 0x13>, <&audma1 0x14>;
2147 dma-names = "rx", "tx";
2148 };
2149 };
2150 };
2151
2152 mlp: mlp@ec520000 {
2153 compatible = "renesas,r8a77965-mlp",
2154 "renesas,rcar-gen3-mlp";
2155 reg = <0 0xec520000 0 0x800>;
2156 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2157 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2158 clocks = <&cpg CPG_MOD 802>;
2159 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2160 resets = <&cpg 802>;
2161 status = "disabled";
2162 };
2163
2164 audma0: dma-controller@ec700000 {
2165 compatible = "renesas,dmac-r8a77965",
2166 "renesas,rcar-dmac";
2167 reg = <0 0xec700000 0 0x10000>;
2168 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2169 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2170 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2171 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2172 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2173 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2174 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2175 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2176 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2177 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2178 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2179 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2180 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2181 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2182 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2183 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2184 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2185 interrupt-names = "error",
2186 "ch0", "ch1", "ch2", "ch3",
2187 "ch4", "ch5", "ch6", "ch7",
2188 "ch8", "ch9", "ch10", "ch11",
2189 "ch12", "ch13", "ch14", "ch15";
2190 clocks = <&cpg CPG_MOD 502>;
2191 clock-names = "fck";
2192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2193 resets = <&cpg 502>;
2194 #dma-cells = <1>;
2195 dma-channels = <16>;
2196 };
2197
2198 audma1: dma-controller@ec720000 {
2199 compatible = "renesas,dmac-r8a77965",
2200 "renesas,rcar-dmac";
2201 reg = <0 0xec720000 0 0x10000>;
2202 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2203 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2206 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2207 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2208 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2209 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2210 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2211 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2212 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2213 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2214 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2215 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2216 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2217 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2218 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2219 interrupt-names = "error",
2220 "ch0", "ch1", "ch2", "ch3",
2221 "ch4", "ch5", "ch6", "ch7",
2222 "ch8", "ch9", "ch10", "ch11",
2223 "ch12", "ch13", "ch14", "ch15";
2224 clocks = <&cpg CPG_MOD 501>;
2225 clock-names = "fck";
2226 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2227 resets = <&cpg 501>;
2228 #dma-cells = <1>;
2229 dma-channels = <16>;
2230 };
2231
2232 xhci0: usb@ee000000 {
2233 compatible = "renesas,xhci-r8a77965",
2234 "renesas,rcar-gen3-xhci";
2235 reg = <0 0xee000000 0 0xc00>;
2236 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2237 clocks = <&cpg CPG_MOD 328>;
2238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2239 resets = <&cpg 328>;
2240 status = "disabled";
2241 };
2242
2243 usb3_peri0: usb@ee020000 {
2244 compatible = "renesas,r8a77965-usb3-peri",
2245 "renesas,rcar-gen3-usb3-peri";
2246 reg = <0 0xee020000 0 0x400>;
2247 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2248 clocks = <&cpg CPG_MOD 328>;
2249 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2250 resets = <&cpg 328>;
2251 status = "disabled";
2252 };
2253
2254 ohci0: usb@ee080000 {
2255 compatible = "generic-ohci";
2256 reg = <0 0xee080000 0 0x100>;
2257 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2258 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2259 phys = <&usb2_phy0 1>;
2260 phy-names = "usb";
2261 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2262 resets = <&cpg 703>, <&cpg 704>;
2263 status = "disabled";
2264 };
2265
2266 ohci1: usb@ee0a0000 {
2267 compatible = "generic-ohci";
2268 reg = <0 0xee0a0000 0 0x100>;
2269 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2270 clocks = <&cpg CPG_MOD 702>;
2271 phys = <&usb2_phy1 1>;
2272 phy-names = "usb";
2273 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2274 resets = <&cpg 702>;
2275 status = "disabled";
2276 };
2277
2278 ehci0: usb@ee080100 {
2279 compatible = "generic-ehci";
2280 reg = <0 0xee080100 0 0x100>;
2281 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2282 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2283 phys = <&usb2_phy0 2>;
2284 phy-names = "usb";
2285 companion = <&ohci0>;
2286 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2287 resets = <&cpg 703>, <&cpg 704>;
2288 status = "disabled";
2289 };
2290
2291 ehci1: usb@ee0a0100 {
2292 compatible = "generic-ehci";
2293 reg = <0 0xee0a0100 0 0x100>;
2294 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2295 clocks = <&cpg CPG_MOD 702>;
2296 phys = <&usb2_phy1 2>;
2297 phy-names = "usb";
2298 companion = <&ohci1>;
2299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2300 resets = <&cpg 702>;
2301 status = "disabled";
2302 };
2303
2304 usb2_phy0: usb-phy@ee080200 {
2305 compatible = "renesas,usb2-phy-r8a77965",
2306 "renesas,rcar-gen3-usb2-phy";
2307 reg = <0 0xee080200 0 0x700>;
2308 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2309 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2311 resets = <&cpg 703>, <&cpg 704>;
2312 #phy-cells = <1>;
2313 status = "disabled";
2314 };
2315
2316 usb2_phy1: usb-phy@ee0a0200 {
2317 compatible = "renesas,usb2-phy-r8a77965",
2318 "renesas,rcar-gen3-usb2-phy";
2319 reg = <0 0xee0a0200 0 0x700>;
2320 clocks = <&cpg CPG_MOD 702>;
2321 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2322 resets = <&cpg 702>;
2323 #phy-cells = <1>;
2324 status = "disabled";
2325 };
2326
2327 sdhi0: mmc@ee100000 {
2328 compatible = "renesas,sdhi-r8a77965",
2329 "renesas,rcar-gen3-sdhi";
2330 reg = <0 0xee100000 0 0x2000>;
2331 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2332 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>;
2333 clock-names = "core", "clkh";
2334 max-frequency = <200000000>;
2335 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2336 resets = <&cpg 314>;
2337 iommus = <&ipmmu_ds1 32>;
2338 status = "disabled";
2339 };
2340
2341 sdhi1: mmc@ee120000 {
2342 compatible = "renesas,sdhi-r8a77965",
2343 "renesas,rcar-gen3-sdhi";
2344 reg = <0 0xee120000 0 0x2000>;
2345 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2346 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>;
2347 clock-names = "core", "clkh";
2348 max-frequency = <200000000>;
2349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2350 resets = <&cpg 313>;
2351 iommus = <&ipmmu_ds1 33>;
2352 status = "disabled";
2353 };
2354
2355 sdhi2: mmc@ee140000 {
2356 compatible = "renesas,sdhi-r8a77965",
2357 "renesas,rcar-gen3-sdhi";
2358 reg = <0 0xee140000 0 0x2000>;
2359 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2360 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>;
2361 clock-names = "core", "clkh";
2362 max-frequency = <200000000>;
2363 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2364 resets = <&cpg 312>;
2365 iommus = <&ipmmu_ds1 34>;
2366 status = "disabled";
2367 };
2368
2369 sdhi3: mmc@ee160000 {
2370 compatible = "renesas,sdhi-r8a77965",
2371 "renesas,rcar-gen3-sdhi";
2372 reg = <0 0xee160000 0 0x2000>;
2373 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2374 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>;
2375 clock-names = "core", "clkh";
2376 max-frequency = <200000000>;
2377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2378 resets = <&cpg 311>;
2379 iommus = <&ipmmu_ds1 35>;
2380 status = "disabled";
2381 };
2382
2383 rpc: spi@ee200000 {
2384 compatible = "renesas,r8a77965-rpc-if",
2385 "renesas,rcar-gen3-rpc-if";
2386 reg = <0 0xee200000 0 0x200>,
2387 <0 0x08000000 0 0x04000000>,
2388 <0 0xee208000 0 0x100>;
2389 reg-names = "regs", "dirmap", "wbuf";
2390 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2391 clocks = <&cpg CPG_MOD 917>;
2392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2393 resets = <&cpg 917>;
2394 #address-cells = <1>;
2395 #size-cells = <0>;
2396 status = "disabled";
2397 };
2398
2399 sata: sata@ee300000 {
2400 compatible = "renesas,sata-r8a77965",
2401 "renesas,rcar-gen3-sata";
2402 reg = <0 0xee300000 0 0x200000>;
2403 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2404 clocks = <&cpg CPG_MOD 815>;
2405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2406 resets = <&cpg 815>;
2407 status = "disabled";
2408 };
2409
2410 gic: interrupt-controller@f1010000 {
2411 compatible = "arm,gic-400";
2412 #interrupt-cells = <3>;
2413 #address-cells = <0>;
2414 interrupt-controller;
2415 reg = <0x0 0xf1010000 0 0x1000>,
2416 <0x0 0xf1020000 0 0x20000>,
2417 <0x0 0xf1040000 0 0x20000>,
2418 <0x0 0xf1060000 0 0x20000>;
2419 interrupts = <GIC_PPI 9
2420 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2421 clocks = <&cpg CPG_MOD 408>;
2422 clock-names = "clk";
2423 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2424 resets = <&cpg 408>;
2425 };
2426
2427 pciec0: pcie@fe000000 {
2428 compatible = "renesas,pcie-r8a77965",
2429 "renesas,pcie-rcar-gen3";
2430 reg = <0 0xfe000000 0 0x80000>;
2431 #address-cells = <3>;
2432 #size-cells = <2>;
2433 bus-range = <0x00 0xff>;
2434 device_type = "pci";
2435 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2436 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2437 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2438 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2439 /* Map all possible DDR as inbound ranges */
2440 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2441 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2442 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2443 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2444 #interrupt-cells = <1>;
2445 interrupt-map-mask = <0 0 0 0>;
2446 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2447 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2448 clock-names = "pcie", "pcie_bus";
2449 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2450 resets = <&cpg 319>;
2451 status = "disabled";
2452 };
2453
2454 pciec1: pcie@ee800000 {
2455 compatible = "renesas,pcie-r8a77965",
2456 "renesas,pcie-rcar-gen3";
2457 reg = <0 0xee800000 0 0x80000>;
2458 #address-cells = <3>;
2459 #size-cells = <2>;
2460 bus-range = <0x00 0xff>;
2461 device_type = "pci";
2462 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2463 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2464 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2465 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2466 /* Map all possible DDR as inbound ranges */
2467 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2468 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2469 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2470 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2471 #interrupt-cells = <1>;
2472 interrupt-map-mask = <0 0 0 0>;
2473 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2474 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2475 clock-names = "pcie", "pcie_bus";
2476 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2477 resets = <&cpg 318>;
2478 status = "disabled";
2479 };
2480
2481 fdp1@fe940000 {
2482 compatible = "renesas,fdp1";
2483 reg = <0 0xfe940000 0 0x2400>;
2484 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MOD 119>;
2486 power-domains = <&sysc R8A77965_PD_A3VP>;
2487 resets = <&cpg 119>;
2488 renesas,fcp = <&fcpf0>;
2489 };
2490
2491 fcpf0: fcp@fe950000 {
2492 compatible = "renesas,fcpf";
2493 reg = <0 0xfe950000 0 0x200>;
2494 clocks = <&cpg CPG_MOD 615>;
2495 power-domains = <&sysc R8A77965_PD_A3VP>;
2496 resets = <&cpg 615>;
2497 };
2498
2499 vspb: vsp@fe960000 {
2500 compatible = "renesas,vsp2";
2501 reg = <0 0xfe960000 0 0x8000>;
2502 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2503 clocks = <&cpg CPG_MOD 626>;
2504 power-domains = <&sysc R8A77965_PD_A3VP>;
2505 resets = <&cpg 626>;
2506
2507 renesas,fcp = <&fcpvb0>;
2508 };
2509
2510 vspi0: vsp@fe9a0000 {
2511 compatible = "renesas,vsp2";
2512 reg = <0 0xfe9a0000 0 0x8000>;
2513 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2514 clocks = <&cpg CPG_MOD 631>;
2515 power-domains = <&sysc R8A77965_PD_A3VP>;
2516 resets = <&cpg 631>;
2517
2518 renesas,fcp = <&fcpvi0>;
2519 };
2520
2521 vspd0: vsp@fea20000 {
2522 compatible = "renesas,vsp2";
2523 reg = <0 0xfea20000 0 0x5000>;
2524 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2525 clocks = <&cpg CPG_MOD 623>;
2526 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2527 resets = <&cpg 623>;
2528
2529 renesas,fcp = <&fcpvd0>;
2530 };
2531
2532 vspd1: vsp@fea28000 {
2533 compatible = "renesas,vsp2";
2534 reg = <0 0xfea28000 0 0x5000>;
2535 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2536 clocks = <&cpg CPG_MOD 622>;
2537 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2538 resets = <&cpg 622>;
2539
2540 renesas,fcp = <&fcpvd1>;
2541 };
2542
2543 fcpvb0: fcp@fe96f000 {
2544 compatible = "renesas,fcpv";
2545 reg = <0 0xfe96f000 0 0x200>;
2546 clocks = <&cpg CPG_MOD 607>;
2547 power-domains = <&sysc R8A77965_PD_A3VP>;
2548 resets = <&cpg 607>;
2549 };
2550
2551 fcpvd0: fcp@fea27000 {
2552 compatible = "renesas,fcpv";
2553 reg = <0 0xfea27000 0 0x200>;
2554 clocks = <&cpg CPG_MOD 603>;
2555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2556 resets = <&cpg 603>;
2557 };
2558
2559 fcpvd1: fcp@fea2f000 {
2560 compatible = "renesas,fcpv";
2561 reg = <0 0xfea2f000 0 0x200>;
2562 clocks = <&cpg CPG_MOD 602>;
2563 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2564 resets = <&cpg 602>;
2565 };
2566
2567 fcpvi0: fcp@fe9af000 {
2568 compatible = "renesas,fcpv";
2569 reg = <0 0xfe9af000 0 0x200>;
2570 clocks = <&cpg CPG_MOD 611>;
2571 power-domains = <&sysc R8A77965_PD_A3VP>;
2572 resets = <&cpg 611>;
2573 };
2574
2575 cmm0: cmm@fea40000 {
2576 compatible = "renesas,r8a77965-cmm",
2577 "renesas,rcar-gen3-cmm";
2578 reg = <0 0xfea40000 0 0x1000>;
2579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2580 clocks = <&cpg CPG_MOD 711>;
2581 resets = <&cpg 711>;
2582 };
2583
2584 cmm1: cmm@fea50000 {
2585 compatible = "renesas,r8a77965-cmm",
2586 "renesas,rcar-gen3-cmm";
2587 reg = <0 0xfea50000 0 0x1000>;
2588 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2589 clocks = <&cpg CPG_MOD 710>;
2590 resets = <&cpg 710>;
2591 };
2592
2593 cmm3: cmm@fea70000 {
2594 compatible = "renesas,r8a77965-cmm",
2595 "renesas,rcar-gen3-cmm";
2596 reg = <0 0xfea70000 0 0x1000>;
2597 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2598 clocks = <&cpg CPG_MOD 708>;
2599 resets = <&cpg 708>;
2600 };
2601
2602 csi20: csi2@fea80000 {
2603 compatible = "renesas,r8a77965-csi2";
2604 reg = <0 0xfea80000 0 0x10000>;
2605 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2606 clocks = <&cpg CPG_MOD 714>;
2607 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2608 resets = <&cpg 714>;
2609 status = "disabled";
2610
2611 ports {
2612 #address-cells = <1>;
2613 #size-cells = <0>;
2614
2615 port@0 {
2616 reg = <0>;
2617 };
2618
2619 port@1 {
2620 #address-cells = <1>;
2621 #size-cells = <0>;
2622
2623 reg = <1>;
2624
2625 csi20vin0: endpoint@0 {
2626 reg = <0>;
2627 remote-endpoint = <&vin0csi20>;
2628 };
2629 csi20vin1: endpoint@1 {
2630 reg = <1>;
2631 remote-endpoint = <&vin1csi20>;
2632 };
2633 csi20vin2: endpoint@2 {
2634 reg = <2>;
2635 remote-endpoint = <&vin2csi20>;
2636 };
2637 csi20vin3: endpoint@3 {
2638 reg = <3>;
2639 remote-endpoint = <&vin3csi20>;
2640 };
2641 csi20vin4: endpoint@4 {
2642 reg = <4>;
2643 remote-endpoint = <&vin4csi20>;
2644 };
2645 csi20vin5: endpoint@5 {
2646 reg = <5>;
2647 remote-endpoint = <&vin5csi20>;
2648 };
2649 csi20vin6: endpoint@6 {
2650 reg = <6>;
2651 remote-endpoint = <&vin6csi20>;
2652 };
2653 csi20vin7: endpoint@7 {
2654 reg = <7>;
2655 remote-endpoint = <&vin7csi20>;
2656 };
2657 };
2658 };
2659 };
2660
2661 csi40: csi2@feaa0000 {
2662 compatible = "renesas,r8a77965-csi2";
2663 reg = <0 0xfeaa0000 0 0x10000>;
2664 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2665 clocks = <&cpg CPG_MOD 716>;
2666 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2667 resets = <&cpg 716>;
2668 status = "disabled";
2669
2670 ports {
2671 #address-cells = <1>;
2672 #size-cells = <0>;
2673
2674 port@0 {
2675 reg = <0>;
2676 };
2677
2678 port@1 {
2679 #address-cells = <1>;
2680 #size-cells = <0>;
2681
2682 reg = <1>;
2683
2684 csi40vin0: endpoint@0 {
2685 reg = <0>;
2686 remote-endpoint = <&vin0csi40>;
2687 };
2688 csi40vin1: endpoint@1 {
2689 reg = <1>;
2690 remote-endpoint = <&vin1csi40>;
2691 };
2692 csi40vin2: endpoint@2 {
2693 reg = <2>;
2694 remote-endpoint = <&vin2csi40>;
2695 };
2696 csi40vin3: endpoint@3 {
2697 reg = <3>;
2698 remote-endpoint = <&vin3csi40>;
2699 };
2700 csi40vin4: endpoint@4 {
2701 reg = <4>;
2702 remote-endpoint = <&vin4csi40>;
2703 };
2704 csi40vin5: endpoint@5 {
2705 reg = <5>;
2706 remote-endpoint = <&vin5csi40>;
2707 };
2708 csi40vin6: endpoint@6 {
2709 reg = <6>;
2710 remote-endpoint = <&vin6csi40>;
2711 };
2712 csi40vin7: endpoint@7 {
2713 reg = <7>;
2714 remote-endpoint = <&vin7csi40>;
2715 };
2716 };
2717 };
2718 };
2719
2720 hdmi0: hdmi@fead0000 {
2721 compatible = "renesas,r8a77965-hdmi",
2722 "renesas,rcar-gen3-hdmi";
2723 reg = <0 0xfead0000 0 0x10000>;
2724 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2725 clocks = <&cpg CPG_MOD 729>,
2726 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2727 clock-names = "iahb", "isfr";
2728 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2729 resets = <&cpg 729>;
2730 status = "disabled";
2731
2732 ports {
2733 #address-cells = <1>;
2734 #size-cells = <0>;
2735 port@0 {
2736 reg = <0>;
2737 dw_hdmi0_in: endpoint {
2738 remote-endpoint = <&du_out_hdmi0>;
2739 };
2740 };
2741 port@1 {
2742 reg = <1>;
2743 };
2744 };
2745 };
2746
2747 du: display@feb00000 {
2748 compatible = "renesas,du-r8a77965";
2749 reg = <0 0xfeb00000 0 0x80000>;
2750 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2751 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2752 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2753 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2754 <&cpg CPG_MOD 721>;
2755 clock-names = "du.0", "du.1", "du.3";
2756 resets = <&cpg 724>, <&cpg 722>;
2757 reset-names = "du.0", "du.3";
2758
2759 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
2760 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2761
2762 status = "disabled";
2763
2764 ports {
2765 #address-cells = <1>;
2766 #size-cells = <0>;
2767
2768 port@0 {
2769 reg = <0>;
2770 };
2771 port@1 {
2772 reg = <1>;
2773 du_out_hdmi0: endpoint {
2774 remote-endpoint = <&dw_hdmi0_in>;
2775 };
2776 };
2777 port@2 {
2778 reg = <2>;
2779 du_out_lvds0: endpoint {
2780 remote-endpoint = <&lvds0_in>;
2781 };
2782 };
2783 };
2784 };
2785
2786 lvds0: lvds@feb90000 {
2787 compatible = "renesas,r8a77965-lvds";
2788 reg = <0 0xfeb90000 0 0x14>;
2789 clocks = <&cpg CPG_MOD 727>;
2790 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2791 resets = <&cpg 727>;
2792 status = "disabled";
2793
2794 ports {
2795 #address-cells = <1>;
2796 #size-cells = <0>;
2797
2798 port@0 {
2799 reg = <0>;
2800 lvds0_in: endpoint {
2801 remote-endpoint = <&du_out_lvds0>;
2802 };
2803 };
2804 port@1 {
2805 reg = <1>;
2806 };
2807 };
2808 };
2809
2810 prr: chipid@fff00044 {
2811 compatible = "renesas,prr";
2812 reg = <0 0xfff00044 0 4>;
2813 };
2814 };
2815
2816 thermal-zones {
2817 sensor1_thermal: sensor1-thermal {
2818 polling-delay-passive = <250>;
2819 polling-delay = <1000>;
2820 thermal-sensors = <&tsc 0>;
2821 sustainable-power = <2439>;
2822
2823 trips {
2824 sensor1_crit: sensor1-crit {
2825 temperature = <120000>;
2826 hysteresis = <1000>;
2827 type = "critical";
2828 };
2829 };
2830 };
2831
2832 sensor2_thermal: sensor2-thermal {
2833 polling-delay-passive = <250>;
2834 polling-delay = <1000>;
2835 thermal-sensors = <&tsc 1>;
2836 sustainable-power = <2439>;
2837
2838 trips {
2839 sensor2_crit: sensor2-crit {
2840 temperature = <120000>;
2841 hysteresis = <1000>;
2842 type = "critical";
2843 };
2844 };
2845 };
2846
2847 sensor3_thermal: sensor3-thermal {
2848 polling-delay-passive = <250>;
2849 polling-delay = <1000>;
2850 thermal-sensors = <&tsc 2>;
2851 sustainable-power = <2439>;
2852
2853 trips {
2854 target: trip-point1 {
2855 /* miliCelsius */
2856 temperature = <100000>;
2857 hysteresis = <1000>;
2858 type = "passive";
2859 };
2860
2861 sensor3_crit: sensor3-crit {
2862 temperature = <120000>;
2863 hysteresis = <1000>;
2864 type = "critical";
2865 };
2866 };
2867
2868 cooling-maps {
2869 map0 {
2870 trip = <&target>;
2871 cooling-device = <&a57_0 2 4>;
2872 contribution = <1024>;
2873 };
2874 };
2875 };
2876 };
2877
2878 timer {
2879 compatible = "arm,armv8-timer";
2880 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2881 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2882 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2883 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2884 };
2885
2886 /* External USB clocks - can be overridden by the board */
2887 usb3s0_clk: usb3s0 {
2888 compatible = "fixed-clock";
2889 #clock-cells = <0>;
2890 clock-frequency = <0>;
2891 };
2892
2893 usb_extal_clk: usb_extal {
2894 compatible = "fixed-clock";
2895 #clock-cells = <0>;
2896 clock-frequency = <0>;
2897 };
2898 };
