0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
0004 *
0005 * Copyright (C) 2016-2017 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/power/r8a7796-sysc.h>
0011
0012 #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4
0013
0014 / {
0015 compatible = "renesas,r8a7796";
0016 #address-cells = <2>;
0017 #size-cells = <2>;
0018
0019 aliases {
0020 i2c0 = &i2c0;
0021 i2c1 = &i2c1;
0022 i2c2 = &i2c2;
0023 i2c3 = &i2c3;
0024 i2c4 = &i2c4;
0025 i2c5 = &i2c5;
0026 i2c6 = &i2c6;
0027 i2c7 = &i2c_dvfs;
0028 };
0029
0030 /*
0031 * The external audio clocks are configured as 0 Hz fixed frequency
0032 * clocks by default.
0033 * Boards that provide audio clocks should override them.
0034 */
0035 audio_clk_a: audio_clk_a {
0036 compatible = "fixed-clock";
0037 #clock-cells = <0>;
0038 clock-frequency = <0>;
0039 };
0040
0041 audio_clk_b: audio_clk_b {
0042 compatible = "fixed-clock";
0043 #clock-cells = <0>;
0044 clock-frequency = <0>;
0045 };
0046
0047 audio_clk_c: audio_clk_c {
0048 compatible = "fixed-clock";
0049 #clock-cells = <0>;
0050 clock-frequency = <0>;
0051 };
0052
0053 /* External CAN clock - to be overridden by boards that provide it */
0054 can_clk: can {
0055 compatible = "fixed-clock";
0056 #clock-cells = <0>;
0057 clock-frequency = <0>;
0058 };
0059
0060 cluster0_opp: opp-table-0 {
0061 compatible = "operating-points-v2";
0062 opp-shared;
0063
0064 opp-500000000 {
0065 opp-hz = /bits/ 64 <500000000>;
0066 opp-microvolt = <830000>;
0067 clock-latency-ns = <300000>;
0068 };
0069 opp-1000000000 {
0070 opp-hz = /bits/ 64 <1000000000>;
0071 opp-microvolt = <830000>;
0072 clock-latency-ns = <300000>;
0073 };
0074 opp-1500000000 {
0075 opp-hz = /bits/ 64 <1500000000>;
0076 opp-microvolt = <830000>;
0077 clock-latency-ns = <300000>;
0078 opp-suspend;
0079 };
0080 opp-1600000000 {
0081 opp-hz = /bits/ 64 <1600000000>;
0082 opp-microvolt = <900000>;
0083 clock-latency-ns = <300000>;
0084 turbo-mode;
0085 };
0086 opp-1700000000 {
0087 opp-hz = /bits/ 64 <1700000000>;
0088 opp-microvolt = <900000>;
0089 clock-latency-ns = <300000>;
0090 turbo-mode;
0091 };
0092 opp-1800000000 {
0093 opp-hz = /bits/ 64 <1800000000>;
0094 opp-microvolt = <960000>;
0095 clock-latency-ns = <300000>;
0096 turbo-mode;
0097 };
0098 };
0099
0100 cluster1_opp: opp-table-1 {
0101 compatible = "operating-points-v2";
0102 opp-shared;
0103
0104 opp-800000000 {
0105 opp-hz = /bits/ 64 <800000000>;
0106 opp-microvolt = <820000>;
0107 clock-latency-ns = <300000>;
0108 };
0109 opp-1000000000 {
0110 opp-hz = /bits/ 64 <1000000000>;
0111 opp-microvolt = <820000>;
0112 clock-latency-ns = <300000>;
0113 };
0114 opp-1200000000 {
0115 opp-hz = /bits/ 64 <1200000000>;
0116 opp-microvolt = <820000>;
0117 clock-latency-ns = <300000>;
0118 };
0119 opp-1300000000 {
0120 opp-hz = /bits/ 64 <1300000000>;
0121 opp-microvolt = <820000>;
0122 clock-latency-ns = <300000>;
0123 turbo-mode;
0124 };
0125 };
0126
0127 cpus {
0128 #address-cells = <1>;
0129 #size-cells = <0>;
0130
0131 cpu-map {
0132 cluster0 {
0133 core0 {
0134 cpu = <&a57_0>;
0135 };
0136 core1 {
0137 cpu = <&a57_1>;
0138 };
0139 };
0140
0141 cluster1 {
0142 core0 {
0143 cpu = <&a53_0>;
0144 };
0145 core1 {
0146 cpu = <&a53_1>;
0147 };
0148 core2 {
0149 cpu = <&a53_2>;
0150 };
0151 core3 {
0152 cpu = <&a53_3>;
0153 };
0154 };
0155 };
0156
0157 a57_0: cpu@0 {
0158 compatible = "arm,cortex-a57";
0159 reg = <0x0>;
0160 device_type = "cpu";
0161 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
0162 next-level-cache = <&L2_CA57>;
0163 enable-method = "psci";
0164 cpu-idle-states = <&CPU_SLEEP_0>;
0165 dynamic-power-coefficient = <854>;
0166 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
0167 operating-points-v2 = <&cluster0_opp>;
0168 capacity-dmips-mhz = <1024>;
0169 #cooling-cells = <2>;
0170 };
0171
0172 a57_1: cpu@1 {
0173 compatible = "arm,cortex-a57";
0174 reg = <0x1>;
0175 device_type = "cpu";
0176 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
0177 next-level-cache = <&L2_CA57>;
0178 enable-method = "psci";
0179 cpu-idle-states = <&CPU_SLEEP_0>;
0180 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
0181 operating-points-v2 = <&cluster0_opp>;
0182 capacity-dmips-mhz = <1024>;
0183 #cooling-cells = <2>;
0184 };
0185
0186 a53_0: cpu@100 {
0187 compatible = "arm,cortex-a53";
0188 reg = <0x100>;
0189 device_type = "cpu";
0190 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
0191 next-level-cache = <&L2_CA53>;
0192 enable-method = "psci";
0193 cpu-idle-states = <&CPU_SLEEP_1>;
0194 #cooling-cells = <2>;
0195 dynamic-power-coefficient = <277>;
0196 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
0197 operating-points-v2 = <&cluster1_opp>;
0198 capacity-dmips-mhz = <535>;
0199 };
0200
0201 a53_1: cpu@101 {
0202 compatible = "arm,cortex-a53";
0203 reg = <0x101>;
0204 device_type = "cpu";
0205 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
0206 next-level-cache = <&L2_CA53>;
0207 enable-method = "psci";
0208 cpu-idle-states = <&CPU_SLEEP_1>;
0209 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
0210 operating-points-v2 = <&cluster1_opp>;
0211 capacity-dmips-mhz = <535>;
0212 };
0213
0214 a53_2: cpu@102 {
0215 compatible = "arm,cortex-a53";
0216 reg = <0x102>;
0217 device_type = "cpu";
0218 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
0219 next-level-cache = <&L2_CA53>;
0220 enable-method = "psci";
0221 cpu-idle-states = <&CPU_SLEEP_1>;
0222 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
0223 operating-points-v2 = <&cluster1_opp>;
0224 capacity-dmips-mhz = <535>;
0225 };
0226
0227 a53_3: cpu@103 {
0228 compatible = "arm,cortex-a53";
0229 reg = <0x103>;
0230 device_type = "cpu";
0231 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
0232 next-level-cache = <&L2_CA53>;
0233 enable-method = "psci";
0234 cpu-idle-states = <&CPU_SLEEP_1>;
0235 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
0236 operating-points-v2 = <&cluster1_opp>;
0237 capacity-dmips-mhz = <535>;
0238 };
0239
0240 L2_CA57: cache-controller-0 {
0241 compatible = "cache";
0242 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
0243 cache-unified;
0244 cache-level = <2>;
0245 };
0246
0247 L2_CA53: cache-controller-1 {
0248 compatible = "cache";
0249 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
0250 cache-unified;
0251 cache-level = <2>;
0252 };
0253
0254 idle-states {
0255 entry-method = "psci";
0256
0257 CPU_SLEEP_0: cpu-sleep-0 {
0258 compatible = "arm,idle-state";
0259 arm,psci-suspend-param = <0x0010000>;
0260 local-timer-stop;
0261 entry-latency-us = <400>;
0262 exit-latency-us = <500>;
0263 min-residency-us = <4000>;
0264 };
0265
0266 CPU_SLEEP_1: cpu-sleep-1 {
0267 compatible = "arm,idle-state";
0268 arm,psci-suspend-param = <0x0010000>;
0269 local-timer-stop;
0270 entry-latency-us = <700>;
0271 exit-latency-us = <700>;
0272 min-residency-us = <5000>;
0273 };
0274 };
0275 };
0276
0277 extal_clk: extal {
0278 compatible = "fixed-clock";
0279 #clock-cells = <0>;
0280 /* This value must be overridden by the board */
0281 clock-frequency = <0>;
0282 };
0283
0284 extalr_clk: extalr {
0285 compatible = "fixed-clock";
0286 #clock-cells = <0>;
0287 /* This value must be overridden by the board */
0288 clock-frequency = <0>;
0289 };
0290
0291 /* External PCIe clock - can be overridden by the board */
0292 pcie_bus_clk: pcie_bus {
0293 compatible = "fixed-clock";
0294 #clock-cells = <0>;
0295 clock-frequency = <0>;
0296 };
0297
0298 pmu_a53 {
0299 compatible = "arm,cortex-a53-pmu";
0300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0301 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
0302 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
0303 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
0305 };
0306
0307 pmu_a57 {
0308 compatible = "arm,cortex-a57-pmu";
0309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0310 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0311 interrupt-affinity = <&a57_0>, <&a57_1>;
0312 };
0313
0314 psci {
0315 compatible = "arm,psci-1.0", "arm,psci-0.2";
0316 method = "smc";
0317 };
0318
0319 /* External SCIF clock - to be overridden by boards that provide it */
0320 scif_clk: scif {
0321 compatible = "fixed-clock";
0322 #clock-cells = <0>;
0323 clock-frequency = <0>;
0324 };
0325
0326 soc {
0327 compatible = "simple-bus";
0328 interrupt-parent = <&gic>;
0329 #address-cells = <2>;
0330 #size-cells = <2>;
0331 ranges;
0332
0333 rwdt: watchdog@e6020000 {
0334 compatible = "renesas,r8a7796-wdt",
0335 "renesas,rcar-gen3-wdt";
0336 reg = <0 0xe6020000 0 0x0c>;
0337 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0338 clocks = <&cpg CPG_MOD 402>;
0339 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0340 resets = <&cpg 402>;
0341 status = "disabled";
0342 };
0343
0344 gpio0: gpio@e6050000 {
0345 compatible = "renesas,gpio-r8a7796",
0346 "renesas,rcar-gen3-gpio";
0347 reg = <0 0xe6050000 0 0x50>;
0348 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0349 #gpio-cells = <2>;
0350 gpio-controller;
0351 gpio-ranges = <&pfc 0 0 16>;
0352 #interrupt-cells = <2>;
0353 interrupt-controller;
0354 clocks = <&cpg CPG_MOD 912>;
0355 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0356 resets = <&cpg 912>;
0357 };
0358
0359 gpio1: gpio@e6051000 {
0360 compatible = "renesas,gpio-r8a7796",
0361 "renesas,rcar-gen3-gpio";
0362 reg = <0 0xe6051000 0 0x50>;
0363 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0364 #gpio-cells = <2>;
0365 gpio-controller;
0366 gpio-ranges = <&pfc 0 32 29>;
0367 #interrupt-cells = <2>;
0368 interrupt-controller;
0369 clocks = <&cpg CPG_MOD 911>;
0370 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0371 resets = <&cpg 911>;
0372 };
0373
0374 gpio2: gpio@e6052000 {
0375 compatible = "renesas,gpio-r8a7796",
0376 "renesas,rcar-gen3-gpio";
0377 reg = <0 0xe6052000 0 0x50>;
0378 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0379 #gpio-cells = <2>;
0380 gpio-controller;
0381 gpio-ranges = <&pfc 0 64 15>;
0382 #interrupt-cells = <2>;
0383 interrupt-controller;
0384 clocks = <&cpg CPG_MOD 910>;
0385 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0386 resets = <&cpg 910>;
0387 };
0388
0389 gpio3: gpio@e6053000 {
0390 compatible = "renesas,gpio-r8a7796",
0391 "renesas,rcar-gen3-gpio";
0392 reg = <0 0xe6053000 0 0x50>;
0393 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0394 #gpio-cells = <2>;
0395 gpio-controller;
0396 gpio-ranges = <&pfc 0 96 16>;
0397 #interrupt-cells = <2>;
0398 interrupt-controller;
0399 clocks = <&cpg CPG_MOD 909>;
0400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0401 resets = <&cpg 909>;
0402 };
0403
0404 gpio4: gpio@e6054000 {
0405 compatible = "renesas,gpio-r8a7796",
0406 "renesas,rcar-gen3-gpio";
0407 reg = <0 0xe6054000 0 0x50>;
0408 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0409 #gpio-cells = <2>;
0410 gpio-controller;
0411 gpio-ranges = <&pfc 0 128 18>;
0412 #interrupt-cells = <2>;
0413 interrupt-controller;
0414 clocks = <&cpg CPG_MOD 908>;
0415 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0416 resets = <&cpg 908>;
0417 };
0418
0419 gpio5: gpio@e6055000 {
0420 compatible = "renesas,gpio-r8a7796",
0421 "renesas,rcar-gen3-gpio";
0422 reg = <0 0xe6055000 0 0x50>;
0423 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0424 #gpio-cells = <2>;
0425 gpio-controller;
0426 gpio-ranges = <&pfc 0 160 26>;
0427 #interrupt-cells = <2>;
0428 interrupt-controller;
0429 clocks = <&cpg CPG_MOD 907>;
0430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0431 resets = <&cpg 907>;
0432 };
0433
0434 gpio6: gpio@e6055400 {
0435 compatible = "renesas,gpio-r8a7796",
0436 "renesas,rcar-gen3-gpio";
0437 reg = <0 0xe6055400 0 0x50>;
0438 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0439 #gpio-cells = <2>;
0440 gpio-controller;
0441 gpio-ranges = <&pfc 0 192 32>;
0442 #interrupt-cells = <2>;
0443 interrupt-controller;
0444 clocks = <&cpg CPG_MOD 906>;
0445 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0446 resets = <&cpg 906>;
0447 };
0448
0449 gpio7: gpio@e6055800 {
0450 compatible = "renesas,gpio-r8a7796",
0451 "renesas,rcar-gen3-gpio";
0452 reg = <0 0xe6055800 0 0x50>;
0453 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0454 #gpio-cells = <2>;
0455 gpio-controller;
0456 gpio-ranges = <&pfc 0 224 4>;
0457 #interrupt-cells = <2>;
0458 interrupt-controller;
0459 clocks = <&cpg CPG_MOD 905>;
0460 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0461 resets = <&cpg 905>;
0462 };
0463
0464 pfc: pinctrl@e6060000 {
0465 compatible = "renesas,pfc-r8a7796";
0466 reg = <0 0xe6060000 0 0x50c>;
0467 };
0468
0469 cmt0: timer@e60f0000 {
0470 compatible = "renesas,r8a7796-cmt0",
0471 "renesas,rcar-gen3-cmt0";
0472 reg = <0 0xe60f0000 0 0x1004>;
0473 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0474 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0475 clocks = <&cpg CPG_MOD 303>;
0476 clock-names = "fck";
0477 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0478 resets = <&cpg 303>;
0479 status = "disabled";
0480 };
0481
0482 cmt1: timer@e6130000 {
0483 compatible = "renesas,r8a7796-cmt1",
0484 "renesas,rcar-gen3-cmt1";
0485 reg = <0 0xe6130000 0 0x1004>;
0486 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0487 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0488 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0489 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0490 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0491 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0492 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0493 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0494 clocks = <&cpg CPG_MOD 302>;
0495 clock-names = "fck";
0496 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0497 resets = <&cpg 302>;
0498 status = "disabled";
0499 };
0500
0501 cmt2: timer@e6140000 {
0502 compatible = "renesas,r8a7796-cmt1",
0503 "renesas,rcar-gen3-cmt1";
0504 reg = <0 0xe6140000 0 0x1004>;
0505 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0506 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0507 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0508 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0509 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0510 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0511 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0512 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0513 clocks = <&cpg CPG_MOD 301>;
0514 clock-names = "fck";
0515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0516 resets = <&cpg 301>;
0517 status = "disabled";
0518 };
0519
0520 cmt3: timer@e6148000 {
0521 compatible = "renesas,r8a7796-cmt1",
0522 "renesas,rcar-gen3-cmt1";
0523 reg = <0 0xe6148000 0 0x1004>;
0524 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0525 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0526 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0527 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0528 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0529 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0530 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0531 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0532 clocks = <&cpg CPG_MOD 300>;
0533 clock-names = "fck";
0534 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0535 resets = <&cpg 300>;
0536 status = "disabled";
0537 };
0538
0539 cpg: clock-controller@e6150000 {
0540 compatible = "renesas,r8a7796-cpg-mssr";
0541 reg = <0 0xe6150000 0 0x1000>;
0542 clocks = <&extal_clk>, <&extalr_clk>;
0543 clock-names = "extal", "extalr";
0544 #clock-cells = <2>;
0545 #power-domain-cells = <0>;
0546 #reset-cells = <1>;
0547 };
0548
0549 rst: reset-controller@e6160000 {
0550 compatible = "renesas,r8a7796-rst";
0551 reg = <0 0xe6160000 0 0x0200>;
0552 };
0553
0554 sysc: system-controller@e6180000 {
0555 compatible = "renesas,r8a7796-sysc";
0556 reg = <0 0xe6180000 0 0x0400>;
0557 #power-domain-cells = <1>;
0558 };
0559
0560 tsc: thermal@e6198000 {
0561 compatible = "renesas,r8a7796-thermal";
0562 reg = <0 0xe6198000 0 0x100>,
0563 <0 0xe61a0000 0 0x100>,
0564 <0 0xe61a8000 0 0x100>;
0565 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0566 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0567 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0568 clocks = <&cpg CPG_MOD 522>;
0569 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0570 resets = <&cpg 522>;
0571 #thermal-sensor-cells = <1>;
0572 };
0573
0574 intc_ex: interrupt-controller@e61c0000 {
0575 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
0576 #interrupt-cells = <2>;
0577 interrupt-controller;
0578 reg = <0 0xe61c0000 0 0x200>;
0579 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0580 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0581 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0582 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0583 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0584 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0585 clocks = <&cpg CPG_MOD 407>;
0586 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0587 resets = <&cpg 407>;
0588 };
0589
0590 tmu0: timer@e61e0000 {
0591 compatible = "renesas,tmu-r8a7796", "renesas,tmu";
0592 reg = <0 0xe61e0000 0 0x30>;
0593 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0594 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0595 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0596 clocks = <&cpg CPG_MOD 125>;
0597 clock-names = "fck";
0598 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0599 resets = <&cpg 125>;
0600 status = "disabled";
0601 };
0602
0603 tmu1: timer@e6fc0000 {
0604 compatible = "renesas,tmu-r8a7796", "renesas,tmu";
0605 reg = <0 0xe6fc0000 0 0x30>;
0606 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0607 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0608 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0609 clocks = <&cpg CPG_MOD 124>;
0610 clock-names = "fck";
0611 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0612 resets = <&cpg 124>;
0613 status = "disabled";
0614 };
0615
0616 tmu2: timer@e6fd0000 {
0617 compatible = "renesas,tmu-r8a7796", "renesas,tmu";
0618 reg = <0 0xe6fd0000 0 0x30>;
0619 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0620 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0621 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0622 clocks = <&cpg CPG_MOD 123>;
0623 clock-names = "fck";
0624 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0625 resets = <&cpg 123>;
0626 status = "disabled";
0627 };
0628
0629 tmu3: timer@e6fe0000 {
0630 compatible = "renesas,tmu-r8a7796", "renesas,tmu";
0631 reg = <0 0xe6fe0000 0 0x30>;
0632 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0633 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0634 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0635 clocks = <&cpg CPG_MOD 122>;
0636 clock-names = "fck";
0637 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0638 resets = <&cpg 122>;
0639 status = "disabled";
0640 };
0641
0642 tmu4: timer@ffc00000 {
0643 compatible = "renesas,tmu-r8a7796", "renesas,tmu";
0644 reg = <0 0xffc00000 0 0x30>;
0645 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0646 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0647 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0648 clocks = <&cpg CPG_MOD 121>;
0649 clock-names = "fck";
0650 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0651 resets = <&cpg 121>;
0652 status = "disabled";
0653 };
0654
0655 i2c0: i2c@e6500000 {
0656 #address-cells = <1>;
0657 #size-cells = <0>;
0658 compatible = "renesas,i2c-r8a7796",
0659 "renesas,rcar-gen3-i2c";
0660 reg = <0 0xe6500000 0 0x40>;
0661 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0662 clocks = <&cpg CPG_MOD 931>;
0663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0664 resets = <&cpg 931>;
0665 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0666 <&dmac2 0x91>, <&dmac2 0x90>;
0667 dma-names = "tx", "rx", "tx", "rx";
0668 i2c-scl-internal-delay-ns = <110>;
0669 status = "disabled";
0670 };
0671
0672 i2c1: i2c@e6508000 {
0673 #address-cells = <1>;
0674 #size-cells = <0>;
0675 compatible = "renesas,i2c-r8a7796",
0676 "renesas,rcar-gen3-i2c";
0677 reg = <0 0xe6508000 0 0x40>;
0678 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0679 clocks = <&cpg CPG_MOD 930>;
0680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0681 resets = <&cpg 930>;
0682 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0683 <&dmac2 0x93>, <&dmac2 0x92>;
0684 dma-names = "tx", "rx", "tx", "rx";
0685 i2c-scl-internal-delay-ns = <6>;
0686 status = "disabled";
0687 };
0688
0689 i2c2: i2c@e6510000 {
0690 #address-cells = <1>;
0691 #size-cells = <0>;
0692 compatible = "renesas,i2c-r8a7796",
0693 "renesas,rcar-gen3-i2c";
0694 reg = <0 0xe6510000 0 0x40>;
0695 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0696 clocks = <&cpg CPG_MOD 929>;
0697 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0698 resets = <&cpg 929>;
0699 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0700 <&dmac2 0x95>, <&dmac2 0x94>;
0701 dma-names = "tx", "rx", "tx", "rx";
0702 i2c-scl-internal-delay-ns = <6>;
0703 status = "disabled";
0704 };
0705
0706 i2c3: i2c@e66d0000 {
0707 #address-cells = <1>;
0708 #size-cells = <0>;
0709 compatible = "renesas,i2c-r8a7796",
0710 "renesas,rcar-gen3-i2c";
0711 reg = <0 0xe66d0000 0 0x40>;
0712 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0713 clocks = <&cpg CPG_MOD 928>;
0714 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0715 resets = <&cpg 928>;
0716 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0717 dma-names = "tx", "rx";
0718 i2c-scl-internal-delay-ns = <110>;
0719 status = "disabled";
0720 };
0721
0722 i2c4: i2c@e66d8000 {
0723 #address-cells = <1>;
0724 #size-cells = <0>;
0725 compatible = "renesas,i2c-r8a7796",
0726 "renesas,rcar-gen3-i2c";
0727 reg = <0 0xe66d8000 0 0x40>;
0728 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0729 clocks = <&cpg CPG_MOD 927>;
0730 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0731 resets = <&cpg 927>;
0732 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
0733 dma-names = "tx", "rx";
0734 i2c-scl-internal-delay-ns = <110>;
0735 status = "disabled";
0736 };
0737
0738 i2c5: i2c@e66e0000 {
0739 #address-cells = <1>;
0740 #size-cells = <0>;
0741 compatible = "renesas,i2c-r8a7796",
0742 "renesas,rcar-gen3-i2c";
0743 reg = <0 0xe66e0000 0 0x40>;
0744 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0745 clocks = <&cpg CPG_MOD 919>;
0746 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0747 resets = <&cpg 919>;
0748 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
0749 dma-names = "tx", "rx";
0750 i2c-scl-internal-delay-ns = <110>;
0751 status = "disabled";
0752 };
0753
0754 i2c6: i2c@e66e8000 {
0755 #address-cells = <1>;
0756 #size-cells = <0>;
0757 compatible = "renesas,i2c-r8a7796",
0758 "renesas,rcar-gen3-i2c";
0759 reg = <0 0xe66e8000 0 0x40>;
0760 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0761 clocks = <&cpg CPG_MOD 918>;
0762 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0763 resets = <&cpg 918>;
0764 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
0765 dma-names = "tx", "rx";
0766 i2c-scl-internal-delay-ns = <6>;
0767 status = "disabled";
0768 };
0769
0770 i2c_dvfs: i2c@e60b0000 {
0771 #address-cells = <1>;
0772 #size-cells = <0>;
0773 compatible = "renesas,iic-r8a7796",
0774 "renesas,rcar-gen3-iic",
0775 "renesas,rmobile-iic";
0776 reg = <0 0xe60b0000 0 0x425>;
0777 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0778 clocks = <&cpg CPG_MOD 926>;
0779 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0780 resets = <&cpg 926>;
0781 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
0782 dma-names = "tx", "rx";
0783 status = "disabled";
0784 };
0785
0786 hscif0: serial@e6540000 {
0787 compatible = "renesas,hscif-r8a7796",
0788 "renesas,rcar-gen3-hscif",
0789 "renesas,hscif";
0790 reg = <0 0xe6540000 0 0x60>;
0791 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0792 clocks = <&cpg CPG_MOD 520>,
0793 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
0794 <&scif_clk>;
0795 clock-names = "fck", "brg_int", "scif_clk";
0796 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0797 <&dmac2 0x31>, <&dmac2 0x30>;
0798 dma-names = "tx", "rx", "tx", "rx";
0799 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0800 resets = <&cpg 520>;
0801 status = "disabled";
0802 };
0803
0804 hscif1: serial@e6550000 {
0805 compatible = "renesas,hscif-r8a7796",
0806 "renesas,rcar-gen3-hscif",
0807 "renesas,hscif";
0808 reg = <0 0xe6550000 0 0x60>;
0809 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0810 clocks = <&cpg CPG_MOD 519>,
0811 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
0812 <&scif_clk>;
0813 clock-names = "fck", "brg_int", "scif_clk";
0814 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0815 <&dmac2 0x33>, <&dmac2 0x32>;
0816 dma-names = "tx", "rx", "tx", "rx";
0817 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0818 resets = <&cpg 519>;
0819 status = "disabled";
0820 };
0821
0822 hscif2: serial@e6560000 {
0823 compatible = "renesas,hscif-r8a7796",
0824 "renesas,rcar-gen3-hscif",
0825 "renesas,hscif";
0826 reg = <0 0xe6560000 0 0x60>;
0827 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0828 clocks = <&cpg CPG_MOD 518>,
0829 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
0830 <&scif_clk>;
0831 clock-names = "fck", "brg_int", "scif_clk";
0832 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0833 <&dmac2 0x35>, <&dmac2 0x34>;
0834 dma-names = "tx", "rx", "tx", "rx";
0835 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0836 resets = <&cpg 518>;
0837 status = "disabled";
0838 };
0839
0840 hscif3: serial@e66a0000 {
0841 compatible = "renesas,hscif-r8a7796",
0842 "renesas,rcar-gen3-hscif",
0843 "renesas,hscif";
0844 reg = <0 0xe66a0000 0 0x60>;
0845 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0846 clocks = <&cpg CPG_MOD 517>,
0847 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
0848 <&scif_clk>;
0849 clock-names = "fck", "brg_int", "scif_clk";
0850 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0851 dma-names = "tx", "rx";
0852 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0853 resets = <&cpg 517>;
0854 status = "disabled";
0855 };
0856
0857 hscif4: serial@e66b0000 {
0858 compatible = "renesas,hscif-r8a7796",
0859 "renesas,rcar-gen3-hscif",
0860 "renesas,hscif";
0861 reg = <0 0xe66b0000 0 0x60>;
0862 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0863 clocks = <&cpg CPG_MOD 516>,
0864 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
0865 <&scif_clk>;
0866 clock-names = "fck", "brg_int", "scif_clk";
0867 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
0868 dma-names = "tx", "rx";
0869 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0870 resets = <&cpg 516>;
0871 status = "disabled";
0872 };
0873
0874 hsusb: usb@e6590000 {
0875 compatible = "renesas,usbhs-r8a7796",
0876 "renesas,rcar-gen3-usbhs";
0877 reg = <0 0xe6590000 0 0x200>;
0878 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0879 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0880 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0881 <&usb_dmac1 0>, <&usb_dmac1 1>;
0882 dma-names = "ch0", "ch1", "ch2", "ch3";
0883 renesas,buswait = <11>;
0884 phys = <&usb2_phy0 3>;
0885 phy-names = "usb";
0886 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0887 resets = <&cpg 704>, <&cpg 703>;
0888 status = "disabled";
0889 };
0890
0891 usb_dmac0: dma-controller@e65a0000 {
0892 compatible = "renesas,r8a7796-usb-dmac",
0893 "renesas,usb-dmac";
0894 reg = <0 0xe65a0000 0 0x100>;
0895 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0896 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0897 interrupt-names = "ch0", "ch1";
0898 clocks = <&cpg CPG_MOD 330>;
0899 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0900 resets = <&cpg 330>;
0901 #dma-cells = <1>;
0902 dma-channels = <2>;
0903 };
0904
0905 usb_dmac1: dma-controller@e65b0000 {
0906 compatible = "renesas,r8a7796-usb-dmac",
0907 "renesas,usb-dmac";
0908 reg = <0 0xe65b0000 0 0x100>;
0909 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0910 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0911 interrupt-names = "ch0", "ch1";
0912 clocks = <&cpg CPG_MOD 331>;
0913 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0914 resets = <&cpg 331>;
0915 #dma-cells = <1>;
0916 dma-channels = <2>;
0917 };
0918
0919 usb3_phy0: usb-phy@e65ee000 {
0920 compatible = "renesas,r8a7796-usb3-phy",
0921 "renesas,rcar-gen3-usb3-phy";
0922 reg = <0 0xe65ee000 0 0x90>;
0923 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
0924 <&usb_extal_clk>;
0925 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
0926 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0927 resets = <&cpg 328>;
0928 #phy-cells = <0>;
0929 status = "disabled";
0930 };
0931
0932 arm_cc630p: crypto@e6601000 {
0933 compatible = "arm,cryptocell-630p-ree";
0934 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
0935 reg = <0x0 0xe6601000 0 0x1000>;
0936 clocks = <&cpg CPG_MOD 229>;
0937 resets = <&cpg 229>;
0938 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0939 };
0940
0941 dmac0: dma-controller@e6700000 {
0942 compatible = "renesas,dmac-r8a7796",
0943 "renesas,rcar-dmac";
0944 reg = <0 0xe6700000 0 0x10000>;
0945 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0946 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0947 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0948 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0949 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0950 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0951 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0952 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0953 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0954 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0955 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0956 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0957 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0958 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0959 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0960 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
0961 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0962 interrupt-names = "error",
0963 "ch0", "ch1", "ch2", "ch3",
0964 "ch4", "ch5", "ch6", "ch7",
0965 "ch8", "ch9", "ch10", "ch11",
0966 "ch12", "ch13", "ch14", "ch15";
0967 clocks = <&cpg CPG_MOD 219>;
0968 clock-names = "fck";
0969 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
0970 resets = <&cpg 219>;
0971 #dma-cells = <1>;
0972 dma-channels = <16>;
0973 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0974 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0975 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0976 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
0977 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
0978 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
0979 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
0980 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
0981 };
0982
0983 dmac1: dma-controller@e7300000 {
0984 compatible = "renesas,dmac-r8a7796",
0985 "renesas,rcar-dmac";
0986 reg = <0 0xe7300000 0 0x10000>;
0987 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0988 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0989 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0990 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0991 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0992 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0993 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0994 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0995 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0996 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0997 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0998 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0999 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1000 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1001 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1002 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1003 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1004 interrupt-names = "error",
1005 "ch0", "ch1", "ch2", "ch3",
1006 "ch4", "ch5", "ch6", "ch7",
1007 "ch8", "ch9", "ch10", "ch11",
1008 "ch12", "ch13", "ch14", "ch15";
1009 clocks = <&cpg CPG_MOD 218>;
1010 clock-names = "fck";
1011 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1012 resets = <&cpg 218>;
1013 #dma-cells = <1>;
1014 dma-channels = <16>;
1015 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1016 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1017 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1018 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1019 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1020 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1021 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1022 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1023 };
1024
1025 dmac2: dma-controller@e7310000 {
1026 compatible = "renesas,dmac-r8a7796",
1027 "renesas,rcar-dmac";
1028 reg = <0 0xe7310000 0 0x10000>;
1029 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1030 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1031 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1032 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1033 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1034 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1035 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1036 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1037 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1040 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1041 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1042 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1043 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1046 interrupt-names = "error",
1047 "ch0", "ch1", "ch2", "ch3",
1048 "ch4", "ch5", "ch6", "ch7",
1049 "ch8", "ch9", "ch10", "ch11",
1050 "ch12", "ch13", "ch14", "ch15";
1051 clocks = <&cpg CPG_MOD 217>;
1052 clock-names = "fck";
1053 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1054 resets = <&cpg 217>;
1055 #dma-cells = <1>;
1056 dma-channels = <16>;
1057 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1058 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1059 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1060 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1061 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1062 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1063 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1064 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1065 };
1066
1067 ipmmu_ds0: iommu@e6740000 {
1068 compatible = "renesas,ipmmu-r8a7796";
1069 reg = <0 0xe6740000 0 0x1000>;
1070 renesas,ipmmu-main = <&ipmmu_mm 0>;
1071 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1072 #iommu-cells = <1>;
1073 };
1074
1075 ipmmu_ds1: iommu@e7740000 {
1076 compatible = "renesas,ipmmu-r8a7796";
1077 reg = <0 0xe7740000 0 0x1000>;
1078 renesas,ipmmu-main = <&ipmmu_mm 1>;
1079 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1080 #iommu-cells = <1>;
1081 };
1082
1083 ipmmu_hc: iommu@e6570000 {
1084 compatible = "renesas,ipmmu-r8a7796";
1085 reg = <0 0xe6570000 0 0x1000>;
1086 renesas,ipmmu-main = <&ipmmu_mm 2>;
1087 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1088 #iommu-cells = <1>;
1089 };
1090
1091 ipmmu_ir: iommu@ff8b0000 {
1092 compatible = "renesas,ipmmu-r8a7796";
1093 reg = <0 0xff8b0000 0 0x1000>;
1094 renesas,ipmmu-main = <&ipmmu_mm 3>;
1095 power-domains = <&sysc R8A7796_PD_A3IR>;
1096 #iommu-cells = <1>;
1097 };
1098
1099 ipmmu_mm: iommu@e67b0000 {
1100 compatible = "renesas,ipmmu-r8a7796";
1101 reg = <0 0xe67b0000 0 0x1000>;
1102 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1103 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1104 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1105 #iommu-cells = <1>;
1106 };
1107
1108 ipmmu_mp: iommu@ec670000 {
1109 compatible = "renesas,ipmmu-r8a7796";
1110 reg = <0 0xec670000 0 0x1000>;
1111 renesas,ipmmu-main = <&ipmmu_mm 4>;
1112 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1113 #iommu-cells = <1>;
1114 };
1115
1116 ipmmu_pv0: iommu@fd800000 {
1117 compatible = "renesas,ipmmu-r8a7796";
1118 reg = <0 0xfd800000 0 0x1000>;
1119 renesas,ipmmu-main = <&ipmmu_mm 5>;
1120 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1121 #iommu-cells = <1>;
1122 };
1123
1124 ipmmu_pv1: iommu@fd950000 {
1125 compatible = "renesas,ipmmu-r8a7796";
1126 reg = <0 0xfd950000 0 0x1000>;
1127 renesas,ipmmu-main = <&ipmmu_mm 6>;
1128 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1129 #iommu-cells = <1>;
1130 };
1131
1132 ipmmu_rt: iommu@ffc80000 {
1133 compatible = "renesas,ipmmu-r8a7796";
1134 reg = <0 0xffc80000 0 0x1000>;
1135 renesas,ipmmu-main = <&ipmmu_mm 7>;
1136 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1137 #iommu-cells = <1>;
1138 };
1139
1140 ipmmu_vc0: iommu@fe6b0000 {
1141 compatible = "renesas,ipmmu-r8a7796";
1142 reg = <0 0xfe6b0000 0 0x1000>;
1143 renesas,ipmmu-main = <&ipmmu_mm 8>;
1144 power-domains = <&sysc R8A7796_PD_A3VC>;
1145 #iommu-cells = <1>;
1146 };
1147
1148 ipmmu_vi0: iommu@febd0000 {
1149 compatible = "renesas,ipmmu-r8a7796";
1150 reg = <0 0xfebd0000 0 0x1000>;
1151 renesas,ipmmu-main = <&ipmmu_mm 9>;
1152 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1153 #iommu-cells = <1>;
1154 };
1155
1156 avb: ethernet@e6800000 {
1157 compatible = "renesas,etheravb-r8a7796",
1158 "renesas,etheravb-rcar-gen3";
1159 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1160 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1161 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1162 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1163 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1164 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1165 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1166 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1167 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1168 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1169 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1170 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1171 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1172 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1173 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1174 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1175 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1176 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1177 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1178 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1179 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1180 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1181 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1182 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1183 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1184 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1185 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1186 "ch4", "ch5", "ch6", "ch7",
1187 "ch8", "ch9", "ch10", "ch11",
1188 "ch12", "ch13", "ch14", "ch15",
1189 "ch16", "ch17", "ch18", "ch19",
1190 "ch20", "ch21", "ch22", "ch23",
1191 "ch24";
1192 clocks = <&cpg CPG_MOD 812>;
1193 clock-names = "fck";
1194 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1195 resets = <&cpg 812>;
1196 phy-mode = "rgmii";
1197 rx-internal-delay-ps = <0>;
1198 tx-internal-delay-ps = <0>;
1199 iommus = <&ipmmu_ds0 16>;
1200 #address-cells = <1>;
1201 #size-cells = <0>;
1202 status = "disabled";
1203 };
1204
1205 can0: can@e6c30000 {
1206 compatible = "renesas,can-r8a7796",
1207 "renesas,rcar-gen3-can";
1208 reg = <0 0xe6c30000 0 0x1000>;
1209 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1210 clocks = <&cpg CPG_MOD 916>,
1211 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1212 <&can_clk>;
1213 clock-names = "clkp1", "clkp2", "can_clk";
1214 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1215 assigned-clock-rates = <40000000>;
1216 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1217 resets = <&cpg 916>;
1218 status = "disabled";
1219 };
1220
1221 can1: can@e6c38000 {
1222 compatible = "renesas,can-r8a7796",
1223 "renesas,rcar-gen3-can";
1224 reg = <0 0xe6c38000 0 0x1000>;
1225 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1226 clocks = <&cpg CPG_MOD 915>,
1227 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1228 <&can_clk>;
1229 clock-names = "clkp1", "clkp2", "can_clk";
1230 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1231 assigned-clock-rates = <40000000>;
1232 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1233 resets = <&cpg 915>;
1234 status = "disabled";
1235 };
1236
1237 canfd: can@e66c0000 {
1238 compatible = "renesas,r8a7796-canfd",
1239 "renesas,rcar-gen3-canfd";
1240 reg = <0 0xe66c0000 0 0x8000>;
1241 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1242 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1243 interrupt-names = "ch_int", "g_int";
1244 clocks = <&cpg CPG_MOD 914>,
1245 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1246 <&can_clk>;
1247 clock-names = "fck", "canfd", "can_clk";
1248 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1249 assigned-clock-rates = <40000000>;
1250 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1251 resets = <&cpg 914>;
1252 status = "disabled";
1253
1254 channel0 {
1255 status = "disabled";
1256 };
1257
1258 channel1 {
1259 status = "disabled";
1260 };
1261 };
1262
1263 pwm0: pwm@e6e30000 {
1264 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1265 reg = <0 0xe6e30000 0 8>;
1266 #pwm-cells = <2>;
1267 clocks = <&cpg CPG_MOD 523>;
1268 resets = <&cpg 523>;
1269 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1270 status = "disabled";
1271 };
1272
1273 pwm1: pwm@e6e31000 {
1274 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1275 reg = <0 0xe6e31000 0 8>;
1276 #pwm-cells = <2>;
1277 clocks = <&cpg CPG_MOD 523>;
1278 resets = <&cpg 523>;
1279 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1280 status = "disabled";
1281 };
1282
1283 pwm2: pwm@e6e32000 {
1284 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1285 reg = <0 0xe6e32000 0 8>;
1286 #pwm-cells = <2>;
1287 clocks = <&cpg CPG_MOD 523>;
1288 resets = <&cpg 523>;
1289 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1290 status = "disabled";
1291 };
1292
1293 pwm3: pwm@e6e33000 {
1294 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1295 reg = <0 0xe6e33000 0 8>;
1296 #pwm-cells = <2>;
1297 clocks = <&cpg CPG_MOD 523>;
1298 resets = <&cpg 523>;
1299 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1300 status = "disabled";
1301 };
1302
1303 pwm4: pwm@e6e34000 {
1304 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1305 reg = <0 0xe6e34000 0 8>;
1306 #pwm-cells = <2>;
1307 clocks = <&cpg CPG_MOD 523>;
1308 resets = <&cpg 523>;
1309 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1310 status = "disabled";
1311 };
1312
1313 pwm5: pwm@e6e35000 {
1314 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1315 reg = <0 0xe6e35000 0 8>;
1316 #pwm-cells = <2>;
1317 clocks = <&cpg CPG_MOD 523>;
1318 resets = <&cpg 523>;
1319 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1320 status = "disabled";
1321 };
1322
1323 pwm6: pwm@e6e36000 {
1324 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1325 reg = <0 0xe6e36000 0 8>;
1326 #pwm-cells = <2>;
1327 clocks = <&cpg CPG_MOD 523>;
1328 resets = <&cpg 523>;
1329 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1330 status = "disabled";
1331 };
1332
1333 scif0: serial@e6e60000 {
1334 compatible = "renesas,scif-r8a7796",
1335 "renesas,rcar-gen3-scif", "renesas,scif";
1336 reg = <0 0xe6e60000 0 64>;
1337 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1338 clocks = <&cpg CPG_MOD 207>,
1339 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1340 <&scif_clk>;
1341 clock-names = "fck", "brg_int", "scif_clk";
1342 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1343 <&dmac2 0x51>, <&dmac2 0x50>;
1344 dma-names = "tx", "rx", "tx", "rx";
1345 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1346 resets = <&cpg 207>;
1347 status = "disabled";
1348 };
1349
1350 scif1: serial@e6e68000 {
1351 compatible = "renesas,scif-r8a7796",
1352 "renesas,rcar-gen3-scif", "renesas,scif";
1353 reg = <0 0xe6e68000 0 64>;
1354 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1355 clocks = <&cpg CPG_MOD 206>,
1356 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1357 <&scif_clk>;
1358 clock-names = "fck", "brg_int", "scif_clk";
1359 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1360 <&dmac2 0x53>, <&dmac2 0x52>;
1361 dma-names = "tx", "rx", "tx", "rx";
1362 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1363 resets = <&cpg 206>;
1364 status = "disabled";
1365 };
1366
1367 scif2: serial@e6e88000 {
1368 compatible = "renesas,scif-r8a7796",
1369 "renesas,rcar-gen3-scif", "renesas,scif";
1370 reg = <0 0xe6e88000 0 64>;
1371 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1372 clocks = <&cpg CPG_MOD 310>,
1373 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1374 <&scif_clk>;
1375 clock-names = "fck", "brg_int", "scif_clk";
1376 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1377 <&dmac2 0x13>, <&dmac2 0x12>;
1378 dma-names = "tx", "rx", "tx", "rx";
1379 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1380 resets = <&cpg 310>;
1381 status = "disabled";
1382 };
1383
1384 scif3: serial@e6c50000 {
1385 compatible = "renesas,scif-r8a7796",
1386 "renesas,rcar-gen3-scif", "renesas,scif";
1387 reg = <0 0xe6c50000 0 64>;
1388 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MOD 204>,
1390 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1391 <&scif_clk>;
1392 clock-names = "fck", "brg_int", "scif_clk";
1393 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1394 dma-names = "tx", "rx";
1395 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1396 resets = <&cpg 204>;
1397 status = "disabled";
1398 };
1399
1400 scif4: serial@e6c40000 {
1401 compatible = "renesas,scif-r8a7796",
1402 "renesas,rcar-gen3-scif", "renesas,scif";
1403 reg = <0 0xe6c40000 0 64>;
1404 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1405 clocks = <&cpg CPG_MOD 203>,
1406 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1407 <&scif_clk>;
1408 clock-names = "fck", "brg_int", "scif_clk";
1409 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1410 dma-names = "tx", "rx";
1411 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1412 resets = <&cpg 203>;
1413 status = "disabled";
1414 };
1415
1416 scif5: serial@e6f30000 {
1417 compatible = "renesas,scif-r8a7796",
1418 "renesas,rcar-gen3-scif", "renesas,scif";
1419 reg = <0 0xe6f30000 0 64>;
1420 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1421 clocks = <&cpg CPG_MOD 202>,
1422 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1423 <&scif_clk>;
1424 clock-names = "fck", "brg_int", "scif_clk";
1425 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1426 <&dmac2 0x5b>, <&dmac2 0x5a>;
1427 dma-names = "tx", "rx", "tx", "rx";
1428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1429 resets = <&cpg 202>;
1430 status = "disabled";
1431 };
1432
1433 tpu: pwm@e6e80000 {
1434 compatible = "renesas,tpu-r8a7796", "renesas,tpu";
1435 reg = <0 0xe6e80000 0 0x148>;
1436 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1437 clocks = <&cpg CPG_MOD 304>;
1438 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1439 resets = <&cpg 304>;
1440 #pwm-cells = <3>;
1441 status = "disabled";
1442 };
1443
1444 msiof0: spi@e6e90000 {
1445 compatible = "renesas,msiof-r8a7796",
1446 "renesas,rcar-gen3-msiof";
1447 reg = <0 0xe6e90000 0 0x0064>;
1448 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1449 clocks = <&cpg CPG_MOD 211>;
1450 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1451 <&dmac2 0x41>, <&dmac2 0x40>;
1452 dma-names = "tx", "rx", "tx", "rx";
1453 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1454 resets = <&cpg 211>;
1455 #address-cells = <1>;
1456 #size-cells = <0>;
1457 status = "disabled";
1458 };
1459
1460 msiof1: spi@e6ea0000 {
1461 compatible = "renesas,msiof-r8a7796",
1462 "renesas,rcar-gen3-msiof";
1463 reg = <0 0xe6ea0000 0 0x0064>;
1464 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1465 clocks = <&cpg CPG_MOD 210>;
1466 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1467 <&dmac2 0x43>, <&dmac2 0x42>;
1468 dma-names = "tx", "rx", "tx", "rx";
1469 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1470 resets = <&cpg 210>;
1471 #address-cells = <1>;
1472 #size-cells = <0>;
1473 status = "disabled";
1474 };
1475
1476 msiof2: spi@e6c00000 {
1477 compatible = "renesas,msiof-r8a7796",
1478 "renesas,rcar-gen3-msiof";
1479 reg = <0 0xe6c00000 0 0x0064>;
1480 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1481 clocks = <&cpg CPG_MOD 209>;
1482 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1483 dma-names = "tx", "rx";
1484 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1485 resets = <&cpg 209>;
1486 #address-cells = <1>;
1487 #size-cells = <0>;
1488 status = "disabled";
1489 };
1490
1491 msiof3: spi@e6c10000 {
1492 compatible = "renesas,msiof-r8a7796",
1493 "renesas,rcar-gen3-msiof";
1494 reg = <0 0xe6c10000 0 0x0064>;
1495 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1496 clocks = <&cpg CPG_MOD 208>;
1497 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1498 dma-names = "tx", "rx";
1499 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1500 resets = <&cpg 208>;
1501 #address-cells = <1>;
1502 #size-cells = <0>;
1503 status = "disabled";
1504 };
1505
1506 vin0: video@e6ef0000 {
1507 compatible = "renesas,vin-r8a7796";
1508 reg = <0 0xe6ef0000 0 0x1000>;
1509 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1510 clocks = <&cpg CPG_MOD 811>;
1511 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1512 resets = <&cpg 811>;
1513 renesas,id = <0>;
1514 status = "disabled";
1515
1516 ports {
1517 #address-cells = <1>;
1518 #size-cells = <0>;
1519
1520 port@1 {
1521 #address-cells = <1>;
1522 #size-cells = <0>;
1523
1524 reg = <1>;
1525
1526 vin0csi20: endpoint@0 {
1527 reg = <0>;
1528 remote-endpoint = <&csi20vin0>;
1529 };
1530 vin0csi40: endpoint@2 {
1531 reg = <2>;
1532 remote-endpoint = <&csi40vin0>;
1533 };
1534 };
1535 };
1536 };
1537
1538 vin1: video@e6ef1000 {
1539 compatible = "renesas,vin-r8a7796";
1540 reg = <0 0xe6ef1000 0 0x1000>;
1541 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1542 clocks = <&cpg CPG_MOD 810>;
1543 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1544 resets = <&cpg 810>;
1545 renesas,id = <1>;
1546 status = "disabled";
1547
1548 ports {
1549 #address-cells = <1>;
1550 #size-cells = <0>;
1551
1552 port@1 {
1553 #address-cells = <1>;
1554 #size-cells = <0>;
1555
1556 reg = <1>;
1557
1558 vin1csi20: endpoint@0 {
1559 reg = <0>;
1560 remote-endpoint = <&csi20vin1>;
1561 };
1562 vin1csi40: endpoint@2 {
1563 reg = <2>;
1564 remote-endpoint = <&csi40vin1>;
1565 };
1566 };
1567 };
1568 };
1569
1570 vin2: video@e6ef2000 {
1571 compatible = "renesas,vin-r8a7796";
1572 reg = <0 0xe6ef2000 0 0x1000>;
1573 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1574 clocks = <&cpg CPG_MOD 809>;
1575 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1576 resets = <&cpg 809>;
1577 renesas,id = <2>;
1578 status = "disabled";
1579
1580 ports {
1581 #address-cells = <1>;
1582 #size-cells = <0>;
1583
1584 port@1 {
1585 #address-cells = <1>;
1586 #size-cells = <0>;
1587
1588 reg = <1>;
1589
1590 vin2csi20: endpoint@0 {
1591 reg = <0>;
1592 remote-endpoint = <&csi20vin2>;
1593 };
1594 vin2csi40: endpoint@2 {
1595 reg = <2>;
1596 remote-endpoint = <&csi40vin2>;
1597 };
1598 };
1599 };
1600 };
1601
1602 vin3: video@e6ef3000 {
1603 compatible = "renesas,vin-r8a7796";
1604 reg = <0 0xe6ef3000 0 0x1000>;
1605 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1606 clocks = <&cpg CPG_MOD 808>;
1607 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1608 resets = <&cpg 808>;
1609 renesas,id = <3>;
1610 status = "disabled";
1611
1612 ports {
1613 #address-cells = <1>;
1614 #size-cells = <0>;
1615
1616 port@1 {
1617 #address-cells = <1>;
1618 #size-cells = <0>;
1619
1620 reg = <1>;
1621
1622 vin3csi20: endpoint@0 {
1623 reg = <0>;
1624 remote-endpoint = <&csi20vin3>;
1625 };
1626 vin3csi40: endpoint@2 {
1627 reg = <2>;
1628 remote-endpoint = <&csi40vin3>;
1629 };
1630 };
1631 };
1632 };
1633
1634 vin4: video@e6ef4000 {
1635 compatible = "renesas,vin-r8a7796";
1636 reg = <0 0xe6ef4000 0 0x1000>;
1637 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&cpg CPG_MOD 807>;
1639 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1640 resets = <&cpg 807>;
1641 renesas,id = <4>;
1642 status = "disabled";
1643
1644 ports {
1645 #address-cells = <1>;
1646 #size-cells = <0>;
1647
1648 port@1 {
1649 #address-cells = <1>;
1650 #size-cells = <0>;
1651
1652 reg = <1>;
1653
1654 vin4csi20: endpoint@0 {
1655 reg = <0>;
1656 remote-endpoint = <&csi20vin4>;
1657 };
1658 vin4csi40: endpoint@2 {
1659 reg = <2>;
1660 remote-endpoint = <&csi40vin4>;
1661 };
1662 };
1663 };
1664 };
1665
1666 vin5: video@e6ef5000 {
1667 compatible = "renesas,vin-r8a7796";
1668 reg = <0 0xe6ef5000 0 0x1000>;
1669 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1670 clocks = <&cpg CPG_MOD 806>;
1671 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1672 resets = <&cpg 806>;
1673 renesas,id = <5>;
1674 status = "disabled";
1675
1676 ports {
1677 #address-cells = <1>;
1678 #size-cells = <0>;
1679
1680 port@1 {
1681 #address-cells = <1>;
1682 #size-cells = <0>;
1683
1684 reg = <1>;
1685
1686 vin5csi20: endpoint@0 {
1687 reg = <0>;
1688 remote-endpoint = <&csi20vin5>;
1689 };
1690 vin5csi40: endpoint@2 {
1691 reg = <2>;
1692 remote-endpoint = <&csi40vin5>;
1693 };
1694 };
1695 };
1696 };
1697
1698 vin6: video@e6ef6000 {
1699 compatible = "renesas,vin-r8a7796";
1700 reg = <0 0xe6ef6000 0 0x1000>;
1701 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1702 clocks = <&cpg CPG_MOD 805>;
1703 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1704 resets = <&cpg 805>;
1705 renesas,id = <6>;
1706 status = "disabled";
1707
1708 ports {
1709 #address-cells = <1>;
1710 #size-cells = <0>;
1711
1712 port@1 {
1713 #address-cells = <1>;
1714 #size-cells = <0>;
1715
1716 reg = <1>;
1717
1718 vin6csi20: endpoint@0 {
1719 reg = <0>;
1720 remote-endpoint = <&csi20vin6>;
1721 };
1722 vin6csi40: endpoint@2 {
1723 reg = <2>;
1724 remote-endpoint = <&csi40vin6>;
1725 };
1726 };
1727 };
1728 };
1729
1730 vin7: video@e6ef7000 {
1731 compatible = "renesas,vin-r8a7796";
1732 reg = <0 0xe6ef7000 0 0x1000>;
1733 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1734 clocks = <&cpg CPG_MOD 804>;
1735 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1736 resets = <&cpg 804>;
1737 renesas,id = <7>;
1738 status = "disabled";
1739
1740 ports {
1741 #address-cells = <1>;
1742 #size-cells = <0>;
1743
1744 port@1 {
1745 #address-cells = <1>;
1746 #size-cells = <0>;
1747
1748 reg = <1>;
1749
1750 vin7csi20: endpoint@0 {
1751 reg = <0>;
1752 remote-endpoint = <&csi20vin7>;
1753 };
1754 vin7csi40: endpoint@2 {
1755 reg = <2>;
1756 remote-endpoint = <&csi40vin7>;
1757 };
1758 };
1759 };
1760 };
1761
1762 drif00: rif@e6f40000 {
1763 compatible = "renesas,r8a7796-drif",
1764 "renesas,rcar-gen3-drif";
1765 reg = <0 0xe6f40000 0 0x64>;
1766 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1767 clocks = <&cpg CPG_MOD 515>;
1768 clock-names = "fck";
1769 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1770 dma-names = "rx", "rx";
1771 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1772 resets = <&cpg 515>;
1773 renesas,bonding = <&drif01>;
1774 status = "disabled";
1775 };
1776
1777 drif01: rif@e6f50000 {
1778 compatible = "renesas,r8a7796-drif",
1779 "renesas,rcar-gen3-drif";
1780 reg = <0 0xe6f50000 0 0x64>;
1781 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1782 clocks = <&cpg CPG_MOD 514>;
1783 clock-names = "fck";
1784 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1785 dma-names = "rx", "rx";
1786 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1787 resets = <&cpg 514>;
1788 renesas,bonding = <&drif00>;
1789 status = "disabled";
1790 };
1791
1792 drif10: rif@e6f60000 {
1793 compatible = "renesas,r8a7796-drif",
1794 "renesas,rcar-gen3-drif";
1795 reg = <0 0xe6f60000 0 0x64>;
1796 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1797 clocks = <&cpg CPG_MOD 513>;
1798 clock-names = "fck";
1799 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1800 dma-names = "rx", "rx";
1801 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1802 resets = <&cpg 513>;
1803 renesas,bonding = <&drif11>;
1804 status = "disabled";
1805 };
1806
1807 drif11: rif@e6f70000 {
1808 compatible = "renesas,r8a7796-drif",
1809 "renesas,rcar-gen3-drif";
1810 reg = <0 0xe6f70000 0 0x64>;
1811 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1812 clocks = <&cpg CPG_MOD 512>;
1813 clock-names = "fck";
1814 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1815 dma-names = "rx", "rx";
1816 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1817 resets = <&cpg 512>;
1818 renesas,bonding = <&drif10>;
1819 status = "disabled";
1820 };
1821
1822 drif20: rif@e6f80000 {
1823 compatible = "renesas,r8a7796-drif",
1824 "renesas,rcar-gen3-drif";
1825 reg = <0 0xe6f80000 0 0x64>;
1826 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1827 clocks = <&cpg CPG_MOD 511>;
1828 clock-names = "fck";
1829 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1830 dma-names = "rx", "rx";
1831 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1832 resets = <&cpg 511>;
1833 renesas,bonding = <&drif21>;
1834 status = "disabled";
1835 };
1836
1837 drif21: rif@e6f90000 {
1838 compatible = "renesas,r8a7796-drif",
1839 "renesas,rcar-gen3-drif";
1840 reg = <0 0xe6f90000 0 0x64>;
1841 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1842 clocks = <&cpg CPG_MOD 510>;
1843 clock-names = "fck";
1844 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1845 dma-names = "rx", "rx";
1846 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1847 resets = <&cpg 510>;
1848 renesas,bonding = <&drif20>;
1849 status = "disabled";
1850 };
1851
1852 drif30: rif@e6fa0000 {
1853 compatible = "renesas,r8a7796-drif",
1854 "renesas,rcar-gen3-drif";
1855 reg = <0 0xe6fa0000 0 0x64>;
1856 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1857 clocks = <&cpg CPG_MOD 509>;
1858 clock-names = "fck";
1859 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1860 dma-names = "rx", "rx";
1861 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1862 resets = <&cpg 509>;
1863 renesas,bonding = <&drif31>;
1864 status = "disabled";
1865 };
1866
1867 drif31: rif@e6fb0000 {
1868 compatible = "renesas,r8a7796-drif",
1869 "renesas,rcar-gen3-drif";
1870 reg = <0 0xe6fb0000 0 0x64>;
1871 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1872 clocks = <&cpg CPG_MOD 508>;
1873 clock-names = "fck";
1874 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1875 dma-names = "rx", "rx";
1876 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1877 resets = <&cpg 508>;
1878 renesas,bonding = <&drif30>;
1879 status = "disabled";
1880 };
1881
1882 rcar_sound: sound@ec500000 {
1883 /*
1884 * #sound-dai-cells is required
1885 *
1886 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1887 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1888 */
1889 /*
1890 * #clock-cells is required for audio_clkout0/1/2/3
1891 *
1892 * clkout : #clock-cells = <0>; <&rcar_sound>;
1893 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1894 */
1895 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1896 reg = <0 0xec500000 0 0x1000>, /* SCU */
1897 <0 0xec5a0000 0 0x100>, /* ADG */
1898 <0 0xec540000 0 0x1000>, /* SSIU */
1899 <0 0xec541000 0 0x280>, /* SSI */
1900 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1901 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1902
1903 clocks = <&cpg CPG_MOD 1005>,
1904 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1905 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1906 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1907 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1908 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1909 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1910 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1911 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1912 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1913 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1914 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1915 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1916 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1917 <&audio_clk_a>, <&audio_clk_b>,
1918 <&audio_clk_c>,
1919 <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1920 clock-names = "ssi-all",
1921 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1922 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1923 "ssi.1", "ssi.0",
1924 "src.9", "src.8", "src.7", "src.6",
1925 "src.5", "src.4", "src.3", "src.2",
1926 "src.1", "src.0",
1927 "mix.1", "mix.0",
1928 "ctu.1", "ctu.0",
1929 "dvc.0", "dvc.1",
1930 "clk_a", "clk_b", "clk_c", "clk_i";
1931 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1932 resets = <&cpg 1005>,
1933 <&cpg 1006>, <&cpg 1007>,
1934 <&cpg 1008>, <&cpg 1009>,
1935 <&cpg 1010>, <&cpg 1011>,
1936 <&cpg 1012>, <&cpg 1013>,
1937 <&cpg 1014>, <&cpg 1015>;
1938 reset-names = "ssi-all",
1939 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1940 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1941 "ssi.1", "ssi.0";
1942 status = "disabled";
1943
1944 rcar_sound,ctu {
1945 ctu00: ctu-0 { };
1946 ctu01: ctu-1 { };
1947 ctu02: ctu-2 { };
1948 ctu03: ctu-3 { };
1949 ctu10: ctu-4 { };
1950 ctu11: ctu-5 { };
1951 ctu12: ctu-6 { };
1952 ctu13: ctu-7 { };
1953 };
1954
1955 rcar_sound,dvc {
1956 dvc0: dvc-0 {
1957 dmas = <&audma1 0xbc>;
1958 dma-names = "tx";
1959 };
1960 dvc1: dvc-1 {
1961 dmas = <&audma1 0xbe>;
1962 dma-names = "tx";
1963 };
1964 };
1965
1966 rcar_sound,mix {
1967 mix0: mix-0 { };
1968 mix1: mix-1 { };
1969 };
1970
1971 rcar_sound,src {
1972 src0: src-0 {
1973 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1974 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1975 dma-names = "rx", "tx";
1976 };
1977 src1: src-1 {
1978 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1979 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1980 dma-names = "rx", "tx";
1981 };
1982 src2: src-2 {
1983 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1984 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1985 dma-names = "rx", "tx";
1986 };
1987 src3: src-3 {
1988 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1989 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1990 dma-names = "rx", "tx";
1991 };
1992 src4: src-4 {
1993 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1994 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1995 dma-names = "rx", "tx";
1996 };
1997 src5: src-5 {
1998 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1999 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2000 dma-names = "rx", "tx";
2001 };
2002 src6: src-6 {
2003 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2004 dmas = <&audma0 0x91>, <&audma1 0xb4>;
2005 dma-names = "rx", "tx";
2006 };
2007 src7: src-7 {
2008 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2009 dmas = <&audma0 0x93>, <&audma1 0xb6>;
2010 dma-names = "rx", "tx";
2011 };
2012 src8: src-8 {
2013 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2014 dmas = <&audma0 0x95>, <&audma1 0xb8>;
2015 dma-names = "rx", "tx";
2016 };
2017 src9: src-9 {
2018 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2019 dmas = <&audma0 0x97>, <&audma1 0xba>;
2020 dma-names = "rx", "tx";
2021 };
2022 };
2023
2024 rcar_sound,ssi {
2025 ssi0: ssi-0 {
2026 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2027 dmas = <&audma0 0x01>, <&audma1 0x02>;
2028 dma-names = "rx", "tx";
2029 };
2030 ssi1: ssi-1 {
2031 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2032 dmas = <&audma0 0x03>, <&audma1 0x04>;
2033 dma-names = "rx", "tx";
2034 };
2035 ssi2: ssi-2 {
2036 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2037 dmas = <&audma0 0x05>, <&audma1 0x06>;
2038 dma-names = "rx", "tx";
2039 };
2040 ssi3: ssi-3 {
2041 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2042 dmas = <&audma0 0x07>, <&audma1 0x08>;
2043 dma-names = "rx", "tx";
2044 };
2045 ssi4: ssi-4 {
2046 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2047 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2048 dma-names = "rx", "tx";
2049 };
2050 ssi5: ssi-5 {
2051 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2052 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2053 dma-names = "rx", "tx";
2054 };
2055 ssi6: ssi-6 {
2056 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2057 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2058 dma-names = "rx", "tx";
2059 };
2060 ssi7: ssi-7 {
2061 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2062 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2063 dma-names = "rx", "tx";
2064 };
2065 ssi8: ssi-8 {
2066 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2067 dmas = <&audma0 0x11>, <&audma1 0x12>;
2068 dma-names = "rx", "tx";
2069 };
2070 ssi9: ssi-9 {
2071 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2072 dmas = <&audma0 0x13>, <&audma1 0x14>;
2073 dma-names = "rx", "tx";
2074 };
2075 };
2076
2077 rcar_sound,ssiu {
2078 ssiu00: ssiu-0 {
2079 dmas = <&audma0 0x15>, <&audma1 0x16>;
2080 dma-names = "rx", "tx";
2081 };
2082 ssiu01: ssiu-1 {
2083 dmas = <&audma0 0x35>, <&audma1 0x36>;
2084 dma-names = "rx", "tx";
2085 };
2086 ssiu02: ssiu-2 {
2087 dmas = <&audma0 0x37>, <&audma1 0x38>;
2088 dma-names = "rx", "tx";
2089 };
2090 ssiu03: ssiu-3 {
2091 dmas = <&audma0 0x47>, <&audma1 0x48>;
2092 dma-names = "rx", "tx";
2093 };
2094 ssiu04: ssiu-4 {
2095 dmas = <&audma0 0x3F>, <&audma1 0x40>;
2096 dma-names = "rx", "tx";
2097 };
2098 ssiu05: ssiu-5 {
2099 dmas = <&audma0 0x43>, <&audma1 0x44>;
2100 dma-names = "rx", "tx";
2101 };
2102 ssiu06: ssiu-6 {
2103 dmas = <&audma0 0x4F>, <&audma1 0x50>;
2104 dma-names = "rx", "tx";
2105 };
2106 ssiu07: ssiu-7 {
2107 dmas = <&audma0 0x53>, <&audma1 0x54>;
2108 dma-names = "rx", "tx";
2109 };
2110 ssiu10: ssiu-8 {
2111 dmas = <&audma0 0x49>, <&audma1 0x4a>;
2112 dma-names = "rx", "tx";
2113 };
2114 ssiu11: ssiu-9 {
2115 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2116 dma-names = "rx", "tx";
2117 };
2118 ssiu12: ssiu-10 {
2119 dmas = <&audma0 0x57>, <&audma1 0x58>;
2120 dma-names = "rx", "tx";
2121 };
2122 ssiu13: ssiu-11 {
2123 dmas = <&audma0 0x59>, <&audma1 0x5A>;
2124 dma-names = "rx", "tx";
2125 };
2126 ssiu14: ssiu-12 {
2127 dmas = <&audma0 0x5F>, <&audma1 0x60>;
2128 dma-names = "rx", "tx";
2129 };
2130 ssiu15: ssiu-13 {
2131 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2132 dma-names = "rx", "tx";
2133 };
2134 ssiu16: ssiu-14 {
2135 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2136 dma-names = "rx", "tx";
2137 };
2138 ssiu17: ssiu-15 {
2139 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2140 dma-names = "rx", "tx";
2141 };
2142 ssiu20: ssiu-16 {
2143 dmas = <&audma0 0x63>, <&audma1 0x64>;
2144 dma-names = "rx", "tx";
2145 };
2146 ssiu21: ssiu-17 {
2147 dmas = <&audma0 0x67>, <&audma1 0x68>;
2148 dma-names = "rx", "tx";
2149 };
2150 ssiu22: ssiu-18 {
2151 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2152 dma-names = "rx", "tx";
2153 };
2154 ssiu23: ssiu-19 {
2155 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2156 dma-names = "rx", "tx";
2157 };
2158 ssiu24: ssiu-20 {
2159 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2160 dma-names = "rx", "tx";
2161 };
2162 ssiu25: ssiu-21 {
2163 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2164 dma-names = "rx", "tx";
2165 };
2166 ssiu26: ssiu-22 {
2167 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2168 dma-names = "rx", "tx";
2169 };
2170 ssiu27: ssiu-23 {
2171 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2172 dma-names = "rx", "tx";
2173 };
2174 ssiu30: ssiu-24 {
2175 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2176 dma-names = "rx", "tx";
2177 };
2178 ssiu31: ssiu-25 {
2179 dmas = <&audma0 0x21>, <&audma1 0x22>;
2180 dma-names = "rx", "tx";
2181 };
2182 ssiu32: ssiu-26 {
2183 dmas = <&audma0 0x23>, <&audma1 0x24>;
2184 dma-names = "rx", "tx";
2185 };
2186 ssiu33: ssiu-27 {
2187 dmas = <&audma0 0x25>, <&audma1 0x26>;
2188 dma-names = "rx", "tx";
2189 };
2190 ssiu34: ssiu-28 {
2191 dmas = <&audma0 0x27>, <&audma1 0x28>;
2192 dma-names = "rx", "tx";
2193 };
2194 ssiu35: ssiu-29 {
2195 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2196 dma-names = "rx", "tx";
2197 };
2198 ssiu36: ssiu-30 {
2199 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2200 dma-names = "rx", "tx";
2201 };
2202 ssiu37: ssiu-31 {
2203 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2204 dma-names = "rx", "tx";
2205 };
2206 ssiu40: ssiu-32 {
2207 dmas = <&audma0 0x71>, <&audma1 0x72>;
2208 dma-names = "rx", "tx";
2209 };
2210 ssiu41: ssiu-33 {
2211 dmas = <&audma0 0x17>, <&audma1 0x18>;
2212 dma-names = "rx", "tx";
2213 };
2214 ssiu42: ssiu-34 {
2215 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2216 dma-names = "rx", "tx";
2217 };
2218 ssiu43: ssiu-35 {
2219 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2220 dma-names = "rx", "tx";
2221 };
2222 ssiu44: ssiu-36 {
2223 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2224 dma-names = "rx", "tx";
2225 };
2226 ssiu45: ssiu-37 {
2227 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2228 dma-names = "rx", "tx";
2229 };
2230 ssiu46: ssiu-38 {
2231 dmas = <&audma0 0x31>, <&audma1 0x32>;
2232 dma-names = "rx", "tx";
2233 };
2234 ssiu47: ssiu-39 {
2235 dmas = <&audma0 0x33>, <&audma1 0x34>;
2236 dma-names = "rx", "tx";
2237 };
2238 ssiu50: ssiu-40 {
2239 dmas = <&audma0 0x73>, <&audma1 0x74>;
2240 dma-names = "rx", "tx";
2241 };
2242 ssiu60: ssiu-41 {
2243 dmas = <&audma0 0x75>, <&audma1 0x76>;
2244 dma-names = "rx", "tx";
2245 };
2246 ssiu70: ssiu-42 {
2247 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2248 dma-names = "rx", "tx";
2249 };
2250 ssiu80: ssiu-43 {
2251 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2252 dma-names = "rx", "tx";
2253 };
2254 ssiu90: ssiu-44 {
2255 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2256 dma-names = "rx", "tx";
2257 };
2258 ssiu91: ssiu-45 {
2259 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2260 dma-names = "rx", "tx";
2261 };
2262 ssiu92: ssiu-46 {
2263 dmas = <&audma0 0x81>, <&audma1 0x82>;
2264 dma-names = "rx", "tx";
2265 };
2266 ssiu93: ssiu-47 {
2267 dmas = <&audma0 0x83>, <&audma1 0x84>;
2268 dma-names = "rx", "tx";
2269 };
2270 ssiu94: ssiu-48 {
2271 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2272 dma-names = "rx", "tx";
2273 };
2274 ssiu95: ssiu-49 {
2275 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2276 dma-names = "rx", "tx";
2277 };
2278 ssiu96: ssiu-50 {
2279 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2280 dma-names = "rx", "tx";
2281 };
2282 ssiu97: ssiu-51 {
2283 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2284 dma-names = "rx", "tx";
2285 };
2286 };
2287 };
2288
2289 mlp: mlp@ec520000 {
2290 compatible = "renesas,r8a7796-mlp",
2291 "renesas,rcar-gen3-mlp";
2292 reg = <0 0xec520000 0 0x800>;
2293 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2294 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2295 clocks = <&cpg CPG_MOD 802>;
2296 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2297 resets = <&cpg 802>;
2298 status = "disabled";
2299 };
2300
2301 audma0: dma-controller@ec700000 {
2302 compatible = "renesas,dmac-r8a7796",
2303 "renesas,rcar-dmac";
2304 reg = <0 0xec700000 0 0x10000>;
2305 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2306 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2307 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2308 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2309 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2310 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2311 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2312 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2313 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2314 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2315 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2316 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2317 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2318 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2319 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2320 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2321 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2322 interrupt-names = "error",
2323 "ch0", "ch1", "ch2", "ch3",
2324 "ch4", "ch5", "ch6", "ch7",
2325 "ch8", "ch9", "ch10", "ch11",
2326 "ch12", "ch13", "ch14", "ch15";
2327 clocks = <&cpg CPG_MOD 502>;
2328 clock-names = "fck";
2329 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2330 resets = <&cpg 502>;
2331 #dma-cells = <1>;
2332 dma-channels = <16>;
2333 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2334 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2335 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2336 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2337 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2338 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2339 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2340 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2341 };
2342
2343 audma1: dma-controller@ec720000 {
2344 compatible = "renesas,dmac-r8a7796",
2345 "renesas,rcar-dmac";
2346 reg = <0 0xec720000 0 0x10000>;
2347 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2348 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2349 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2350 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2351 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2352 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2353 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2354 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2355 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2356 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2357 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2358 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2359 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2360 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2361 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2362 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2363 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2364 interrupt-names = "error",
2365 "ch0", "ch1", "ch2", "ch3",
2366 "ch4", "ch5", "ch6", "ch7",
2367 "ch8", "ch9", "ch10", "ch11",
2368 "ch12", "ch13", "ch14", "ch15";
2369 clocks = <&cpg CPG_MOD 501>;
2370 clock-names = "fck";
2371 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2372 resets = <&cpg 501>;
2373 #dma-cells = <1>;
2374 dma-channels = <16>;
2375 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2376 <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2377 <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2378 <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2379 <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2380 <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2381 <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2382 <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2383 };
2384
2385 xhci0: usb@ee000000 {
2386 compatible = "renesas,xhci-r8a7796",
2387 "renesas,rcar-gen3-xhci";
2388 reg = <0 0xee000000 0 0xc00>;
2389 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2390 clocks = <&cpg CPG_MOD 328>;
2391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2392 resets = <&cpg 328>;
2393 status = "disabled";
2394 };
2395
2396 usb3_peri0: usb@ee020000 {
2397 compatible = "renesas,r8a7796-usb3-peri",
2398 "renesas,rcar-gen3-usb3-peri";
2399 reg = <0 0xee020000 0 0x400>;
2400 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2401 clocks = <&cpg CPG_MOD 328>;
2402 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2403 resets = <&cpg 328>;
2404 status = "disabled";
2405 };
2406
2407 ohci0: usb@ee080000 {
2408 compatible = "generic-ohci";
2409 reg = <0 0xee080000 0 0x100>;
2410 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2411 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2412 phys = <&usb2_phy0 1>;
2413 phy-names = "usb";
2414 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2415 resets = <&cpg 703>, <&cpg 704>;
2416 status = "disabled";
2417 };
2418
2419 ohci1: usb@ee0a0000 {
2420 compatible = "generic-ohci";
2421 reg = <0 0xee0a0000 0 0x100>;
2422 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2423 clocks = <&cpg CPG_MOD 702>;
2424 phys = <&usb2_phy1 1>;
2425 phy-names = "usb";
2426 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2427 resets = <&cpg 702>;
2428 status = "disabled";
2429 };
2430
2431 ehci0: usb@ee080100 {
2432 compatible = "generic-ehci";
2433 reg = <0 0xee080100 0 0x100>;
2434 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2435 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2436 phys = <&usb2_phy0 2>;
2437 phy-names = "usb";
2438 companion = <&ohci0>;
2439 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2440 resets = <&cpg 703>, <&cpg 704>;
2441 status = "disabled";
2442 };
2443
2444 ehci1: usb@ee0a0100 {
2445 compatible = "generic-ehci";
2446 reg = <0 0xee0a0100 0 0x100>;
2447 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2448 clocks = <&cpg CPG_MOD 702>;
2449 phys = <&usb2_phy1 2>;
2450 phy-names = "usb";
2451 companion = <&ohci1>;
2452 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2453 resets = <&cpg 702>;
2454 status = "disabled";
2455 };
2456
2457 usb2_phy0: usb-phy@ee080200 {
2458 compatible = "renesas,usb2-phy-r8a7796",
2459 "renesas,rcar-gen3-usb2-phy";
2460 reg = <0 0xee080200 0 0x700>;
2461 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2462 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2463 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2464 resets = <&cpg 703>, <&cpg 704>;
2465 #phy-cells = <1>;
2466 status = "disabled";
2467 };
2468
2469 usb2_phy1: usb-phy@ee0a0200 {
2470 compatible = "renesas,usb2-phy-r8a7796",
2471 "renesas,rcar-gen3-usb2-phy";
2472 reg = <0 0xee0a0200 0 0x700>;
2473 clocks = <&cpg CPG_MOD 702>;
2474 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2475 resets = <&cpg 702>;
2476 #phy-cells = <1>;
2477 status = "disabled";
2478 };
2479
2480 sdhi0: mmc@ee100000 {
2481 compatible = "renesas,sdhi-r8a7796",
2482 "renesas,rcar-gen3-sdhi";
2483 reg = <0 0xee100000 0 0x2000>;
2484 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2485 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
2486 clock-names = "core", "clkh";
2487 max-frequency = <200000000>;
2488 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2489 resets = <&cpg 314>;
2490 iommus = <&ipmmu_ds1 32>;
2491 status = "disabled";
2492 };
2493
2494 sdhi1: mmc@ee120000 {
2495 compatible = "renesas,sdhi-r8a7796",
2496 "renesas,rcar-gen3-sdhi";
2497 reg = <0 0xee120000 0 0x2000>;
2498 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2499 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
2500 clock-names = "core", "clkh";
2501 max-frequency = <200000000>;
2502 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2503 resets = <&cpg 313>;
2504 iommus = <&ipmmu_ds1 33>;
2505 status = "disabled";
2506 };
2507
2508 sdhi2: mmc@ee140000 {
2509 compatible = "renesas,sdhi-r8a7796",
2510 "renesas,rcar-gen3-sdhi";
2511 reg = <0 0xee140000 0 0x2000>;
2512 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2513 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
2514 clock-names = "core", "clkh";
2515 max-frequency = <200000000>;
2516 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2517 resets = <&cpg 312>;
2518 iommus = <&ipmmu_ds1 34>;
2519 status = "disabled";
2520 };
2521
2522 sdhi3: mmc@ee160000 {
2523 compatible = "renesas,sdhi-r8a7796",
2524 "renesas,rcar-gen3-sdhi";
2525 reg = <0 0xee160000 0 0x2000>;
2526 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2527 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
2528 clock-names = "core", "clkh";
2529 max-frequency = <200000000>;
2530 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2531 resets = <&cpg 311>;
2532 iommus = <&ipmmu_ds1 35>;
2533 status = "disabled";
2534 };
2535
2536 rpc: spi@ee200000 {
2537 compatible = "renesas,r8a7796-rpc-if",
2538 "renesas,rcar-gen3-rpc-if";
2539 reg = <0 0xee200000 0 0x200>,
2540 <0 0x08000000 0 0x04000000>,
2541 <0 0xee208000 0 0x100>;
2542 reg-names = "regs", "dirmap", "wbuf";
2543 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2544 clocks = <&cpg CPG_MOD 917>;
2545 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2546 resets = <&cpg 917>;
2547 #address-cells = <1>;
2548 #size-cells = <0>;
2549 status = "disabled";
2550 };
2551
2552 gic: interrupt-controller@f1010000 {
2553 compatible = "arm,gic-400";
2554 #interrupt-cells = <3>;
2555 #address-cells = <0>;
2556 interrupt-controller;
2557 reg = <0x0 0xf1010000 0 0x1000>,
2558 <0x0 0xf1020000 0 0x20000>,
2559 <0x0 0xf1040000 0 0x20000>,
2560 <0x0 0xf1060000 0 0x20000>;
2561 interrupts = <GIC_PPI 9
2562 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2563 clocks = <&cpg CPG_MOD 408>;
2564 clock-names = "clk";
2565 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2566 resets = <&cpg 408>;
2567 };
2568
2569 pciec0: pcie@fe000000 {
2570 compatible = "renesas,pcie-r8a7796",
2571 "renesas,pcie-rcar-gen3";
2572 reg = <0 0xfe000000 0 0x80000>;
2573 #address-cells = <3>;
2574 #size-cells = <2>;
2575 bus-range = <0x00 0xff>;
2576 device_type = "pci";
2577 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2578 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2579 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2580 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2581 /* Map all possible DDR as inbound ranges */
2582 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2583 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2584 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2585 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2586 #interrupt-cells = <1>;
2587 interrupt-map-mask = <0 0 0 0>;
2588 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2589 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2590 clock-names = "pcie", "pcie_bus";
2591 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2592 resets = <&cpg 319>;
2593 status = "disabled";
2594 };
2595
2596 pciec1: pcie@ee800000 {
2597 compatible = "renesas,pcie-r8a7796",
2598 "renesas,pcie-rcar-gen3";
2599 reg = <0 0xee800000 0 0x80000>;
2600 #address-cells = <3>;
2601 #size-cells = <2>;
2602 bus-range = <0x00 0xff>;
2603 device_type = "pci";
2604 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2605 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2606 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2607 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2608 /* Map all possible DDR as inbound ranges */
2609 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2610 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2611 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2612 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2613 #interrupt-cells = <1>;
2614 interrupt-map-mask = <0 0 0 0>;
2615 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2616 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2617 clock-names = "pcie", "pcie_bus";
2618 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2619 resets = <&cpg 318>;
2620 status = "disabled";
2621 };
2622
2623 imr-lx4@fe860000 {
2624 compatible = "renesas,r8a7796-imr-lx4",
2625 "renesas,imr-lx4";
2626 reg = <0 0xfe860000 0 0x2000>;
2627 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2628 clocks = <&cpg CPG_MOD 823>;
2629 power-domains = <&sysc R8A7796_PD_A3VC>;
2630 resets = <&cpg 823>;
2631 };
2632
2633 imr-lx4@fe870000 {
2634 compatible = "renesas,r8a7796-imr-lx4",
2635 "renesas,imr-lx4";
2636 reg = <0 0xfe870000 0 0x2000>;
2637 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2638 clocks = <&cpg CPG_MOD 822>;
2639 power-domains = <&sysc R8A7796_PD_A3VC>;
2640 resets = <&cpg 822>;
2641 };
2642
2643 fdp1@fe940000 {
2644 compatible = "renesas,fdp1";
2645 reg = <0 0xfe940000 0 0x2400>;
2646 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2647 clocks = <&cpg CPG_MOD 119>;
2648 power-domains = <&sysc R8A7796_PD_A3VC>;
2649 resets = <&cpg 119>;
2650 renesas,fcp = <&fcpf0>;
2651 };
2652
2653 fcpf0: fcp@fe950000 {
2654 compatible = "renesas,fcpf";
2655 reg = <0 0xfe950000 0 0x200>;
2656 clocks = <&cpg CPG_MOD 615>;
2657 power-domains = <&sysc R8A7796_PD_A3VC>;
2658 resets = <&cpg 615>;
2659 };
2660
2661 fcpvb0: fcp@fe96f000 {
2662 compatible = "renesas,fcpv";
2663 reg = <0 0xfe96f000 0 0x200>;
2664 clocks = <&cpg CPG_MOD 607>;
2665 power-domains = <&sysc R8A7796_PD_A3VC>;
2666 resets = <&cpg 607>;
2667 };
2668
2669 fcpvi0: fcp@fe9af000 {
2670 compatible = "renesas,fcpv";
2671 reg = <0 0xfe9af000 0 0x200>;
2672 clocks = <&cpg CPG_MOD 611>;
2673 power-domains = <&sysc R8A7796_PD_A3VC>;
2674 resets = <&cpg 611>;
2675 iommus = <&ipmmu_vc0 19>;
2676 };
2677
2678 fcpvd0: fcp@fea27000 {
2679 compatible = "renesas,fcpv";
2680 reg = <0 0xfea27000 0 0x200>;
2681 clocks = <&cpg CPG_MOD 603>;
2682 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2683 resets = <&cpg 603>;
2684 iommus = <&ipmmu_vi0 8>;
2685 };
2686
2687 fcpvd1: fcp@fea2f000 {
2688 compatible = "renesas,fcpv";
2689 reg = <0 0xfea2f000 0 0x200>;
2690 clocks = <&cpg CPG_MOD 602>;
2691 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2692 resets = <&cpg 602>;
2693 iommus = <&ipmmu_vi0 9>;
2694 };
2695
2696 fcpvd2: fcp@fea37000 {
2697 compatible = "renesas,fcpv";
2698 reg = <0 0xfea37000 0 0x200>;
2699 clocks = <&cpg CPG_MOD 601>;
2700 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2701 resets = <&cpg 601>;
2702 iommus = <&ipmmu_vi0 10>;
2703 };
2704
2705 vspb: vsp@fe960000 {
2706 compatible = "renesas,vsp2";
2707 reg = <0 0xfe960000 0 0x8000>;
2708 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2709 clocks = <&cpg CPG_MOD 626>;
2710 power-domains = <&sysc R8A7796_PD_A3VC>;
2711 resets = <&cpg 626>;
2712
2713 renesas,fcp = <&fcpvb0>;
2714 };
2715
2716 vspd0: vsp@fea20000 {
2717 compatible = "renesas,vsp2";
2718 reg = <0 0xfea20000 0 0x5000>;
2719 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2720 clocks = <&cpg CPG_MOD 623>;
2721 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2722 resets = <&cpg 623>;
2723
2724 renesas,fcp = <&fcpvd0>;
2725 };
2726
2727 vspd1: vsp@fea28000 {
2728 compatible = "renesas,vsp2";
2729 reg = <0 0xfea28000 0 0x5000>;
2730 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2731 clocks = <&cpg CPG_MOD 622>;
2732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2733 resets = <&cpg 622>;
2734
2735 renesas,fcp = <&fcpvd1>;
2736 };
2737
2738 vspd2: vsp@fea30000 {
2739 compatible = "renesas,vsp2";
2740 reg = <0 0xfea30000 0 0x5000>;
2741 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2742 clocks = <&cpg CPG_MOD 621>;
2743 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2744 resets = <&cpg 621>;
2745
2746 renesas,fcp = <&fcpvd2>;
2747 };
2748
2749 vspi0: vsp@fe9a0000 {
2750 compatible = "renesas,vsp2";
2751 reg = <0 0xfe9a0000 0 0x8000>;
2752 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2753 clocks = <&cpg CPG_MOD 631>;
2754 power-domains = <&sysc R8A7796_PD_A3VC>;
2755 resets = <&cpg 631>;
2756
2757 renesas,fcp = <&fcpvi0>;
2758 };
2759
2760 cmm0: cmm@fea40000 {
2761 compatible = "renesas,r8a7796-cmm",
2762 "renesas,rcar-gen3-cmm";
2763 reg = <0 0xfea40000 0 0x1000>;
2764 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2765 clocks = <&cpg CPG_MOD 711>;
2766 resets = <&cpg 711>;
2767 };
2768
2769 cmm1: cmm@fea50000 {
2770 compatible = "renesas,r8a7796-cmm",
2771 "renesas,rcar-gen3-cmm";
2772 reg = <0 0xfea50000 0 0x1000>;
2773 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2774 clocks = <&cpg CPG_MOD 710>;
2775 resets = <&cpg 710>;
2776 };
2777
2778 cmm2: cmm@fea60000 {
2779 compatible = "renesas,r8a7796-cmm",
2780 "renesas,rcar-gen3-cmm";
2781 reg = <0 0xfea60000 0 0x1000>;
2782 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2783 clocks = <&cpg CPG_MOD 709>;
2784 resets = <&cpg 709>;
2785 };
2786
2787 csi20: csi2@fea80000 {
2788 compatible = "renesas,r8a7796-csi2";
2789 reg = <0 0xfea80000 0 0x10000>;
2790 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2791 clocks = <&cpg CPG_MOD 714>;
2792 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2793 resets = <&cpg 714>;
2794 status = "disabled";
2795
2796 ports {
2797 #address-cells = <1>;
2798 #size-cells = <0>;
2799
2800 port@0 {
2801 reg = <0>;
2802 };
2803
2804 port@1 {
2805 #address-cells = <1>;
2806 #size-cells = <0>;
2807
2808 reg = <1>;
2809
2810 csi20vin0: endpoint@0 {
2811 reg = <0>;
2812 remote-endpoint = <&vin0csi20>;
2813 };
2814 csi20vin1: endpoint@1 {
2815 reg = <1>;
2816 remote-endpoint = <&vin1csi20>;
2817 };
2818 csi20vin2: endpoint@2 {
2819 reg = <2>;
2820 remote-endpoint = <&vin2csi20>;
2821 };
2822 csi20vin3: endpoint@3 {
2823 reg = <3>;
2824 remote-endpoint = <&vin3csi20>;
2825 };
2826 csi20vin4: endpoint@4 {
2827 reg = <4>;
2828 remote-endpoint = <&vin4csi20>;
2829 };
2830 csi20vin5: endpoint@5 {
2831 reg = <5>;
2832 remote-endpoint = <&vin5csi20>;
2833 };
2834 csi20vin6: endpoint@6 {
2835 reg = <6>;
2836 remote-endpoint = <&vin6csi20>;
2837 };
2838 csi20vin7: endpoint@7 {
2839 reg = <7>;
2840 remote-endpoint = <&vin7csi20>;
2841 };
2842 };
2843 };
2844 };
2845
2846 csi40: csi2@feaa0000 {
2847 compatible = "renesas,r8a7796-csi2";
2848 reg = <0 0xfeaa0000 0 0x10000>;
2849 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2850 clocks = <&cpg CPG_MOD 716>;
2851 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2852 resets = <&cpg 716>;
2853 status = "disabled";
2854
2855 ports {
2856 #address-cells = <1>;
2857 #size-cells = <0>;
2858
2859 port@0 {
2860 reg = <0>;
2861 };
2862
2863 port@1 {
2864 #address-cells = <1>;
2865 #size-cells = <0>;
2866
2867 reg = <1>;
2868
2869 csi40vin0: endpoint@0 {
2870 reg = <0>;
2871 remote-endpoint = <&vin0csi40>;
2872 };
2873 csi40vin1: endpoint@1 {
2874 reg = <1>;
2875 remote-endpoint = <&vin1csi40>;
2876 };
2877 csi40vin2: endpoint@2 {
2878 reg = <2>;
2879 remote-endpoint = <&vin2csi40>;
2880 };
2881 csi40vin3: endpoint@3 {
2882 reg = <3>;
2883 remote-endpoint = <&vin3csi40>;
2884 };
2885 csi40vin4: endpoint@4 {
2886 reg = <4>;
2887 remote-endpoint = <&vin4csi40>;
2888 };
2889 csi40vin5: endpoint@5 {
2890 reg = <5>;
2891 remote-endpoint = <&vin5csi40>;
2892 };
2893 csi40vin6: endpoint@6 {
2894 reg = <6>;
2895 remote-endpoint = <&vin6csi40>;
2896 };
2897 csi40vin7: endpoint@7 {
2898 reg = <7>;
2899 remote-endpoint = <&vin7csi40>;
2900 };
2901 };
2902
2903 };
2904 };
2905
2906 hdmi0: hdmi@fead0000 {
2907 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2908 reg = <0 0xfead0000 0 0x10000>;
2909 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2910 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2911 clock-names = "iahb", "isfr";
2912 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2913 resets = <&cpg 729>;
2914 status = "disabled";
2915
2916 ports {
2917 #address-cells = <1>;
2918 #size-cells = <0>;
2919 port@0 {
2920 reg = <0>;
2921 dw_hdmi0_in: endpoint {
2922 remote-endpoint = <&du_out_hdmi0>;
2923 };
2924 };
2925 port@1 {
2926 reg = <1>;
2927 };
2928 port@2 {
2929 /* HDMI sound */
2930 reg = <2>;
2931 };
2932 };
2933 };
2934
2935 du: display@feb00000 {
2936 compatible = "renesas,du-r8a7796";
2937 reg = <0 0xfeb00000 0 0x70000>;
2938 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2939 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2940 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2941 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2942 <&cpg CPG_MOD 722>;
2943 clock-names = "du.0", "du.1", "du.2";
2944 resets = <&cpg 724>, <&cpg 722>;
2945 reset-names = "du.0", "du.2";
2946
2947 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2948 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2949
2950 status = "disabled";
2951
2952 ports {
2953 #address-cells = <1>;
2954 #size-cells = <0>;
2955
2956 port@0 {
2957 reg = <0>;
2958 };
2959 port@1 {
2960 reg = <1>;
2961 du_out_hdmi0: endpoint {
2962 remote-endpoint = <&dw_hdmi0_in>;
2963 };
2964 };
2965 port@2 {
2966 reg = <2>;
2967 du_out_lvds0: endpoint {
2968 remote-endpoint = <&lvds0_in>;
2969 };
2970 };
2971 };
2972 };
2973
2974 lvds0: lvds@feb90000 {
2975 compatible = "renesas,r8a7796-lvds";
2976 reg = <0 0xfeb90000 0 0x14>;
2977 clocks = <&cpg CPG_MOD 727>;
2978 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2979 resets = <&cpg 727>;
2980 status = "disabled";
2981
2982 ports {
2983 #address-cells = <1>;
2984 #size-cells = <0>;
2985
2986 port@0 {
2987 reg = <0>;
2988 lvds0_in: endpoint {
2989 remote-endpoint = <&du_out_lvds0>;
2990 };
2991 };
2992 port@1 {
2993 reg = <1>;
2994 };
2995 };
2996 };
2997
2998 prr: chipid@fff00044 {
2999 compatible = "renesas,prr";
3000 reg = <0 0xfff00044 0 4>;
3001 };
3002 };
3003
3004 thermal-zones {
3005 sensor1_thermal: sensor1-thermal {
3006 polling-delay-passive = <250>;
3007 polling-delay = <1000>;
3008 thermal-sensors = <&tsc 0>;
3009 sustainable-power = <3874>;
3010
3011 trips {
3012 sensor1_crit: sensor1-crit {
3013 temperature = <120000>;
3014 hysteresis = <1000>;
3015 type = "critical";
3016 };
3017 };
3018 };
3019
3020 sensor2_thermal: sensor2-thermal {
3021 polling-delay-passive = <250>;
3022 polling-delay = <1000>;
3023 thermal-sensors = <&tsc 1>;
3024 sustainable-power = <3874>;
3025
3026 trips {
3027 sensor2_crit: sensor2-crit {
3028 temperature = <120000>;
3029 hysteresis = <1000>;
3030 type = "critical";
3031 };
3032 };
3033 };
3034
3035 sensor3_thermal: sensor3-thermal {
3036 polling-delay-passive = <250>;
3037 polling-delay = <1000>;
3038 thermal-sensors = <&tsc 2>;
3039 sustainable-power = <3874>;
3040
3041 cooling-maps {
3042 map0 {
3043 trip = <&target>;
3044 cooling-device = <&a57_0 2 4>;
3045 contribution = <1024>;
3046 };
3047 map1 {
3048 trip = <&target>;
3049 cooling-device = <&a53_0 0 2>;
3050 contribution = <1024>;
3051 };
3052 };
3053 trips {
3054 target: trip-point1 {
3055 temperature = <100000>;
3056 hysteresis = <1000>;
3057 type = "passive";
3058 };
3059
3060 sensor3_crit: sensor3-crit {
3061 temperature = <120000>;
3062 hysteresis = <1000>;
3063 type = "critical";
3064 };
3065 };
3066 };
3067 };
3068
3069 timer {
3070 compatible = "arm,armv8-timer";
3071 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3072 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3073 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3074 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
3075 };
3076
3077 /* External USB clocks - can be overridden by the board */
3078 usb3s0_clk: usb3s0 {
3079 compatible = "fixed-clock";
3080 #clock-cells = <0>;
3081 clock-frequency = <0>;
3082 };
3083
3084 usb_extal_clk: usb_extal {
3085 compatible = "fixed-clock";
3086 #clock-cells = <0>;
3087 clock-frequency = <0>;
3088 };
3089 };
