0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES2.0+
0004 *
0005 * Copyright (C) 2016 Renesas Electronics Corp.
0006 * Copyright (C) 2016 Cogent Embedded, Inc.
0007 */
0008
0009 /dts-v1/;
0010 #include "r8a77951.dtsi"
0011 #include "ulcb.dtsi"
0012
0013 / {
0014 model = "Renesas H3ULCB board based on r8a77951";
0015 compatible = "renesas,h3ulcb", "renesas,r8a7795";
0016
0017 memory@48000000 {
0018 device_type = "memory";
0019 /* first 128MB is reserved for secure area. */
0020 reg = <0x0 0x48000000 0x0 0x38000000>;
0021 };
0022
0023 memory@500000000 {
0024 device_type = "memory";
0025 reg = <0x5 0x00000000 0x0 0x40000000>;
0026 };
0027
0028 memory@600000000 {
0029 device_type = "memory";
0030 reg = <0x6 0x00000000 0x0 0x40000000>;
0031 };
0032
0033 memory@700000000 {
0034 device_type = "memory";
0035 reg = <0x7 0x00000000 0x0 0x40000000>;
0036 };
0037 };
0038
0039 &du {
0040 clocks = <&cpg CPG_MOD 724>,
0041 <&cpg CPG_MOD 723>,
0042 <&cpg CPG_MOD 722>,
0043 <&cpg CPG_MOD 721>,
0044 <&versaclock5 1>,
0045 <&versaclock5 3>,
0046 <&versaclock5 4>,
0047 <&versaclock5 2>;
0048 clock-names = "du.0", "du.1", "du.2", "du.3",
0049 "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
0050 };
