0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the r8a774e1 SoC
0004 *
0005 * Copyright (C) 2020 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
0011 #include <dt-bindings/power/r8a774e1-sysc.h>
0012
0013 #define CPG_AUDIO_CLK_I R8A774E1_CLK_S0D4
0014
0015 / {
0016 compatible = "renesas,r8a774e1";
0017 #address-cells = <2>;
0018 #size-cells = <2>;
0019
0020 /*
0021 * The external audio clocks are configured as 0 Hz fixed frequency
0022 * clocks by default.
0023 * Boards that provide audio clocks should override them.
0024 */
0025 audio_clk_a: audio_clk_a {
0026 compatible = "fixed-clock";
0027 #clock-cells = <0>;
0028 clock-frequency = <0>;
0029 };
0030
0031 audio_clk_b: audio_clk_b {
0032 compatible = "fixed-clock";
0033 #clock-cells = <0>;
0034 clock-frequency = <0>;
0035 };
0036
0037 audio_clk_c: audio_clk_c {
0038 compatible = "fixed-clock";
0039 #clock-cells = <0>;
0040 clock-frequency = <0>;
0041 };
0042
0043 /* External CAN clock - to be overridden by boards that provide it */
0044 can_clk: can {
0045 compatible = "fixed-clock";
0046 #clock-cells = <0>;
0047 clock-frequency = <0>;
0048 };
0049
0050 cluster0_opp: opp-table-0 {
0051 compatible = "operating-points-v2";
0052 opp-shared;
0053
0054 opp-500000000 {
0055 opp-hz = /bits/ 64 <500000000>;
0056 opp-microvolt = <820000>;
0057 clock-latency-ns = <300000>;
0058 };
0059 opp-1000000000 {
0060 opp-hz = /bits/ 64 <1000000000>;
0061 opp-microvolt = <820000>;
0062 clock-latency-ns = <300000>;
0063 };
0064 opp-1500000000 {
0065 opp-hz = /bits/ 64 <1500000000>;
0066 opp-microvolt = <820000>;
0067 clock-latency-ns = <300000>;
0068 opp-suspend;
0069 };
0070 };
0071
0072 cluster1_opp: opp-table-1 {
0073 compatible = "operating-points-v2";
0074 opp-shared;
0075
0076 opp-800000000 {
0077 opp-hz = /bits/ 64 <800000000>;
0078 opp-microvolt = <820000>;
0079 clock-latency-ns = <300000>;
0080 };
0081 opp-1000000000 {
0082 opp-hz = /bits/ 64 <1000000000>;
0083 opp-microvolt = <820000>;
0084 clock-latency-ns = <300000>;
0085 };
0086 opp-1200000000 {
0087 opp-hz = /bits/ 64 <1200000000>;
0088 opp-microvolt = <820000>;
0089 clock-latency-ns = <300000>;
0090 };
0091 };
0092
0093 cpus {
0094 #address-cells = <1>;
0095 #size-cells = <0>;
0096
0097 cpu-map {
0098 cluster0 {
0099 core0 {
0100 cpu = <&a57_0>;
0101 };
0102 core1 {
0103 cpu = <&a57_1>;
0104 };
0105 core2 {
0106 cpu = <&a57_2>;
0107 };
0108 core3 {
0109 cpu = <&a57_3>;
0110 };
0111 };
0112
0113 cluster1 {
0114 core0 {
0115 cpu = <&a53_0>;
0116 };
0117 core1 {
0118 cpu = <&a53_1>;
0119 };
0120 core2 {
0121 cpu = <&a53_2>;
0122 };
0123 core3 {
0124 cpu = <&a53_3>;
0125 };
0126 };
0127 };
0128
0129 a57_0: cpu@0 {
0130 compatible = "arm,cortex-a57";
0131 reg = <0x0>;
0132 device_type = "cpu";
0133 power-domains = <&sysc R8A774E1_PD_CA57_CPU0>;
0134 next-level-cache = <&L2_CA57>;
0135 enable-method = "psci";
0136 cpu-idle-states = <&CPU_SLEEP_0>;
0137 dynamic-power-coefficient = <854>;
0138 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
0139 operating-points-v2 = <&cluster0_opp>;
0140 capacity-dmips-mhz = <1024>;
0141 #cooling-cells = <2>;
0142 };
0143
0144 a57_1: cpu@1 {
0145 compatible = "arm,cortex-a57";
0146 reg = <0x1>;
0147 device_type = "cpu";
0148 power-domains = <&sysc R8A774E1_PD_CA57_CPU1>;
0149 next-level-cache = <&L2_CA57>;
0150 enable-method = "psci";
0151 cpu-idle-states = <&CPU_SLEEP_0>;
0152 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
0153 operating-points-v2 = <&cluster0_opp>;
0154 capacity-dmips-mhz = <1024>;
0155 #cooling-cells = <2>;
0156 };
0157
0158 a57_2: cpu@2 {
0159 compatible = "arm,cortex-a57";
0160 reg = <0x2>;
0161 device_type = "cpu";
0162 power-domains = <&sysc R8A774E1_PD_CA57_CPU2>;
0163 next-level-cache = <&L2_CA57>;
0164 enable-method = "psci";
0165 cpu-idle-states = <&CPU_SLEEP_0>;
0166 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
0167 operating-points-v2 = <&cluster0_opp>;
0168 capacity-dmips-mhz = <1024>;
0169 #cooling-cells = <2>;
0170 };
0171
0172 a57_3: cpu@3 {
0173 compatible = "arm,cortex-a57";
0174 reg = <0x3>;
0175 device_type = "cpu";
0176 power-domains = <&sysc R8A774E1_PD_CA57_CPU3>;
0177 next-level-cache = <&L2_CA57>;
0178 enable-method = "psci";
0179 cpu-idle-states = <&CPU_SLEEP_0>;
0180 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
0181 operating-points-v2 = <&cluster0_opp>;
0182 capacity-dmips-mhz = <1024>;
0183 #cooling-cells = <2>;
0184 };
0185
0186 a53_0: cpu@100 {
0187 compatible = "arm,cortex-a53";
0188 reg = <0x100>;
0189 device_type = "cpu";
0190 power-domains = <&sysc R8A774E1_PD_CA53_CPU0>;
0191 next-level-cache = <&L2_CA53>;
0192 enable-method = "psci";
0193 cpu-idle-states = <&CPU_SLEEP_1>;
0194 #cooling-cells = <2>;
0195 dynamic-power-coefficient = <277>;
0196 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
0197 operating-points-v2 = <&cluster1_opp>;
0198 capacity-dmips-mhz = <535>;
0199 };
0200
0201 a53_1: cpu@101 {
0202 compatible = "arm,cortex-a53";
0203 reg = <0x101>;
0204 device_type = "cpu";
0205 power-domains = <&sysc R8A774E1_PD_CA53_CPU1>;
0206 next-level-cache = <&L2_CA53>;
0207 enable-method = "psci";
0208 cpu-idle-states = <&CPU_SLEEP_1>;
0209 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
0210 operating-points-v2 = <&cluster1_opp>;
0211 capacity-dmips-mhz = <535>;
0212 };
0213
0214 a53_2: cpu@102 {
0215 compatible = "arm,cortex-a53";
0216 reg = <0x102>;
0217 device_type = "cpu";
0218 power-domains = <&sysc R8A774E1_PD_CA53_CPU2>;
0219 next-level-cache = <&L2_CA53>;
0220 enable-method = "psci";
0221 cpu-idle-states = <&CPU_SLEEP_1>;
0222 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
0223 operating-points-v2 = <&cluster1_opp>;
0224 capacity-dmips-mhz = <535>;
0225 };
0226
0227 a53_3: cpu@103 {
0228 compatible = "arm,cortex-a53";
0229 reg = <0x103>;
0230 device_type = "cpu";
0231 power-domains = <&sysc R8A774E1_PD_CA53_CPU3>;
0232 next-level-cache = <&L2_CA53>;
0233 enable-method = "psci";
0234 cpu-idle-states = <&CPU_SLEEP_1>;
0235 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
0236 operating-points-v2 = <&cluster1_opp>;
0237 capacity-dmips-mhz = <535>;
0238 };
0239
0240 L2_CA57: cache-controller-0 {
0241 compatible = "cache";
0242 power-domains = <&sysc R8A774E1_PD_CA57_SCU>;
0243 cache-unified;
0244 cache-level = <2>;
0245 };
0246
0247 L2_CA53: cache-controller-1 {
0248 compatible = "cache";
0249 power-domains = <&sysc R8A774E1_PD_CA53_SCU>;
0250 cache-unified;
0251 cache-level = <2>;
0252 };
0253
0254 idle-states {
0255 entry-method = "psci";
0256
0257 CPU_SLEEP_0: cpu-sleep-0 {
0258 compatible = "arm,idle-state";
0259 arm,psci-suspend-param = <0x0010000>;
0260 local-timer-stop;
0261 entry-latency-us = <400>;
0262 exit-latency-us = <500>;
0263 min-residency-us = <4000>;
0264 };
0265
0266 CPU_SLEEP_1: cpu-sleep-1 {
0267 compatible = "arm,idle-state";
0268 arm,psci-suspend-param = <0x0010000>;
0269 local-timer-stop;
0270 entry-latency-us = <700>;
0271 exit-latency-us = <700>;
0272 min-residency-us = <5000>;
0273 };
0274 };
0275 };
0276
0277 extal_clk: extal {
0278 compatible = "fixed-clock";
0279 #clock-cells = <0>;
0280 /* This value must be overridden by the board */
0281 clock-frequency = <0>;
0282 };
0283
0284 extalr_clk: extalr {
0285 compatible = "fixed-clock";
0286 #clock-cells = <0>;
0287 /* This value must be overridden by the board */
0288 clock-frequency = <0>;
0289 };
0290
0291 /* External PCIe clock - can be overridden by the board */
0292 pcie_bus_clk: pcie_bus {
0293 compatible = "fixed-clock";
0294 #clock-cells = <0>;
0295 clock-frequency = <0>;
0296 };
0297
0298 pmu_a53 {
0299 compatible = "arm,cortex-a53-pmu";
0300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0301 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
0302 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
0303 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
0305 };
0306
0307 pmu_a57 {
0308 compatible = "arm,cortex-a57-pmu";
0309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0310 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
0311 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
0312 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
0313 interrupt-affinity = <&a57_0>, <&a57_1>, <&a57_2>, <&a57_3>;
0314 };
0315
0316 psci {
0317 compatible = "arm,psci-1.0", "arm,psci-0.2";
0318 method = "smc";
0319 };
0320
0321 /* External SCIF clock - to be overridden by boards that provide it */
0322 scif_clk: scif {
0323 compatible = "fixed-clock";
0324 #clock-cells = <0>;
0325 clock-frequency = <0>;
0326 };
0327
0328 soc {
0329 compatible = "simple-bus";
0330 interrupt-parent = <&gic>;
0331 #address-cells = <2>;
0332 #size-cells = <2>;
0333 ranges;
0334
0335 rwdt: watchdog@e6020000 {
0336 compatible = "renesas,r8a774e1-wdt",
0337 "renesas,rcar-gen3-wdt";
0338 reg = <0 0xe6020000 0 0x0c>;
0339 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0340 clocks = <&cpg CPG_MOD 402>;
0341 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0342 resets = <&cpg 402>;
0343 status = "disabled";
0344 };
0345
0346 gpio0: gpio@e6050000 {
0347 compatible = "renesas,gpio-r8a774e1",
0348 "renesas,rcar-gen3-gpio";
0349 reg = <0 0xe6050000 0 0x50>;
0350 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0351 #gpio-cells = <2>;
0352 gpio-controller;
0353 gpio-ranges = <&pfc 0 0 16>;
0354 #interrupt-cells = <2>;
0355 interrupt-controller;
0356 clocks = <&cpg CPG_MOD 912>;
0357 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0358 resets = <&cpg 912>;
0359 };
0360
0361 gpio1: gpio@e6051000 {
0362 compatible = "renesas,gpio-r8a774e1",
0363 "renesas,rcar-gen3-gpio";
0364 reg = <0 0xe6051000 0 0x50>;
0365 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0366 #gpio-cells = <2>;
0367 gpio-controller;
0368 gpio-ranges = <&pfc 0 32 29>;
0369 #interrupt-cells = <2>;
0370 interrupt-controller;
0371 clocks = <&cpg CPG_MOD 911>;
0372 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0373 resets = <&cpg 911>;
0374 };
0375
0376 gpio2: gpio@e6052000 {
0377 compatible = "renesas,gpio-r8a774e1",
0378 "renesas,rcar-gen3-gpio";
0379 reg = <0 0xe6052000 0 0x50>;
0380 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0381 #gpio-cells = <2>;
0382 gpio-controller;
0383 gpio-ranges = <&pfc 0 64 15>;
0384 #interrupt-cells = <2>;
0385 interrupt-controller;
0386 clocks = <&cpg CPG_MOD 910>;
0387 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0388 resets = <&cpg 910>;
0389 };
0390
0391 gpio3: gpio@e6053000 {
0392 compatible = "renesas,gpio-r8a774e1",
0393 "renesas,rcar-gen3-gpio";
0394 reg = <0 0xe6053000 0 0x50>;
0395 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0396 #gpio-cells = <2>;
0397 gpio-controller;
0398 gpio-ranges = <&pfc 0 96 16>;
0399 #interrupt-cells = <2>;
0400 interrupt-controller;
0401 clocks = <&cpg CPG_MOD 909>;
0402 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0403 resets = <&cpg 909>;
0404 };
0405
0406 gpio4: gpio@e6054000 {
0407 compatible = "renesas,gpio-r8a774e1",
0408 "renesas,rcar-gen3-gpio";
0409 reg = <0 0xe6054000 0 0x50>;
0410 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0411 #gpio-cells = <2>;
0412 gpio-controller;
0413 gpio-ranges = <&pfc 0 128 18>;
0414 #interrupt-cells = <2>;
0415 interrupt-controller;
0416 clocks = <&cpg CPG_MOD 908>;
0417 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0418 resets = <&cpg 908>;
0419 };
0420
0421 gpio5: gpio@e6055000 {
0422 compatible = "renesas,gpio-r8a774e1",
0423 "renesas,rcar-gen3-gpio";
0424 reg = <0 0xe6055000 0 0x50>;
0425 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0426 #gpio-cells = <2>;
0427 gpio-controller;
0428 gpio-ranges = <&pfc 0 160 26>;
0429 #interrupt-cells = <2>;
0430 interrupt-controller;
0431 clocks = <&cpg CPG_MOD 907>;
0432 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0433 resets = <&cpg 907>;
0434 };
0435
0436 gpio6: gpio@e6055400 {
0437 compatible = "renesas,gpio-r8a774e1",
0438 "renesas,rcar-gen3-gpio";
0439 reg = <0 0xe6055400 0 0x50>;
0440 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0441 #gpio-cells = <2>;
0442 gpio-controller;
0443 gpio-ranges = <&pfc 0 192 32>;
0444 #interrupt-cells = <2>;
0445 interrupt-controller;
0446 clocks = <&cpg CPG_MOD 906>;
0447 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0448 resets = <&cpg 906>;
0449 };
0450
0451 gpio7: gpio@e6055800 {
0452 compatible = "renesas,gpio-r8a774e1",
0453 "renesas,rcar-gen3-gpio";
0454 reg = <0 0xe6055800 0 0x50>;
0455 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0456 #gpio-cells = <2>;
0457 gpio-controller;
0458 gpio-ranges = <&pfc 0 224 4>;
0459 #interrupt-cells = <2>;
0460 interrupt-controller;
0461 clocks = <&cpg CPG_MOD 905>;
0462 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0463 resets = <&cpg 905>;
0464 };
0465
0466 pfc: pinctrl@e6060000 {
0467 compatible = "renesas,pfc-r8a774e1";
0468 reg = <0 0xe6060000 0 0x50c>;
0469 };
0470
0471 cmt0: timer@e60f0000 {
0472 compatible = "renesas,r8a774e1-cmt0",
0473 "renesas,rcar-gen3-cmt0";
0474 reg = <0 0xe60f0000 0 0x1004>;
0475 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0476 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0477 clocks = <&cpg CPG_MOD 303>;
0478 clock-names = "fck";
0479 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0480 resets = <&cpg 303>;
0481 status = "disabled";
0482 };
0483
0484 cmt1: timer@e6130000 {
0485 compatible = "renesas,r8a774e1-cmt1",
0486 "renesas,rcar-gen3-cmt1";
0487 reg = <0 0xe6130000 0 0x1004>;
0488 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0489 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0490 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0491 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0492 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0493 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0494 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0495 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0496 clocks = <&cpg CPG_MOD 302>;
0497 clock-names = "fck";
0498 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0499 resets = <&cpg 302>;
0500 status = "disabled";
0501 };
0502
0503 cmt2: timer@e6140000 {
0504 compatible = "renesas,r8a774e1-cmt1",
0505 "renesas,rcar-gen3-cmt1";
0506 reg = <0 0xe6140000 0 0x1004>;
0507 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0508 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0509 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0510 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0511 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0512 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0513 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0514 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0515 clocks = <&cpg CPG_MOD 301>;
0516 clock-names = "fck";
0517 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0518 resets = <&cpg 301>;
0519 status = "disabled";
0520 };
0521
0522 cmt3: timer@e6148000 {
0523 compatible = "renesas,r8a774e1-cmt1",
0524 "renesas,rcar-gen3-cmt1";
0525 reg = <0 0xe6148000 0 0x1004>;
0526 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0527 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0528 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0529 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0530 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0531 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0532 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0533 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0534 clocks = <&cpg CPG_MOD 300>;
0535 clock-names = "fck";
0536 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0537 resets = <&cpg 300>;
0538 status = "disabled";
0539 };
0540
0541 cpg: clock-controller@e6150000 {
0542 compatible = "renesas,r8a774e1-cpg-mssr";
0543 reg = <0 0xe6150000 0 0x1000>;
0544 clocks = <&extal_clk>, <&extalr_clk>;
0545 clock-names = "extal", "extalr";
0546 #clock-cells = <2>;
0547 #power-domain-cells = <0>;
0548 #reset-cells = <1>;
0549 };
0550
0551 rst: reset-controller@e6160000 {
0552 compatible = "renesas,r8a774e1-rst";
0553 reg = <0 0xe6160000 0 0x0200>;
0554 };
0555
0556 sysc: system-controller@e6180000 {
0557 compatible = "renesas,r8a774e1-sysc";
0558 reg = <0 0xe6180000 0 0x0400>;
0559 #power-domain-cells = <1>;
0560 };
0561
0562 tsc: thermal@e6198000 {
0563 compatible = "renesas,r8a774e1-thermal";
0564 reg = <0 0xe6198000 0 0x100>,
0565 <0 0xe61a0000 0 0x100>,
0566 <0 0xe61a8000 0 0x100>;
0567 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0568 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0569 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0570 clocks = <&cpg CPG_MOD 522>;
0571 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0572 resets = <&cpg 522>;
0573 #thermal-sensor-cells = <1>;
0574 };
0575
0576 intc_ex: interrupt-controller@e61c0000 {
0577 compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc";
0578 #interrupt-cells = <2>;
0579 interrupt-controller;
0580 reg = <0 0xe61c0000 0 0x200>;
0581 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0582 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0583 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0584 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0585 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0586 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0587 clocks = <&cpg CPG_MOD 407>;
0588 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0589 resets = <&cpg 407>;
0590 };
0591
0592 tmu0: timer@e61e0000 {
0593 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
0594 reg = <0 0xe61e0000 0 0x30>;
0595 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0596 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0597 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0598 clocks = <&cpg CPG_MOD 125>;
0599 clock-names = "fck";
0600 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0601 resets = <&cpg 125>;
0602 status = "disabled";
0603 };
0604
0605 tmu1: timer@e6fc0000 {
0606 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
0607 reg = <0 0xe6fc0000 0 0x30>;
0608 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0609 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0610 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0611 clocks = <&cpg CPG_MOD 124>;
0612 clock-names = "fck";
0613 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0614 resets = <&cpg 124>;
0615 status = "disabled";
0616 };
0617
0618 tmu2: timer@e6fd0000 {
0619 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
0620 reg = <0 0xe6fd0000 0 0x30>;
0621 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0622 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0623 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0624 clocks = <&cpg CPG_MOD 123>;
0625 clock-names = "fck";
0626 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0627 resets = <&cpg 123>;
0628 status = "disabled";
0629 };
0630
0631 tmu3: timer@e6fe0000 {
0632 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
0633 reg = <0 0xe6fe0000 0 0x30>;
0634 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0635 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0636 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0637 clocks = <&cpg CPG_MOD 122>;
0638 clock-names = "fck";
0639 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0640 resets = <&cpg 122>;
0641 status = "disabled";
0642 };
0643
0644 tmu4: timer@ffc00000 {
0645 compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
0646 reg = <0 0xffc00000 0 0x30>;
0647 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0648 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0649 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0650 clocks = <&cpg CPG_MOD 121>;
0651 clock-names = "fck";
0652 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0653 resets = <&cpg 121>;
0654 status = "disabled";
0655 };
0656
0657 i2c0: i2c@e6500000 {
0658 #address-cells = <1>;
0659 #size-cells = <0>;
0660 compatible = "renesas,i2c-r8a774e1",
0661 "renesas,rcar-gen3-i2c";
0662 reg = <0 0xe6500000 0 0x40>;
0663 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0664 clocks = <&cpg CPG_MOD 931>;
0665 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0666 resets = <&cpg 931>;
0667 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0668 <&dmac2 0x91>, <&dmac2 0x90>;
0669 dma-names = "tx", "rx", "tx", "rx";
0670 i2c-scl-internal-delay-ns = <110>;
0671 status = "disabled";
0672 };
0673
0674 i2c1: i2c@e6508000 {
0675 #address-cells = <1>;
0676 #size-cells = <0>;
0677 compatible = "renesas,i2c-r8a774e1",
0678 "renesas,rcar-gen3-i2c";
0679 reg = <0 0xe6508000 0 0x40>;
0680 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0681 clocks = <&cpg CPG_MOD 930>;
0682 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0683 resets = <&cpg 930>;
0684 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0685 <&dmac2 0x93>, <&dmac2 0x92>;
0686 dma-names = "tx", "rx", "tx", "rx";
0687 i2c-scl-internal-delay-ns = <6>;
0688 status = "disabled";
0689 };
0690
0691 i2c2: i2c@e6510000 {
0692 #address-cells = <1>;
0693 #size-cells = <0>;
0694 compatible = "renesas,i2c-r8a774e1",
0695 "renesas,rcar-gen3-i2c";
0696 reg = <0 0xe6510000 0 0x40>;
0697 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0698 clocks = <&cpg CPG_MOD 929>;
0699 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0700 resets = <&cpg 929>;
0701 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0702 <&dmac2 0x95>, <&dmac2 0x94>;
0703 dma-names = "tx", "rx", "tx", "rx";
0704 i2c-scl-internal-delay-ns = <6>;
0705 status = "disabled";
0706 };
0707
0708 i2c3: i2c@e66d0000 {
0709 #address-cells = <1>;
0710 #size-cells = <0>;
0711 compatible = "renesas,i2c-r8a774e1",
0712 "renesas,rcar-gen3-i2c";
0713 reg = <0 0xe66d0000 0 0x40>;
0714 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0715 clocks = <&cpg CPG_MOD 928>;
0716 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0717 resets = <&cpg 928>;
0718 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0719 dma-names = "tx", "rx";
0720 i2c-scl-internal-delay-ns = <110>;
0721 status = "disabled";
0722 };
0723
0724 i2c4: i2c@e66d8000 {
0725 #address-cells = <1>;
0726 #size-cells = <0>;
0727 compatible = "renesas,i2c-r8a774e1",
0728 "renesas,rcar-gen3-i2c";
0729 reg = <0 0xe66d8000 0 0x40>;
0730 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0731 clocks = <&cpg CPG_MOD 927>;
0732 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0733 resets = <&cpg 927>;
0734 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
0735 dma-names = "tx", "rx";
0736 i2c-scl-internal-delay-ns = <110>;
0737 status = "disabled";
0738 };
0739
0740 i2c5: i2c@e66e0000 {
0741 #address-cells = <1>;
0742 #size-cells = <0>;
0743 compatible = "renesas,i2c-r8a774e1",
0744 "renesas,rcar-gen3-i2c";
0745 reg = <0 0xe66e0000 0 0x40>;
0746 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0747 clocks = <&cpg CPG_MOD 919>;
0748 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0749 resets = <&cpg 919>;
0750 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
0751 dma-names = "tx", "rx";
0752 i2c-scl-internal-delay-ns = <110>;
0753 status = "disabled";
0754 };
0755
0756 i2c6: i2c@e66e8000 {
0757 #address-cells = <1>;
0758 #size-cells = <0>;
0759 compatible = "renesas,i2c-r8a774e1",
0760 "renesas,rcar-gen3-i2c";
0761 reg = <0 0xe66e8000 0 0x40>;
0762 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0763 clocks = <&cpg CPG_MOD 918>;
0764 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0765 resets = <&cpg 918>;
0766 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
0767 dma-names = "tx", "rx";
0768 i2c-scl-internal-delay-ns = <6>;
0769 status = "disabled";
0770 };
0771
0772 i2c_dvfs: i2c@e60b0000 {
0773 #address-cells = <1>;
0774 #size-cells = <0>;
0775 compatible = "renesas,iic-r8a774e1",
0776 "renesas,rcar-gen3-iic",
0777 "renesas,rmobile-iic";
0778 reg = <0 0xe60b0000 0 0x425>;
0779 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0780 clocks = <&cpg CPG_MOD 926>;
0781 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0782 resets = <&cpg 926>;
0783 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
0784 dma-names = "tx", "rx";
0785 status = "disabled";
0786 };
0787
0788 hscif0: serial@e6540000 {
0789 compatible = "renesas,hscif-r8a774e1",
0790 "renesas,rcar-gen3-hscif",
0791 "renesas,hscif";
0792 reg = <0 0xe6540000 0 0x60>;
0793 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0794 clocks = <&cpg CPG_MOD 520>,
0795 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
0796 <&scif_clk>;
0797 clock-names = "fck", "brg_int", "scif_clk";
0798 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0799 <&dmac2 0x31>, <&dmac2 0x30>;
0800 dma-names = "tx", "rx", "tx", "rx";
0801 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0802 resets = <&cpg 520>;
0803 status = "disabled";
0804 };
0805
0806 hscif1: serial@e6550000 {
0807 compatible = "renesas,hscif-r8a774e1",
0808 "renesas,rcar-gen3-hscif",
0809 "renesas,hscif";
0810 reg = <0 0xe6550000 0 0x60>;
0811 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0812 clocks = <&cpg CPG_MOD 519>,
0813 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
0814 <&scif_clk>;
0815 clock-names = "fck", "brg_int", "scif_clk";
0816 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0817 <&dmac2 0x33>, <&dmac2 0x32>;
0818 dma-names = "tx", "rx", "tx", "rx";
0819 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0820 resets = <&cpg 519>;
0821 status = "disabled";
0822 };
0823
0824 hscif2: serial@e6560000 {
0825 compatible = "renesas,hscif-r8a774e1",
0826 "renesas,rcar-gen3-hscif",
0827 "renesas,hscif";
0828 reg = <0 0xe6560000 0 0x60>;
0829 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0830 clocks = <&cpg CPG_MOD 518>,
0831 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
0832 <&scif_clk>;
0833 clock-names = "fck", "brg_int", "scif_clk";
0834 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0835 <&dmac2 0x35>, <&dmac2 0x34>;
0836 dma-names = "tx", "rx", "tx", "rx";
0837 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0838 resets = <&cpg 518>;
0839 status = "disabled";
0840 };
0841
0842 hscif3: serial@e66a0000 {
0843 compatible = "renesas,hscif-r8a774e1",
0844 "renesas,rcar-gen3-hscif",
0845 "renesas,hscif";
0846 reg = <0 0xe66a0000 0 0x60>;
0847 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0848 clocks = <&cpg CPG_MOD 517>,
0849 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
0850 <&scif_clk>;
0851 clock-names = "fck", "brg_int", "scif_clk";
0852 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0853 dma-names = "tx", "rx";
0854 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0855 resets = <&cpg 517>;
0856 status = "disabled";
0857 };
0858
0859 hscif4: serial@e66b0000 {
0860 compatible = "renesas,hscif-r8a774e1",
0861 "renesas,rcar-gen3-hscif",
0862 "renesas,hscif";
0863 reg = <0 0xe66b0000 0 0x60>;
0864 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0865 clocks = <&cpg CPG_MOD 516>,
0866 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
0867 <&scif_clk>;
0868 clock-names = "fck", "brg_int", "scif_clk";
0869 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
0870 dma-names = "tx", "rx";
0871 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0872 resets = <&cpg 516>;
0873 status = "disabled";
0874 };
0875
0876 hsusb: usb@e6590000 {
0877 compatible = "renesas,usbhs-r8a774e1",
0878 "renesas,rcar-gen3-usbhs";
0879 reg = <0 0xe6590000 0 0x200>;
0880 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0881 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0882 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0883 <&usb_dmac1 0>, <&usb_dmac1 1>;
0884 dma-names = "ch0", "ch1", "ch2", "ch3";
0885 renesas,buswait = <11>;
0886 phys = <&usb2_phy0 3>;
0887 phy-names = "usb";
0888 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0889 resets = <&cpg 704>, <&cpg 703>;
0890 status = "disabled";
0891 };
0892
0893 usb2_clksel: clock-controller@e6590630 {
0894 compatible = "renesas,r8a774e1-rcar-usb2-clock-sel",
0895 "renesas,rcar-gen3-usb2-clock-sel";
0896 reg = <0 0xe6590630 0 0x02>;
0897 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
0898 <&usb_extal_clk>, <&usb3s0_clk>;
0899 clock-names = "ehci_ohci", "hs-usb-if",
0900 "usb_extal", "usb_xtal";
0901 #clock-cells = <0>;
0902 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0903 resets = <&cpg 703>, <&cpg 704>;
0904 reset-names = "ehci_ohci", "hs-usb-if";
0905 status = "disabled";
0906 };
0907
0908 usb_dmac0: dma-controller@e65a0000 {
0909 compatible = "renesas,r8a774e1-usb-dmac",
0910 "renesas,usb-dmac";
0911 reg = <0 0xe65a0000 0 0x100>;
0912 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0913 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0914 interrupt-names = "ch0", "ch1";
0915 clocks = <&cpg CPG_MOD 330>;
0916 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0917 resets = <&cpg 330>;
0918 #dma-cells = <1>;
0919 dma-channels = <2>;
0920 };
0921
0922 usb_dmac1: dma-controller@e65b0000 {
0923 compatible = "renesas,r8a774e1-usb-dmac",
0924 "renesas,usb-dmac";
0925 reg = <0 0xe65b0000 0 0x100>;
0926 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0927 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0928 interrupt-names = "ch0", "ch1";
0929 clocks = <&cpg CPG_MOD 331>;
0930 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0931 resets = <&cpg 331>;
0932 #dma-cells = <1>;
0933 dma-channels = <2>;
0934 };
0935
0936 usb3_phy0: usb-phy@e65ee000 {
0937 compatible = "renesas,r8a774e1-usb3-phy",
0938 "renesas,rcar-gen3-usb3-phy";
0939 reg = <0 0xe65ee000 0 0x90>;
0940 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
0941 <&usb_extal_clk>;
0942 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
0943 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0944 resets = <&cpg 328>;
0945 #phy-cells = <0>;
0946 status = "disabled";
0947 };
0948
0949 dmac0: dma-controller@e6700000 {
0950 compatible = "renesas,dmac-r8a774e1",
0951 "renesas,rcar-dmac";
0952 reg = <0 0xe6700000 0 0x10000>;
0953 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0954 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0955 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0956 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0957 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0958 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0959 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0960 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0961 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0962 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0963 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0964 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0965 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0966 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0967 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0968 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
0969 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0970 interrupt-names = "error",
0971 "ch0", "ch1", "ch2", "ch3",
0972 "ch4", "ch5", "ch6", "ch7",
0973 "ch8", "ch9", "ch10", "ch11",
0974 "ch12", "ch13", "ch14", "ch15";
0975 clocks = <&cpg CPG_MOD 219>;
0976 clock-names = "fck";
0977 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
0978 resets = <&cpg 219>;
0979 #dma-cells = <1>;
0980 dma-channels = <16>;
0981 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0982 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0983 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0984 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
0985 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
0986 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
0987 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
0988 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
0989 };
0990
0991 dmac1: dma-controller@e7300000 {
0992 compatible = "renesas,dmac-r8a774e1",
0993 "renesas,rcar-dmac";
0994 reg = <0 0xe7300000 0 0x10000>;
0995 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0996 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0997 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0998 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0999 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1000 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1001 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1002 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1003 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1004 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1005 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1006 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1007 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1008 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1009 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1010 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1011 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1012 interrupt-names = "error",
1013 "ch0", "ch1", "ch2", "ch3",
1014 "ch4", "ch5", "ch6", "ch7",
1015 "ch8", "ch9", "ch10", "ch11",
1016 "ch12", "ch13", "ch14", "ch15";
1017 clocks = <&cpg CPG_MOD 218>;
1018 clock-names = "fck";
1019 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1020 resets = <&cpg 218>;
1021 #dma-cells = <1>;
1022 dma-channels = <16>;
1023 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1024 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1025 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1026 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1027 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1028 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1029 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1030 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1031 };
1032
1033 dmac2: dma-controller@e7310000 {
1034 compatible = "renesas,dmac-r8a774e1",
1035 "renesas,rcar-dmac";
1036 reg = <0 0xe7310000 0 0x10000>;
1037 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1038 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1039 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1040 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1041 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1042 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1043 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1044 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1045 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1046 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1047 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1048 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1049 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1050 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1051 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1052 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1053 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1054 interrupt-names = "error",
1055 "ch0", "ch1", "ch2", "ch3",
1056 "ch4", "ch5", "ch6", "ch7",
1057 "ch8", "ch9", "ch10", "ch11",
1058 "ch12", "ch13", "ch14", "ch15";
1059 clocks = <&cpg CPG_MOD 217>;
1060 clock-names = "fck";
1061 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1062 resets = <&cpg 217>;
1063 #dma-cells = <1>;
1064 dma-channels = <16>;
1065 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1066 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1067 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1068 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1069 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1070 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1071 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1072 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1073 };
1074
1075 ipmmu_ds0: iommu@e6740000 {
1076 compatible = "renesas,ipmmu-r8a774e1";
1077 reg = <0 0xe6740000 0 0x1000>;
1078 renesas,ipmmu-main = <&ipmmu_mm 0>;
1079 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1080 #iommu-cells = <1>;
1081 };
1082
1083 ipmmu_ds1: iommu@e7740000 {
1084 compatible = "renesas,ipmmu-r8a774e1";
1085 reg = <0 0xe7740000 0 0x1000>;
1086 renesas,ipmmu-main = <&ipmmu_mm 1>;
1087 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1088 #iommu-cells = <1>;
1089 };
1090
1091 ipmmu_hc: iommu@e6570000 {
1092 compatible = "renesas,ipmmu-r8a774e1";
1093 reg = <0 0xe6570000 0 0x1000>;
1094 renesas,ipmmu-main = <&ipmmu_mm 2>;
1095 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1096 #iommu-cells = <1>;
1097 };
1098
1099 ipmmu_mm: iommu@e67b0000 {
1100 compatible = "renesas,ipmmu-r8a774e1";
1101 reg = <0 0xe67b0000 0 0x1000>;
1102 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1103 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1104 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1105 #iommu-cells = <1>;
1106 };
1107
1108 ipmmu_mp0: iommu@ec670000 {
1109 compatible = "renesas,ipmmu-r8a774e1";
1110 reg = <0 0xec670000 0 0x1000>;
1111 renesas,ipmmu-main = <&ipmmu_mm 4>;
1112 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1113 #iommu-cells = <1>;
1114 };
1115
1116 ipmmu_pv0: iommu@fd800000 {
1117 compatible = "renesas,ipmmu-r8a774e1";
1118 reg = <0 0xfd800000 0 0x1000>;
1119 renesas,ipmmu-main = <&ipmmu_mm 6>;
1120 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1121 #iommu-cells = <1>;
1122 };
1123
1124 ipmmu_pv1: iommu@fd950000 {
1125 compatible = "renesas,ipmmu-r8a774e1";
1126 reg = <0 0xfd950000 0 0x1000>;
1127 renesas,ipmmu-main = <&ipmmu_mm 7>;
1128 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1129 #iommu-cells = <1>;
1130 };
1131
1132 ipmmu_pv2: iommu@fd960000 {
1133 compatible = "renesas,ipmmu-r8a774e1";
1134 reg = <0 0xfd960000 0 0x1000>;
1135 renesas,ipmmu-main = <&ipmmu_mm 8>;
1136 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1137 #iommu-cells = <1>;
1138 };
1139
1140 ipmmu_pv3: iommu@fd970000 {
1141 compatible = "renesas,ipmmu-r8a774e1";
1142 reg = <0 0xfd970000 0 0x1000>;
1143 renesas,ipmmu-main = <&ipmmu_mm 9>;
1144 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1145 #iommu-cells = <1>;
1146 };
1147
1148 ipmmu_vc0: iommu@fe6b0000 {
1149 compatible = "renesas,ipmmu-r8a774e1";
1150 reg = <0 0xfe6b0000 0 0x1000>;
1151 renesas,ipmmu-main = <&ipmmu_mm 12>;
1152 power-domains = <&sysc R8A774E1_PD_A3VC>;
1153 #iommu-cells = <1>;
1154 };
1155
1156 ipmmu_vc1: iommu@fe6f0000 {
1157 compatible = "renesas,ipmmu-r8a774e1";
1158 reg = <0 0xfe6f0000 0 0x1000>;
1159 renesas,ipmmu-main = <&ipmmu_mm 13>;
1160 power-domains = <&sysc R8A774E1_PD_A3VC>;
1161 #iommu-cells = <1>;
1162 };
1163
1164 ipmmu_vi0: iommu@febd0000 {
1165 compatible = "renesas,ipmmu-r8a774e1";
1166 reg = <0 0xfebd0000 0 0x1000>;
1167 renesas,ipmmu-main = <&ipmmu_mm 14>;
1168 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1169 #iommu-cells = <1>;
1170 };
1171
1172 ipmmu_vi1: iommu@febe0000 {
1173 compatible = "renesas,ipmmu-r8a774e1";
1174 reg = <0 0xfebe0000 0 0x1000>;
1175 renesas,ipmmu-main = <&ipmmu_mm 15>;
1176 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1177 #iommu-cells = <1>;
1178 };
1179
1180 ipmmu_vp0: iommu@fe990000 {
1181 compatible = "renesas,ipmmu-r8a774e1";
1182 reg = <0 0xfe990000 0 0x1000>;
1183 renesas,ipmmu-main = <&ipmmu_mm 16>;
1184 power-domains = <&sysc R8A774E1_PD_A3VP>;
1185 #iommu-cells = <1>;
1186 };
1187
1188 ipmmu_vp1: iommu@fe980000 {
1189 compatible = "renesas,ipmmu-r8a774e1";
1190 reg = <0 0xfe980000 0 0x1000>;
1191 renesas,ipmmu-main = <&ipmmu_mm 17>;
1192 power-domains = <&sysc R8A774E1_PD_A3VP>;
1193 #iommu-cells = <1>;
1194 };
1195
1196 avb: ethernet@e6800000 {
1197 compatible = "renesas,etheravb-r8a774e1",
1198 "renesas,etheravb-rcar-gen3";
1199 reg = <0 0xe6800000 0 0x800>;
1200 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1201 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1202 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1203 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1204 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1205 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1206 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1207 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1208 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1209 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1210 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1211 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1212 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1213 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1214 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1215 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1216 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1217 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1218 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1219 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1220 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1221 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1222 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1223 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1224 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1225 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1226 "ch4", "ch5", "ch6", "ch7",
1227 "ch8", "ch9", "ch10", "ch11",
1228 "ch12", "ch13", "ch14", "ch15",
1229 "ch16", "ch17", "ch18", "ch19",
1230 "ch20", "ch21", "ch22", "ch23",
1231 "ch24";
1232 clocks = <&cpg CPG_MOD 812>;
1233 clock-names = "fck";
1234 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1235 resets = <&cpg 812>;
1236 phy-mode = "rgmii";
1237 rx-internal-delay-ps = <0>;
1238 tx-internal-delay-ps = <0>;
1239 iommus = <&ipmmu_ds0 16>;
1240 #address-cells = <1>;
1241 #size-cells = <0>;
1242 status = "disabled";
1243 };
1244
1245 can0: can@e6c30000 {
1246 compatible = "renesas,can-r8a774e1",
1247 "renesas,rcar-gen3-can";
1248 reg = <0 0xe6c30000 0 0x1000>;
1249 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 916>,
1251 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1252 <&can_clk>;
1253 clock-names = "clkp1", "clkp2", "can_clk";
1254 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1255 assigned-clock-rates = <40000000>;
1256 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1257 resets = <&cpg 916>;
1258 status = "disabled";
1259 };
1260
1261 can1: can@e6c38000 {
1262 compatible = "renesas,can-r8a774e1",
1263 "renesas,rcar-gen3-can";
1264 reg = <0 0xe6c38000 0 0x1000>;
1265 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 915>,
1267 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1268 <&can_clk>;
1269 clock-names = "clkp1", "clkp2", "can_clk";
1270 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1271 assigned-clock-rates = <40000000>;
1272 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1273 resets = <&cpg 915>;
1274 status = "disabled";
1275 };
1276
1277 canfd: can@e66c0000 {
1278 compatible = "renesas,r8a774e1-canfd",
1279 "renesas,rcar-gen3-canfd";
1280 reg = <0 0xe66c0000 0 0x8000>;
1281 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1282 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1283 interrupt-names = "ch_int", "g_int";
1284 clocks = <&cpg CPG_MOD 914>,
1285 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1286 <&can_clk>;
1287 clock-names = "fck", "canfd", "can_clk";
1288 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1289 assigned-clock-rates = <40000000>;
1290 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1291 resets = <&cpg 914>;
1292 status = "disabled";
1293
1294 channel0 {
1295 status = "disabled";
1296 };
1297
1298 channel1 {
1299 status = "disabled";
1300 };
1301 };
1302
1303 pwm0: pwm@e6e30000 {
1304 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1305 reg = <0 0xe6e30000 0 0x8>;
1306 clocks = <&cpg CPG_MOD 523>;
1307 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1308 resets = <&cpg 523>;
1309 #pwm-cells = <2>;
1310 status = "disabled";
1311 };
1312
1313 pwm1: pwm@e6e31000 {
1314 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1315 reg = <0 0xe6e31000 0 0x8>;
1316 clocks = <&cpg CPG_MOD 523>;
1317 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1318 resets = <&cpg 523>;
1319 #pwm-cells = <2>;
1320 status = "disabled";
1321 };
1322
1323 pwm2: pwm@e6e32000 {
1324 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1325 reg = <0 0xe6e32000 0 0x8>;
1326 clocks = <&cpg CPG_MOD 523>;
1327 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1328 resets = <&cpg 523>;
1329 #pwm-cells = <2>;
1330 status = "disabled";
1331 };
1332
1333 pwm3: pwm@e6e33000 {
1334 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1335 reg = <0 0xe6e33000 0 0x8>;
1336 clocks = <&cpg CPG_MOD 523>;
1337 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1338 resets = <&cpg 523>;
1339 #pwm-cells = <2>;
1340 status = "disabled";
1341 };
1342
1343 pwm4: pwm@e6e34000 {
1344 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1345 reg = <0 0xe6e34000 0 0x8>;
1346 clocks = <&cpg CPG_MOD 523>;
1347 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1348 resets = <&cpg 523>;
1349 #pwm-cells = <2>;
1350 status = "disabled";
1351 };
1352
1353 pwm5: pwm@e6e35000 {
1354 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1355 reg = <0 0xe6e35000 0 0x8>;
1356 clocks = <&cpg CPG_MOD 523>;
1357 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1358 resets = <&cpg 523>;
1359 #pwm-cells = <2>;
1360 status = "disabled";
1361 };
1362
1363 pwm6: pwm@e6e36000 {
1364 compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar";
1365 reg = <0 0xe6e36000 0 0x8>;
1366 clocks = <&cpg CPG_MOD 523>;
1367 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1368 resets = <&cpg 523>;
1369 #pwm-cells = <2>;
1370 status = "disabled";
1371 };
1372
1373 scif0: serial@e6e60000 {
1374 compatible = "renesas,scif-r8a774e1",
1375 "renesas,rcar-gen3-scif", "renesas,scif";
1376 reg = <0 0xe6e60000 0 0x40>;
1377 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1378 clocks = <&cpg CPG_MOD 207>,
1379 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1380 <&scif_clk>;
1381 clock-names = "fck", "brg_int", "scif_clk";
1382 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1383 <&dmac2 0x51>, <&dmac2 0x50>;
1384 dma-names = "tx", "rx", "tx", "rx";
1385 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1386 resets = <&cpg 207>;
1387 status = "disabled";
1388 };
1389
1390 scif1: serial@e6e68000 {
1391 compatible = "renesas,scif-r8a774e1",
1392 "renesas,rcar-gen3-scif", "renesas,scif";
1393 reg = <0 0xe6e68000 0 0x40>;
1394 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1395 clocks = <&cpg CPG_MOD 206>,
1396 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1397 <&scif_clk>;
1398 clock-names = "fck", "brg_int", "scif_clk";
1399 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1400 <&dmac2 0x53>, <&dmac2 0x52>;
1401 dma-names = "tx", "rx", "tx", "rx";
1402 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1403 resets = <&cpg 206>;
1404 status = "disabled";
1405 };
1406
1407 scif2: serial@e6e88000 {
1408 compatible = "renesas,scif-r8a774e1",
1409 "renesas,rcar-gen3-scif", "renesas,scif";
1410 reg = <0 0xe6e88000 0 0x40>;
1411 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1412 clocks = <&cpg CPG_MOD 310>,
1413 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1414 <&scif_clk>;
1415 clock-names = "fck", "brg_int", "scif_clk";
1416 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1417 <&dmac2 0x13>, <&dmac2 0x12>;
1418 dma-names = "tx", "rx", "tx", "rx";
1419 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1420 resets = <&cpg 310>;
1421 status = "disabled";
1422 };
1423
1424 scif3: serial@e6c50000 {
1425 compatible = "renesas,scif-r8a774e1",
1426 "renesas,rcar-gen3-scif", "renesas,scif";
1427 reg = <0 0xe6c50000 0 0x40>;
1428 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1429 clocks = <&cpg CPG_MOD 204>,
1430 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1431 <&scif_clk>;
1432 clock-names = "fck", "brg_int", "scif_clk";
1433 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1434 dma-names = "tx", "rx";
1435 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1436 resets = <&cpg 204>;
1437 status = "disabled";
1438 };
1439
1440 scif4: serial@e6c40000 {
1441 compatible = "renesas,scif-r8a774e1",
1442 "renesas,rcar-gen3-scif", "renesas,scif";
1443 reg = <0 0xe6c40000 0 0x40>;
1444 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1445 clocks = <&cpg CPG_MOD 203>,
1446 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1447 <&scif_clk>;
1448 clock-names = "fck", "brg_int", "scif_clk";
1449 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1450 dma-names = "tx", "rx";
1451 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1452 resets = <&cpg 203>;
1453 status = "disabled";
1454 };
1455
1456 scif5: serial@e6f30000 {
1457 compatible = "renesas,scif-r8a774e1",
1458 "renesas,rcar-gen3-scif", "renesas,scif";
1459 reg = <0 0xe6f30000 0 0x40>;
1460 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1461 clocks = <&cpg CPG_MOD 202>,
1462 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1463 <&scif_clk>;
1464 clock-names = "fck", "brg_int", "scif_clk";
1465 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1466 <&dmac2 0x5b>, <&dmac2 0x5a>;
1467 dma-names = "tx", "rx", "tx", "rx";
1468 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1469 resets = <&cpg 202>;
1470 status = "disabled";
1471 };
1472
1473 msiof0: spi@e6e90000 {
1474 compatible = "renesas,msiof-r8a774e1",
1475 "renesas,rcar-gen3-msiof";
1476 reg = <0 0xe6e90000 0 0x0064>;
1477 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1478 clocks = <&cpg CPG_MOD 211>;
1479 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1480 <&dmac2 0x41>, <&dmac2 0x40>;
1481 dma-names = "tx", "rx", "tx", "rx";
1482 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1483 resets = <&cpg 211>;
1484 #address-cells = <1>;
1485 #size-cells = <0>;
1486 status = "disabled";
1487 };
1488
1489 msiof1: spi@e6ea0000 {
1490 compatible = "renesas,msiof-r8a774e1",
1491 "renesas,rcar-gen3-msiof";
1492 reg = <0 0xe6ea0000 0 0x0064>;
1493 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&cpg CPG_MOD 210>;
1495 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1496 <&dmac2 0x43>, <&dmac2 0x42>;
1497 dma-names = "tx", "rx", "tx", "rx";
1498 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1499 resets = <&cpg 210>;
1500 #address-cells = <1>;
1501 #size-cells = <0>;
1502 status = "disabled";
1503 };
1504
1505 msiof2: spi@e6c00000 {
1506 compatible = "renesas,msiof-r8a774e1",
1507 "renesas,rcar-gen3-msiof";
1508 reg = <0 0xe6c00000 0 0x0064>;
1509 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1510 clocks = <&cpg CPG_MOD 209>;
1511 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1512 dma-names = "tx", "rx";
1513 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1514 resets = <&cpg 209>;
1515 #address-cells = <1>;
1516 #size-cells = <0>;
1517 status = "disabled";
1518 };
1519
1520 msiof3: spi@e6c10000 {
1521 compatible = "renesas,msiof-r8a774e1",
1522 "renesas,rcar-gen3-msiof";
1523 reg = <0 0xe6c10000 0 0x0064>;
1524 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1525 clocks = <&cpg CPG_MOD 208>;
1526 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1527 dma-names = "tx", "rx";
1528 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1529 resets = <&cpg 208>;
1530 #address-cells = <1>;
1531 #size-cells = <0>;
1532 status = "disabled";
1533 };
1534
1535 vin0: video@e6ef0000 {
1536 compatible = "renesas,vin-r8a774e1";
1537 reg = <0 0xe6ef0000 0 0x1000>;
1538 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1539 clocks = <&cpg CPG_MOD 811>;
1540 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1541 resets = <&cpg 811>;
1542 renesas,id = <0>;
1543 status = "disabled";
1544
1545 ports {
1546 #address-cells = <1>;
1547 #size-cells = <0>;
1548
1549 port@1 {
1550 #address-cells = <1>;
1551 #size-cells = <0>;
1552
1553 reg = <1>;
1554
1555 vin0csi20: endpoint@0 {
1556 reg = <0>;
1557 remote-endpoint = <&csi20vin0>;
1558 };
1559 vin0csi40: endpoint@2 {
1560 reg = <2>;
1561 remote-endpoint = <&csi40vin0>;
1562 };
1563 };
1564 };
1565 };
1566
1567 vin1: video@e6ef1000 {
1568 compatible = "renesas,vin-r8a774e1";
1569 reg = <0 0xe6ef1000 0 0x1000>;
1570 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1571 clocks = <&cpg CPG_MOD 810>;
1572 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1573 resets = <&cpg 810>;
1574 renesas,id = <1>;
1575 status = "disabled";
1576
1577 ports {
1578 #address-cells = <1>;
1579 #size-cells = <0>;
1580
1581 port@1 {
1582 #address-cells = <1>;
1583 #size-cells = <0>;
1584
1585 reg = <1>;
1586
1587 vin1csi20: endpoint@0 {
1588 reg = <0>;
1589 remote-endpoint = <&csi20vin1>;
1590 };
1591 vin1csi40: endpoint@2 {
1592 reg = <2>;
1593 remote-endpoint = <&csi40vin1>;
1594 };
1595 };
1596 };
1597 };
1598
1599 vin2: video@e6ef2000 {
1600 compatible = "renesas,vin-r8a774e1";
1601 reg = <0 0xe6ef2000 0 0x1000>;
1602 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1603 clocks = <&cpg CPG_MOD 809>;
1604 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1605 resets = <&cpg 809>;
1606 renesas,id = <2>;
1607 status = "disabled";
1608
1609 ports {
1610 #address-cells = <1>;
1611 #size-cells = <0>;
1612
1613 port@1 {
1614 #address-cells = <1>;
1615 #size-cells = <0>;
1616
1617 reg = <1>;
1618
1619 vin2csi20: endpoint@0 {
1620 reg = <0>;
1621 remote-endpoint = <&csi20vin2>;
1622 };
1623 vin2csi40: endpoint@2 {
1624 reg = <2>;
1625 remote-endpoint = <&csi40vin2>;
1626 };
1627 };
1628 };
1629 };
1630
1631 vin3: video@e6ef3000 {
1632 compatible = "renesas,vin-r8a774e1";
1633 reg = <0 0xe6ef3000 0 0x1000>;
1634 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1635 clocks = <&cpg CPG_MOD 808>;
1636 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1637 resets = <&cpg 808>;
1638 renesas,id = <3>;
1639 status = "disabled";
1640
1641 ports {
1642 #address-cells = <1>;
1643 #size-cells = <0>;
1644
1645 port@1 {
1646 #address-cells = <1>;
1647 #size-cells = <0>;
1648
1649 reg = <1>;
1650
1651 vin3csi20: endpoint@0 {
1652 reg = <0>;
1653 remote-endpoint = <&csi20vin3>;
1654 };
1655 vin3csi40: endpoint@2 {
1656 reg = <2>;
1657 remote-endpoint = <&csi40vin3>;
1658 };
1659 };
1660 };
1661 };
1662
1663 vin4: video@e6ef4000 {
1664 compatible = "renesas,vin-r8a774e1";
1665 reg = <0 0xe6ef4000 0 0x1000>;
1666 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1667 clocks = <&cpg CPG_MOD 807>;
1668 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1669 resets = <&cpg 807>;
1670 renesas,id = <4>;
1671 status = "disabled";
1672
1673 ports {
1674 #address-cells = <1>;
1675 #size-cells = <0>;
1676
1677 port@1 {
1678 #address-cells = <1>;
1679 #size-cells = <0>;
1680
1681 reg = <1>;
1682
1683 vin4csi20: endpoint@0 {
1684 reg = <0>;
1685 remote-endpoint = <&csi20vin4>;
1686 };
1687 };
1688 };
1689 };
1690
1691 vin5: video@e6ef5000 {
1692 compatible = "renesas,vin-r8a774e1";
1693 reg = <0 0xe6ef5000 0 0x1000>;
1694 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1695 clocks = <&cpg CPG_MOD 806>;
1696 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1697 resets = <&cpg 806>;
1698 renesas,id = <5>;
1699 status = "disabled";
1700
1701 ports {
1702 #address-cells = <1>;
1703 #size-cells = <0>;
1704
1705 port@1 {
1706 #address-cells = <1>;
1707 #size-cells = <0>;
1708
1709 reg = <1>;
1710
1711 vin5csi20: endpoint@0 {
1712 reg = <0>;
1713 remote-endpoint = <&csi20vin5>;
1714 };
1715 };
1716 };
1717 };
1718
1719 vin6: video@e6ef6000 {
1720 compatible = "renesas,vin-r8a774e1";
1721 reg = <0 0xe6ef6000 0 0x1000>;
1722 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1723 clocks = <&cpg CPG_MOD 805>;
1724 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1725 resets = <&cpg 805>;
1726 renesas,id = <6>;
1727 status = "disabled";
1728
1729 ports {
1730 #address-cells = <1>;
1731 #size-cells = <0>;
1732
1733 port@1 {
1734 #address-cells = <1>;
1735 #size-cells = <0>;
1736
1737 reg = <1>;
1738
1739 vin6csi20: endpoint@0 {
1740 reg = <0>;
1741 remote-endpoint = <&csi20vin6>;
1742 };
1743 };
1744 };
1745 };
1746
1747 vin7: video@e6ef7000 {
1748 compatible = "renesas,vin-r8a774e1";
1749 reg = <0 0xe6ef7000 0 0x1000>;
1750 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1751 clocks = <&cpg CPG_MOD 804>;
1752 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1753 resets = <&cpg 804>;
1754 renesas,id = <7>;
1755 status = "disabled";
1756
1757 ports {
1758 #address-cells = <1>;
1759 #size-cells = <0>;
1760
1761 port@1 {
1762 #address-cells = <1>;
1763 #size-cells = <0>;
1764
1765 reg = <1>;
1766
1767 vin7csi20: endpoint@0 {
1768 reg = <0>;
1769 remote-endpoint = <&csi20vin7>;
1770 };
1771 };
1772 };
1773 };
1774
1775 rcar_sound: sound@ec500000 {
1776 /*
1777 * #sound-dai-cells is required
1778 *
1779 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1780 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1781 */
1782 /*
1783 * #clock-cells is required for audio_clkout0/1/2/3
1784 *
1785 * clkout : #clock-cells = <0>; <&rcar_sound>;
1786 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1787 */
1788 compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3";
1789 reg = <0 0xec500000 0 0x1000>, /* SCU */
1790 <0 0xec5a0000 0 0x100>, /* ADG */
1791 <0 0xec540000 0 0x1000>, /* SSIU */
1792 <0 0xec541000 0 0x280>, /* SSI */
1793 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1794 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1795
1796 clocks = <&cpg CPG_MOD 1005>,
1797 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1798 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1799 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1800 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1801 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1802 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1803 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1804 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1805 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1806 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1807 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1808 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1809 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1810 <&audio_clk_a>, <&audio_clk_b>,
1811 <&audio_clk_c>,
1812 <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
1813 clock-names = "ssi-all",
1814 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1815 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1816 "ssi.1", "ssi.0",
1817 "src.9", "src.8", "src.7", "src.6",
1818 "src.5", "src.4", "src.3", "src.2",
1819 "src.1", "src.0",
1820 "mix.1", "mix.0",
1821 "ctu.1", "ctu.0",
1822 "dvc.0", "dvc.1",
1823 "clk_a", "clk_b", "clk_c", "clk_i";
1824 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
1825 resets = <&cpg 1005>,
1826 <&cpg 1006>, <&cpg 1007>,
1827 <&cpg 1008>, <&cpg 1009>,
1828 <&cpg 1010>, <&cpg 1011>,
1829 <&cpg 1012>, <&cpg 1013>,
1830 <&cpg 1014>, <&cpg 1015>;
1831 reset-names = "ssi-all",
1832 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1833 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1834 "ssi.1", "ssi.0";
1835 status = "disabled";
1836
1837 rcar_sound,dvc {
1838 dvc0: dvc-0 {
1839 dmas = <&audma1 0xbc>;
1840 dma-names = "tx";
1841 };
1842 dvc1: dvc-1 {
1843 dmas = <&audma1 0xbe>;
1844 dma-names = "tx";
1845 };
1846 };
1847
1848 rcar_sound,mix {
1849 mix0: mix-0 { };
1850 mix1: mix-1 { };
1851 };
1852
1853 rcar_sound,ctu {
1854 ctu00: ctu-0 { };
1855 ctu01: ctu-1 { };
1856 ctu02: ctu-2 { };
1857 ctu03: ctu-3 { };
1858 ctu10: ctu-4 { };
1859 ctu11: ctu-5 { };
1860 ctu12: ctu-6 { };
1861 ctu13: ctu-7 { };
1862 };
1863
1864 rcar_sound,src {
1865 src0: src-0 {
1866 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1867 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1868 dma-names = "rx", "tx";
1869 };
1870 src1: src-1 {
1871 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1872 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1873 dma-names = "rx", "tx";
1874 };
1875 src2: src-2 {
1876 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1877 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1878 dma-names = "rx", "tx";
1879 };
1880 src3: src-3 {
1881 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1882 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1883 dma-names = "rx", "tx";
1884 };
1885 src4: src-4 {
1886 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1887 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1888 dma-names = "rx", "tx";
1889 };
1890 src5: src-5 {
1891 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1892 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1893 dma-names = "rx", "tx";
1894 };
1895 src6: src-6 {
1896 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1897 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1898 dma-names = "rx", "tx";
1899 };
1900 src7: src-7 {
1901 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1902 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1903 dma-names = "rx", "tx";
1904 };
1905 src8: src-8 {
1906 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1907 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1908 dma-names = "rx", "tx";
1909 };
1910 src9: src-9 {
1911 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1912 dmas = <&audma0 0x97>, <&audma1 0xba>;
1913 dma-names = "rx", "tx";
1914 };
1915 };
1916
1917 rcar_sound,ssiu {
1918 ssiu00: ssiu-0 {
1919 dmas = <&audma0 0x15>, <&audma1 0x16>;
1920 dma-names = "rx", "tx";
1921 };
1922 ssiu01: ssiu-1 {
1923 dmas = <&audma0 0x35>, <&audma1 0x36>;
1924 dma-names = "rx", "tx";
1925 };
1926 ssiu02: ssiu-2 {
1927 dmas = <&audma0 0x37>, <&audma1 0x38>;
1928 dma-names = "rx", "tx";
1929 };
1930 ssiu03: ssiu-3 {
1931 dmas = <&audma0 0x47>, <&audma1 0x48>;
1932 dma-names = "rx", "tx";
1933 };
1934 ssiu04: ssiu-4 {
1935 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1936 dma-names = "rx", "tx";
1937 };
1938 ssiu05: ssiu-5 {
1939 dmas = <&audma0 0x43>, <&audma1 0x44>;
1940 dma-names = "rx", "tx";
1941 };
1942 ssiu06: ssiu-6 {
1943 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1944 dma-names = "rx", "tx";
1945 };
1946 ssiu07: ssiu-7 {
1947 dmas = <&audma0 0x53>, <&audma1 0x54>;
1948 dma-names = "rx", "tx";
1949 };
1950 ssiu10: ssiu-8 {
1951 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1952 dma-names = "rx", "tx";
1953 };
1954 ssiu11: ssiu-9 {
1955 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1956 dma-names = "rx", "tx";
1957 };
1958 ssiu12: ssiu-10 {
1959 dmas = <&audma0 0x57>, <&audma1 0x58>;
1960 dma-names = "rx", "tx";
1961 };
1962 ssiu13: ssiu-11 {
1963 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1964 dma-names = "rx", "tx";
1965 };
1966 ssiu14: ssiu-12 {
1967 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1968 dma-names = "rx", "tx";
1969 };
1970 ssiu15: ssiu-13 {
1971 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1972 dma-names = "rx", "tx";
1973 };
1974 ssiu16: ssiu-14 {
1975 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1976 dma-names = "rx", "tx";
1977 };
1978 ssiu17: ssiu-15 {
1979 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1980 dma-names = "rx", "tx";
1981 };
1982 ssiu20: ssiu-16 {
1983 dmas = <&audma0 0x63>, <&audma1 0x64>;
1984 dma-names = "rx", "tx";
1985 };
1986 ssiu21: ssiu-17 {
1987 dmas = <&audma0 0x67>, <&audma1 0x68>;
1988 dma-names = "rx", "tx";
1989 };
1990 ssiu22: ssiu-18 {
1991 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1992 dma-names = "rx", "tx";
1993 };
1994 ssiu23: ssiu-19 {
1995 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1996 dma-names = "rx", "tx";
1997 };
1998 ssiu24: ssiu-20 {
1999 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2000 dma-names = "rx", "tx";
2001 };
2002 ssiu25: ssiu-21 {
2003 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2004 dma-names = "rx", "tx";
2005 };
2006 ssiu26: ssiu-22 {
2007 dmas = <&audma0 0xED>, <&audma1 0xEE>;
2008 dma-names = "rx", "tx";
2009 };
2010 ssiu27: ssiu-23 {
2011 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2012 dma-names = "rx", "tx";
2013 };
2014 ssiu30: ssiu-24 {
2015 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2016 dma-names = "rx", "tx";
2017 };
2018 ssiu31: ssiu-25 {
2019 dmas = <&audma0 0x21>, <&audma1 0x22>;
2020 dma-names = "rx", "tx";
2021 };
2022 ssiu32: ssiu-26 {
2023 dmas = <&audma0 0x23>, <&audma1 0x24>;
2024 dma-names = "rx", "tx";
2025 };
2026 ssiu33: ssiu-27 {
2027 dmas = <&audma0 0x25>, <&audma1 0x26>;
2028 dma-names = "rx", "tx";
2029 };
2030 ssiu34: ssiu-28 {
2031 dmas = <&audma0 0x27>, <&audma1 0x28>;
2032 dma-names = "rx", "tx";
2033 };
2034 ssiu35: ssiu-29 {
2035 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2036 dma-names = "rx", "tx";
2037 };
2038 ssiu36: ssiu-30 {
2039 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2040 dma-names = "rx", "tx";
2041 };
2042 ssiu37: ssiu-31 {
2043 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2044 dma-names = "rx", "tx";
2045 };
2046 ssiu40: ssiu-32 {
2047 dmas = <&audma0 0x71>, <&audma1 0x72>;
2048 dma-names = "rx", "tx";
2049 };
2050 ssiu41: ssiu-33 {
2051 dmas = <&audma0 0x17>, <&audma1 0x18>;
2052 dma-names = "rx", "tx";
2053 };
2054 ssiu42: ssiu-34 {
2055 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2056 dma-names = "rx", "tx";
2057 };
2058 ssiu43: ssiu-35 {
2059 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2060 dma-names = "rx", "tx";
2061 };
2062 ssiu44: ssiu-36 {
2063 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2064 dma-names = "rx", "tx";
2065 };
2066 ssiu45: ssiu-37 {
2067 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2068 dma-names = "rx", "tx";
2069 };
2070 ssiu46: ssiu-38 {
2071 dmas = <&audma0 0x31>, <&audma1 0x32>;
2072 dma-names = "rx", "tx";
2073 };
2074 ssiu47: ssiu-39 {
2075 dmas = <&audma0 0x33>, <&audma1 0x34>;
2076 dma-names = "rx", "tx";
2077 };
2078 ssiu50: ssiu-40 {
2079 dmas = <&audma0 0x73>, <&audma1 0x74>;
2080 dma-names = "rx", "tx";
2081 };
2082 ssiu60: ssiu-41 {
2083 dmas = <&audma0 0x75>, <&audma1 0x76>;
2084 dma-names = "rx", "tx";
2085 };
2086 ssiu70: ssiu-42 {
2087 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2088 dma-names = "rx", "tx";
2089 };
2090 ssiu80: ssiu-43 {
2091 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2092 dma-names = "rx", "tx";
2093 };
2094 ssiu90: ssiu-44 {
2095 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2096 dma-names = "rx", "tx";
2097 };
2098 ssiu91: ssiu-45 {
2099 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2100 dma-names = "rx", "tx";
2101 };
2102 ssiu92: ssiu-46 {
2103 dmas = <&audma0 0x81>, <&audma1 0x82>;
2104 dma-names = "rx", "tx";
2105 };
2106 ssiu93: ssiu-47 {
2107 dmas = <&audma0 0x83>, <&audma1 0x84>;
2108 dma-names = "rx", "tx";
2109 };
2110 ssiu94: ssiu-48 {
2111 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2112 dma-names = "rx", "tx";
2113 };
2114 ssiu95: ssiu-49 {
2115 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2116 dma-names = "rx", "tx";
2117 };
2118 ssiu96: ssiu-50 {
2119 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2120 dma-names = "rx", "tx";
2121 };
2122 ssiu97: ssiu-51 {
2123 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2124 dma-names = "rx", "tx";
2125 };
2126 };
2127
2128 rcar_sound,ssi {
2129 ssi0: ssi-0 {
2130 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2131 dmas = <&audma0 0x01>, <&audma1 0x02>;
2132 dma-names = "rx", "tx";
2133 };
2134 ssi1: ssi-1 {
2135 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2136 dmas = <&audma0 0x03>, <&audma1 0x04>;
2137 dma-names = "rx", "tx";
2138 };
2139 ssi2: ssi-2 {
2140 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2141 dmas = <&audma0 0x05>, <&audma1 0x06>;
2142 dma-names = "rx", "tx";
2143 };
2144 ssi3: ssi-3 {
2145 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2146 dmas = <&audma0 0x07>, <&audma1 0x08>;
2147 dma-names = "rx", "tx";
2148 };
2149 ssi4: ssi-4 {
2150 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2151 dmas = <&audma0 0x09>, <&audma1 0x0a>;
2152 dma-names = "rx", "tx";
2153 };
2154 ssi5: ssi-5 {
2155 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2156 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2157 dma-names = "rx", "tx";
2158 };
2159 ssi6: ssi-6 {
2160 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2161 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2162 dma-names = "rx", "tx";
2163 };
2164 ssi7: ssi-7 {
2165 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2166 dmas = <&audma0 0x0f>, <&audma1 0x10>;
2167 dma-names = "rx", "tx";
2168 };
2169 ssi8: ssi-8 {
2170 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2171 dmas = <&audma0 0x11>, <&audma1 0x12>;
2172 dma-names = "rx", "tx";
2173 };
2174 ssi9: ssi-9 {
2175 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2176 dmas = <&audma0 0x13>, <&audma1 0x14>;
2177 dma-names = "rx", "tx";
2178 };
2179 };
2180 };
2181
2182 audma0: dma-controller@ec700000 {
2183 compatible = "renesas,dmac-r8a774e1",
2184 "renesas,rcar-dmac";
2185 reg = <0 0xec700000 0 0x10000>;
2186 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2187 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2188 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2189 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2190 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2191 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2192 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2193 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2194 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2195 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2196 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2197 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2198 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2199 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2200 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2201 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2202 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2203 interrupt-names = "error",
2204 "ch0", "ch1", "ch2", "ch3",
2205 "ch4", "ch5", "ch6", "ch7",
2206 "ch8", "ch9", "ch10", "ch11",
2207 "ch12", "ch13", "ch14", "ch15";
2208 clocks = <&cpg CPG_MOD 502>;
2209 clock-names = "fck";
2210 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2211 resets = <&cpg 502>;
2212 #dma-cells = <1>;
2213 dma-channels = <16>;
2214 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2215 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2216 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2217 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2218 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2219 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2220 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2221 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2222 };
2223
2224 audma1: dma-controller@ec720000 {
2225 compatible = "renesas,dmac-r8a774e1",
2226 "renesas,rcar-dmac";
2227 reg = <0 0xec720000 0 0x10000>;
2228 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2229 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2230 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2231 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2232 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2233 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2234 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2235 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2236 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2237 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2238 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2239 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2240 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2241 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2242 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2243 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2244 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2245 interrupt-names = "error",
2246 "ch0", "ch1", "ch2", "ch3",
2247 "ch4", "ch5", "ch6", "ch7",
2248 "ch8", "ch9", "ch10", "ch11",
2249 "ch12", "ch13", "ch14", "ch15";
2250 clocks = <&cpg CPG_MOD 501>;
2251 clock-names = "fck";
2252 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2253 resets = <&cpg 501>;
2254 #dma-cells = <1>;
2255 dma-channels = <16>;
2256 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2257 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2258 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2259 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2260 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2261 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2262 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2263 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2264 };
2265
2266 xhci0: usb@ee000000 {
2267 compatible = "renesas,xhci-r8a774e1",
2268 "renesas,rcar-gen3-xhci";
2269 reg = <0 0xee000000 0 0xc00>;
2270 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2271 clocks = <&cpg CPG_MOD 328>;
2272 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2273 resets = <&cpg 328>;
2274 status = "disabled";
2275 };
2276
2277 usb3_peri0: usb@ee020000 {
2278 compatible = "renesas,r8a774e1-usb3-peri",
2279 "renesas,rcar-gen3-usb3-peri";
2280 reg = <0 0xee020000 0 0x400>;
2281 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2282 clocks = <&cpg CPG_MOD 328>;
2283 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2284 resets = <&cpg 328>;
2285 status = "disabled";
2286 };
2287
2288 ohci0: usb@ee080000 {
2289 compatible = "generic-ohci";
2290 reg = <0 0xee080000 0 0x100>;
2291 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2292 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2293 phys = <&usb2_phy0 1>;
2294 phy-names = "usb";
2295 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2296 resets = <&cpg 703>, <&cpg 704>;
2297 status = "disabled";
2298 };
2299
2300 ohci1: usb@ee0a0000 {
2301 compatible = "generic-ohci";
2302 reg = <0 0xee0a0000 0 0x100>;
2303 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2304 clocks = <&cpg CPG_MOD 702>;
2305 phys = <&usb2_phy1 1>;
2306 phy-names = "usb";
2307 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2308 resets = <&cpg 702>;
2309 status = "disabled";
2310 };
2311
2312 ehci0: usb@ee080100 {
2313 compatible = "generic-ehci";
2314 reg = <0 0xee080100 0 0x100>;
2315 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2316 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2317 phys = <&usb2_phy0 2>;
2318 phy-names = "usb";
2319 companion = <&ohci0>;
2320 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2321 resets = <&cpg 703>, <&cpg 704>;
2322 status = "disabled";
2323 };
2324
2325 ehci1: usb@ee0a0100 {
2326 compatible = "generic-ehci";
2327 reg = <0 0xee0a0100 0 0x100>;
2328 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2329 clocks = <&cpg CPG_MOD 702>;
2330 phys = <&usb2_phy1 2>;
2331 phy-names = "usb";
2332 companion = <&ohci1>;
2333 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2334 resets = <&cpg 702>;
2335 status = "disabled";
2336 };
2337
2338 usb2_phy0: usb-phy@ee080200 {
2339 compatible = "renesas,usb2-phy-r8a774e1",
2340 "renesas,rcar-gen3-usb2-phy";
2341 reg = <0 0xee080200 0 0x700>;
2342 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2343 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2344 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2345 resets = <&cpg 703>, <&cpg 704>;
2346 #phy-cells = <1>;
2347 status = "disabled";
2348 };
2349
2350 usb2_phy1: usb-phy@ee0a0200 {
2351 compatible = "renesas,usb2-phy-r8a774e1",
2352 "renesas,rcar-gen3-usb2-phy";
2353 reg = <0 0xee0a0200 0 0x700>;
2354 clocks = <&cpg CPG_MOD 702>;
2355 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2356 resets = <&cpg 702>;
2357 #phy-cells = <1>;
2358 status = "disabled";
2359 };
2360
2361 sdhi0: mmc@ee100000 {
2362 compatible = "renesas,sdhi-r8a774e1",
2363 "renesas,rcar-gen3-sdhi";
2364 reg = <0 0xee100000 0 0x2000>;
2365 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2366 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774E1_CLK_SD0H>;
2367 clock-names = "core", "clkh";
2368 max-frequency = <200000000>;
2369 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2370 resets = <&cpg 314>;
2371 iommus = <&ipmmu_ds1 32>;
2372 status = "disabled";
2373 };
2374
2375 sdhi1: mmc@ee120000 {
2376 compatible = "renesas,sdhi-r8a774e1",
2377 "renesas,rcar-gen3-sdhi";
2378 reg = <0 0xee120000 0 0x2000>;
2379 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2380 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774E1_CLK_SD1H>;
2381 clock-names = "core", "clkh";
2382 max-frequency = <200000000>;
2383 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2384 resets = <&cpg 313>;
2385 iommus = <&ipmmu_ds1 33>;
2386 status = "disabled";
2387 };
2388
2389 sdhi2: mmc@ee140000 {
2390 compatible = "renesas,sdhi-r8a774e1",
2391 "renesas,rcar-gen3-sdhi";
2392 reg = <0 0xee140000 0 0x2000>;
2393 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2394 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774E1_CLK_SD2H>;
2395 clock-names = "core", "clkh";
2396 max-frequency = <200000000>;
2397 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2398 resets = <&cpg 312>;
2399 iommus = <&ipmmu_ds1 34>;
2400 status = "disabled";
2401 };
2402
2403 sdhi3: mmc@ee160000 {
2404 compatible = "renesas,sdhi-r8a774e1",
2405 "renesas,rcar-gen3-sdhi";
2406 reg = <0 0xee160000 0 0x2000>;
2407 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2408 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774E1_CLK_SD3H>;
2409 clock-names = "core", "clkh";
2410 max-frequency = <200000000>;
2411 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2412 resets = <&cpg 311>;
2413 iommus = <&ipmmu_ds1 35>;
2414 status = "disabled";
2415 };
2416
2417 rpc: spi@ee200000 {
2418 compatible = "renesas,r8a774e1-rpc-if",
2419 "renesas,rcar-gen3-rpc-if";
2420 reg = <0 0xee200000 0 0x200>,
2421 <0 0x08000000 0 0x4000000>,
2422 <0 0xee208000 0 0x100>;
2423 reg-names = "regs", "dirmap", "wbuf";
2424 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2425 clocks = <&cpg CPG_MOD 917>;
2426 clock-names = "rpc";
2427 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2428 resets = <&cpg 917>;
2429 #address-cells = <1>;
2430 #size-cells = <0>;
2431 status = "disabled";
2432 };
2433
2434 sata: sata@ee300000 {
2435 compatible = "renesas,sata-r8a774e1",
2436 "renesas,rcar-gen3-sata";
2437 reg = <0 0xee300000 0 0x200000>;
2438 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2439 clocks = <&cpg CPG_MOD 815>;
2440 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2441 resets = <&cpg 815>;
2442 iommus = <&ipmmu_hc 2>;
2443 status = "disabled";
2444 };
2445
2446 gic: interrupt-controller@f1010000 {
2447 compatible = "arm,gic-400";
2448 #interrupt-cells = <3>;
2449 #address-cells = <0>;
2450 interrupt-controller;
2451 reg = <0x0 0xf1010000 0 0x1000>,
2452 <0x0 0xf1020000 0 0x20000>,
2453 <0x0 0xf1040000 0 0x20000>,
2454 <0x0 0xf1060000 0 0x20000>;
2455 interrupts = <GIC_PPI 9
2456 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2457 clocks = <&cpg CPG_MOD 408>;
2458 clock-names = "clk";
2459 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2460 resets = <&cpg 408>;
2461 };
2462
2463 pciec0: pcie@fe000000 {
2464 compatible = "renesas,pcie-r8a774e1",
2465 "renesas,pcie-rcar-gen3";
2466 reg = <0 0xfe000000 0 0x80000>;
2467 #address-cells = <3>;
2468 #size-cells = <2>;
2469 bus-range = <0x00 0xff>;
2470 device_type = "pci";
2471 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2472 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2473 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2474 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2475 /* Map all possible DDR as inbound ranges */
2476 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2477 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2478 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2479 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2480 #interrupt-cells = <1>;
2481 interrupt-map-mask = <0 0 0 0>;
2482 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2483 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2484 clock-names = "pcie", "pcie_bus";
2485 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2486 resets = <&cpg 319>;
2487 status = "disabled";
2488 };
2489
2490 pciec1: pcie@ee800000 {
2491 compatible = "renesas,pcie-r8a774e1",
2492 "renesas,pcie-rcar-gen3";
2493 reg = <0 0xee800000 0 0x80000>;
2494 #address-cells = <3>;
2495 #size-cells = <2>;
2496 bus-range = <0x00 0xff>;
2497 device_type = "pci";
2498 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2499 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2500 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2501 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2502 /* Map all possible DDR as inbound ranges */
2503 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2504 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2505 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2506 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2507 #interrupt-cells = <1>;
2508 interrupt-map-mask = <0 0 0 0>;
2509 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2510 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2511 clock-names = "pcie", "pcie_bus";
2512 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2513 resets = <&cpg 318>;
2514 status = "disabled";
2515 };
2516
2517 pciec0_ep: pcie-ep@fe000000 {
2518 compatible = "renesas,r8a774e1-pcie-ep",
2519 "renesas,rcar-gen3-pcie-ep";
2520 reg = <0x0 0xfe000000 0 0x80000>,
2521 <0x0 0xfe100000 0 0x100000>,
2522 <0x0 0xfe200000 0 0x200000>,
2523 <0x0 0x30000000 0 0x8000000>,
2524 <0x0 0x38000000 0 0x8000000>;
2525 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2526 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2527 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2528 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2529 clocks = <&cpg CPG_MOD 319>;
2530 clock-names = "pcie";
2531 resets = <&cpg 319>;
2532 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2533 status = "disabled";
2534 };
2535
2536 pciec1_ep: pcie-ep@ee800000 {
2537 compatible = "renesas,r8a774e1-pcie-ep",
2538 "renesas,rcar-gen3-pcie-ep";
2539 reg = <0x0 0xee800000 0 0x80000>,
2540 <0x0 0xee900000 0 0x100000>,
2541 <0x0 0xeea00000 0 0x200000>,
2542 <0x0 0xc0000000 0 0x8000000>,
2543 <0x0 0xc8000000 0 0x8000000>;
2544 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2545 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2546 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2547 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2548 clocks = <&cpg CPG_MOD 318>;
2549 clock-names = "pcie";
2550 resets = <&cpg 318>;
2551 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2552 status = "disabled";
2553 };
2554
2555 vspbc: vsp@fe920000 {
2556 compatible = "renesas,vsp2";
2557 reg = <0 0xfe920000 0 0x8000>;
2558 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2559 clocks = <&cpg CPG_MOD 624>;
2560 power-domains = <&sysc R8A774E1_PD_A3VP>;
2561 resets = <&cpg 624>;
2562
2563 renesas,fcp = <&fcpvb1>;
2564 };
2565
2566 vspbd: vsp@fe960000 {
2567 compatible = "renesas,vsp2";
2568 reg = <0 0xfe960000 0 0x8000>;
2569 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2570 clocks = <&cpg CPG_MOD 626>;
2571 power-domains = <&sysc R8A774E1_PD_A3VP>;
2572 resets = <&cpg 626>;
2573
2574 renesas,fcp = <&fcpvb0>;
2575 };
2576
2577 vspd0: vsp@fea20000 {
2578 compatible = "renesas,vsp2";
2579 reg = <0 0xfea20000 0 0x5000>;
2580 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2581 clocks = <&cpg CPG_MOD 623>;
2582 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2583 resets = <&cpg 623>;
2584
2585 renesas,fcp = <&fcpvd0>;
2586 };
2587
2588 vspd1: vsp@fea28000 {
2589 compatible = "renesas,vsp2";
2590 reg = <0 0xfea28000 0 0x5000>;
2591 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2592 clocks = <&cpg CPG_MOD 622>;
2593 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2594 resets = <&cpg 622>;
2595
2596 renesas,fcp = <&fcpvd1>;
2597 };
2598
2599 vspi0: vsp@fe9a0000 {
2600 compatible = "renesas,vsp2";
2601 reg = <0 0xfe9a0000 0 0x8000>;
2602 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2603 clocks = <&cpg CPG_MOD 631>;
2604 power-domains = <&sysc R8A774E1_PD_A3VP>;
2605 resets = <&cpg 631>;
2606
2607 renesas,fcp = <&fcpvi0>;
2608 };
2609
2610 vspi1: vsp@fe9b0000 {
2611 compatible = "renesas,vsp2";
2612 reg = <0 0xfe9b0000 0 0x8000>;
2613 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2614 clocks = <&cpg CPG_MOD 630>;
2615 power-domains = <&sysc R8A774E1_PD_A3VP>;
2616 resets = <&cpg 630>;
2617
2618 renesas,fcp = <&fcpvi1>;
2619 };
2620
2621 fdp1@fe940000 {
2622 compatible = "renesas,fdp1";
2623 reg = <0 0xfe940000 0 0x2400>;
2624 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2625 clocks = <&cpg CPG_MOD 119>;
2626 power-domains = <&sysc R8A774E1_PD_A3VP>;
2627 resets = <&cpg 119>;
2628 renesas,fcp = <&fcpf0>;
2629 };
2630
2631 fdp1@fe944000 {
2632 compatible = "renesas,fdp1";
2633 reg = <0 0xfe944000 0 0x2400>;
2634 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2635 clocks = <&cpg CPG_MOD 118>;
2636 power-domains = <&sysc R8A774E1_PD_A3VP>;
2637 resets = <&cpg 118>;
2638 renesas,fcp = <&fcpf1>;
2639 };
2640
2641 fcpf0: fcp@fe950000 {
2642 compatible = "renesas,fcpf";
2643 reg = <0 0xfe950000 0 0x200>;
2644 clocks = <&cpg CPG_MOD 615>;
2645 power-domains = <&sysc R8A774E1_PD_A3VP>;
2646 resets = <&cpg 615>;
2647 };
2648
2649 fcpf1: fcp@fe951000 {
2650 compatible = "renesas,fcpf";
2651 reg = <0 0xfe951000 0 0x200>;
2652 clocks = <&cpg CPG_MOD 614>;
2653 power-domains = <&sysc R8A774E1_PD_A3VP>;
2654 resets = <&cpg 614>;
2655 };
2656
2657 fcpvb0: fcp@fe96f000 {
2658 compatible = "renesas,fcpv";
2659 reg = <0 0xfe96f000 0 0x200>;
2660 clocks = <&cpg CPG_MOD 607>;
2661 power-domains = <&sysc R8A774E1_PD_A3VP>;
2662 resets = <&cpg 607>;
2663 };
2664
2665 fcpvb1: fcp@fe92f000 {
2666 compatible = "renesas,fcpv";
2667 reg = <0 0xfe92f000 0 0x200>;
2668 clocks = <&cpg CPG_MOD 606>;
2669 power-domains = <&sysc R8A774E1_PD_A3VP>;
2670 resets = <&cpg 606>;
2671 };
2672
2673 fcpvi0: fcp@fe9af000 {
2674 compatible = "renesas,fcpv";
2675 reg = <0 0xfe9af000 0 0x200>;
2676 clocks = <&cpg CPG_MOD 611>;
2677 power-domains = <&sysc R8A774E1_PD_A3VP>;
2678 resets = <&cpg 611>;
2679 };
2680
2681 fcpvi1: fcp@fe9bf000 {
2682 compatible = "renesas,fcpv";
2683 reg = <0 0xfe9bf000 0 0x200>;
2684 clocks = <&cpg CPG_MOD 610>;
2685 power-domains = <&sysc R8A774E1_PD_A3VP>;
2686 resets = <&cpg 610>;
2687 };
2688
2689 fcpvd0: fcp@fea27000 {
2690 compatible = "renesas,fcpv";
2691 reg = <0 0xfea27000 0 0x200>;
2692 clocks = <&cpg CPG_MOD 603>;
2693 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2694 resets = <&cpg 603>;
2695 };
2696
2697 fcpvd1: fcp@fea2f000 {
2698 compatible = "renesas,fcpv";
2699 reg = <0 0xfea2f000 0 0x200>;
2700 clocks = <&cpg CPG_MOD 602>;
2701 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2702 resets = <&cpg 602>;
2703 };
2704
2705 csi20: csi2@fea80000 {
2706 compatible = "renesas,r8a774e1-csi2";
2707 reg = <0 0xfea80000 0 0x10000>;
2708 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2709 clocks = <&cpg CPG_MOD 714>;
2710 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2711 resets = <&cpg 714>;
2712 status = "disabled";
2713
2714 ports {
2715 #address-cells = <1>;
2716 #size-cells = <0>;
2717
2718 port@0 {
2719 reg = <0>;
2720 };
2721
2722 port@1 {
2723 #address-cells = <1>;
2724 #size-cells = <0>;
2725
2726 reg = <1>;
2727
2728 csi20vin0: endpoint@0 {
2729 reg = <0>;
2730 remote-endpoint = <&vin0csi20>;
2731 };
2732 csi20vin1: endpoint@1 {
2733 reg = <1>;
2734 remote-endpoint = <&vin1csi20>;
2735 };
2736 csi20vin2: endpoint@2 {
2737 reg = <2>;
2738 remote-endpoint = <&vin2csi20>;
2739 };
2740 csi20vin3: endpoint@3 {
2741 reg = <3>;
2742 remote-endpoint = <&vin3csi20>;
2743 };
2744 csi20vin4: endpoint@4 {
2745 reg = <4>;
2746 remote-endpoint = <&vin4csi20>;
2747 };
2748 csi20vin5: endpoint@5 {
2749 reg = <5>;
2750 remote-endpoint = <&vin5csi20>;
2751 };
2752 csi20vin6: endpoint@6 {
2753 reg = <6>;
2754 remote-endpoint = <&vin6csi20>;
2755 };
2756 csi20vin7: endpoint@7 {
2757 reg = <7>;
2758 remote-endpoint = <&vin7csi20>;
2759 };
2760 };
2761 };
2762 };
2763
2764 csi40: csi2@feaa0000 {
2765 compatible = "renesas,r8a774e1-csi2";
2766 reg = <0 0xfeaa0000 0 0x10000>;
2767 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2768 clocks = <&cpg CPG_MOD 716>;
2769 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2770 resets = <&cpg 716>;
2771 status = "disabled";
2772
2773 ports {
2774 #address-cells = <1>;
2775 #size-cells = <0>;
2776
2777 port@0 {
2778 reg = <0>;
2779 };
2780
2781 port@1 {
2782 #address-cells = <1>;
2783 #size-cells = <0>;
2784
2785 reg = <1>;
2786
2787 csi40vin0: endpoint@0 {
2788 reg = <0>;
2789 remote-endpoint = <&vin0csi40>;
2790 };
2791 csi40vin1: endpoint@1 {
2792 reg = <1>;
2793 remote-endpoint = <&vin1csi40>;
2794 };
2795 csi40vin2: endpoint@2 {
2796 reg = <2>;
2797 remote-endpoint = <&vin2csi40>;
2798 };
2799 csi40vin3: endpoint@3 {
2800 reg = <3>;
2801 remote-endpoint = <&vin3csi40>;
2802 };
2803 };
2804 };
2805 };
2806
2807 hdmi0: hdmi@fead0000 {
2808 compatible = "renesas,r8a774e1-hdmi",
2809 "renesas,rcar-gen3-hdmi";
2810 reg = <0 0xfead0000 0 0x10000>;
2811 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2812 clocks = <&cpg CPG_MOD 729>,
2813 <&cpg CPG_CORE R8A774E1_CLK_HDMI>;
2814 clock-names = "iahb", "isfr";
2815 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2816 resets = <&cpg 729>;
2817 status = "disabled";
2818
2819 ports {
2820 #address-cells = <1>;
2821 #size-cells = <0>;
2822
2823 port@0 {
2824 reg = <0>;
2825 dw_hdmi0_in: endpoint {
2826 remote-endpoint = <&du_out_hdmi0>;
2827 };
2828 };
2829 port@1 {
2830 reg = <1>;
2831 };
2832 port@2 {
2833 /* HDMI sound */
2834 reg = <2>;
2835 };
2836 };
2837 };
2838
2839 du: display@feb00000 {
2840 compatible = "renesas,du-r8a774e1";
2841 reg = <0 0xfeb00000 0 0x80000>;
2842 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2843 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2844 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2845 clocks = <&cpg CPG_MOD 724>,
2846 <&cpg CPG_MOD 723>,
2847 <&cpg CPG_MOD 721>;
2848 clock-names = "du.0", "du.1", "du.3";
2849 resets = <&cpg 724>, <&cpg 722>;
2850 reset-names = "du.0", "du.3";
2851 status = "disabled";
2852
2853 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2854
2855 ports {
2856 #address-cells = <1>;
2857 #size-cells = <0>;
2858
2859 port@0 {
2860 reg = <0>;
2861 };
2862 port@1 {
2863 reg = <1>;
2864 du_out_hdmi0: endpoint {
2865 remote-endpoint = <&dw_hdmi0_in>;
2866 };
2867 };
2868 port@2 {
2869 reg = <2>;
2870 du_out_lvds0: endpoint {
2871 remote-endpoint = <&lvds0_in>;
2872 };
2873 };
2874 };
2875 };
2876
2877 lvds0: lvds@feb90000 {
2878 compatible = "renesas,r8a774e1-lvds";
2879 reg = <0 0xfeb90000 0 0x14>;
2880 clocks = <&cpg CPG_MOD 727>;
2881 power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
2882 resets = <&cpg 727>;
2883 status = "disabled";
2884
2885 ports {
2886 #address-cells = <1>;
2887 #size-cells = <0>;
2888
2889 port@0 {
2890 reg = <0>;
2891 lvds0_in: endpoint {
2892 remote-endpoint = <&du_out_lvds0>;
2893 };
2894 };
2895 port@1 {
2896 reg = <1>;
2897 };
2898 };
2899 };
2900
2901 prr: chipid@fff00044 {
2902 compatible = "renesas,prr";
2903 reg = <0 0xfff00044 0 4>;
2904 };
2905 };
2906
2907 thermal-zones {
2908 sensor1_thermal: sensor1-thermal {
2909 polling-delay-passive = <250>;
2910 polling-delay = <1000>;
2911 thermal-sensors = <&tsc 0>;
2912 sustainable-power = <6313>;
2913
2914 trips {
2915 sensor1_crit: sensor1-crit {
2916 temperature = <120000>;
2917 hysteresis = <1000>;
2918 type = "critical";
2919 };
2920 };
2921 };
2922
2923 sensor2_thermal: sensor2-thermal {
2924 polling-delay-passive = <250>;
2925 polling-delay = <1000>;
2926 thermal-sensors = <&tsc 1>;
2927 sustainable-power = <6313>;
2928
2929 trips {
2930 sensor2_crit: sensor2-crit {
2931 temperature = <120000>;
2932 hysteresis = <1000>;
2933 type = "critical";
2934 };
2935 };
2936 };
2937
2938 sensor3_thermal: sensor3-thermal {
2939 polling-delay-passive = <250>;
2940 polling-delay = <1000>;
2941 thermal-sensors = <&tsc 2>;
2942 sustainable-power = <6313>;
2943
2944 trips {
2945 target: trip-point1 {
2946 temperature = <100000>;
2947 hysteresis = <1000>;
2948 type = "passive";
2949 };
2950
2951 sensor3_crit: sensor3-crit {
2952 temperature = <120000>;
2953 hysteresis = <1000>;
2954 type = "critical";
2955 };
2956 };
2957
2958 cooling-maps {
2959 map0 {
2960 trip = <&target>;
2961 cooling-device = <&a57_0 0 2>;
2962 contribution = <1024>;
2963 };
2964
2965 map1 {
2966 trip = <&target>;
2967 cooling-device = <&a53_0 0 2>;
2968 contribution = <1024>;
2969 };
2970 };
2971 };
2972 };
2973
2974 timer {
2975 compatible = "arm,armv8-timer";
2976 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2977 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2978 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
2979 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
2980 };
2981
2982 /* External USB clocks - can be overridden by the board */
2983 usb3s0_clk: usb3s0 {
2984 compatible = "fixed-clock";
2985 #clock-cells = <0>;
2986 clock-frequency = <0>;
2987 };
2988
2989 usb_extal_clk: usb_extal {
2990 compatible = "fixed-clock";
2991 #clock-cells = <0>;
2992 clock-frequency = <0>;
2993 };
2994 };
