0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the RZ/G2E (R8A774C0) SoC
0004 *
0005 * Copyright (C) 2018-2019 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/power/r8a774c0-sysc.h>
0011
0012 / {
0013 compatible = "renesas,r8a774c0";
0014 #address-cells = <2>;
0015 #size-cells = <2>;
0016
0017 /*
0018 * The external audio clocks are configured as 0 Hz fixed frequency
0019 * clocks by default.
0020 * Boards that provide audio clocks should override them.
0021 */
0022 audio_clk_a: audio_clk_a {
0023 compatible = "fixed-clock";
0024 #clock-cells = <0>;
0025 clock-frequency = <0>;
0026 };
0027
0028 audio_clk_b: audio_clk_b {
0029 compatible = "fixed-clock";
0030 #clock-cells = <0>;
0031 clock-frequency = <0>;
0032 };
0033
0034 audio_clk_c: audio_clk_c {
0035 compatible = "fixed-clock";
0036 #clock-cells = <0>;
0037 clock-frequency = <0>;
0038 };
0039
0040 /* External CAN clock - to be overridden by boards that provide it */
0041 can_clk: can {
0042 compatible = "fixed-clock";
0043 #clock-cells = <0>;
0044 clock-frequency = <0>;
0045 };
0046
0047 cluster1_opp: opp-table-1 {
0048 compatible = "operating-points-v2";
0049 opp-shared;
0050 opp-800000000 {
0051 opp-hz = /bits/ 64 <800000000>;
0052 opp-microvolt = <820000>;
0053 clock-latency-ns = <300000>;
0054 };
0055 opp-1000000000 {
0056 opp-hz = /bits/ 64 <1000000000>;
0057 opp-microvolt = <820000>;
0058 clock-latency-ns = <300000>;
0059 };
0060 opp-1200000000 {
0061 opp-hz = /bits/ 64 <1200000000>;
0062 opp-microvolt = <820000>;
0063 clock-latency-ns = <300000>;
0064 opp-suspend;
0065 };
0066 };
0067
0068 cpus {
0069 #address-cells = <1>;
0070 #size-cells = <0>;
0071
0072 a53_0: cpu@0 {
0073 compatible = "arm,cortex-a53";
0074 reg = <0>;
0075 device_type = "cpu";
0076 #cooling-cells = <2>;
0077 power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
0078 next-level-cache = <&L2_CA53>;
0079 enable-method = "psci";
0080 dynamic-power-coefficient = <277>;
0081 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
0082 operating-points-v2 = <&cluster1_opp>;
0083 };
0084
0085 a53_1: cpu@1 {
0086 compatible = "arm,cortex-a53";
0087 reg = <1>;
0088 device_type = "cpu";
0089 power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
0090 next-level-cache = <&L2_CA53>;
0091 enable-method = "psci";
0092 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
0093 operating-points-v2 = <&cluster1_opp>;
0094 };
0095
0096 L2_CA53: cache-controller-0 {
0097 compatible = "cache";
0098 power-domains = <&sysc R8A774C0_PD_CA53_SCU>;
0099 cache-unified;
0100 cache-level = <2>;
0101 };
0102 };
0103
0104 extal_clk: extal {
0105 compatible = "fixed-clock";
0106 #clock-cells = <0>;
0107 /* This value must be overridden by the board */
0108 clock-frequency = <0>;
0109 };
0110
0111 /* External PCIe clock - can be overridden by the board */
0112 pcie_bus_clk: pcie_bus {
0113 compatible = "fixed-clock";
0114 #clock-cells = <0>;
0115 clock-frequency = <0>;
0116 };
0117
0118 pmu_a53 {
0119 compatible = "arm,cortex-a53-pmu";
0120 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
0121 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0122 interrupt-affinity = <&a53_0>, <&a53_1>;
0123 };
0124
0125 psci {
0126 compatible = "arm,psci-1.0", "arm,psci-0.2";
0127 method = "smc";
0128 };
0129
0130 /* External SCIF clock - to be overridden by boards that provide it */
0131 scif_clk: scif {
0132 compatible = "fixed-clock";
0133 #clock-cells = <0>;
0134 clock-frequency = <0>;
0135 };
0136
0137 soc: soc {
0138 compatible = "simple-bus";
0139 interrupt-parent = <&gic>;
0140 #address-cells = <2>;
0141 #size-cells = <2>;
0142 ranges;
0143
0144 rwdt: watchdog@e6020000 {
0145 compatible = "renesas,r8a774c0-wdt",
0146 "renesas,rcar-gen3-wdt";
0147 reg = <0 0xe6020000 0 0x0c>;
0148 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0149 clocks = <&cpg CPG_MOD 402>;
0150 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0151 resets = <&cpg 402>;
0152 status = "disabled";
0153 };
0154
0155 gpio0: gpio@e6050000 {
0156 compatible = "renesas,gpio-r8a774c0",
0157 "renesas,rcar-gen3-gpio";
0158 reg = <0 0xe6050000 0 0x50>;
0159 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0160 #gpio-cells = <2>;
0161 gpio-controller;
0162 gpio-ranges = <&pfc 0 0 18>;
0163 #interrupt-cells = <2>;
0164 interrupt-controller;
0165 clocks = <&cpg CPG_MOD 912>;
0166 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0167 resets = <&cpg 912>;
0168 };
0169
0170 gpio1: gpio@e6051000 {
0171 compatible = "renesas,gpio-r8a774c0",
0172 "renesas,rcar-gen3-gpio";
0173 reg = <0 0xe6051000 0 0x50>;
0174 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0175 #gpio-cells = <2>;
0176 gpio-controller;
0177 gpio-ranges = <&pfc 0 32 23>;
0178 #interrupt-cells = <2>;
0179 interrupt-controller;
0180 clocks = <&cpg CPG_MOD 911>;
0181 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0182 resets = <&cpg 911>;
0183 };
0184
0185 gpio2: gpio@e6052000 {
0186 compatible = "renesas,gpio-r8a774c0",
0187 "renesas,rcar-gen3-gpio";
0188 reg = <0 0xe6052000 0 0x50>;
0189 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0190 #gpio-cells = <2>;
0191 gpio-controller;
0192 gpio-ranges = <&pfc 0 64 26>;
0193 #interrupt-cells = <2>;
0194 interrupt-controller;
0195 clocks = <&cpg CPG_MOD 910>;
0196 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0197 resets = <&cpg 910>;
0198 };
0199
0200 gpio3: gpio@e6053000 {
0201 compatible = "renesas,gpio-r8a774c0",
0202 "renesas,rcar-gen3-gpio";
0203 reg = <0 0xe6053000 0 0x50>;
0204 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0205 #gpio-cells = <2>;
0206 gpio-controller;
0207 gpio-ranges = <&pfc 0 96 16>;
0208 #interrupt-cells = <2>;
0209 interrupt-controller;
0210 clocks = <&cpg CPG_MOD 909>;
0211 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0212 resets = <&cpg 909>;
0213 };
0214
0215 gpio4: gpio@e6054000 {
0216 compatible = "renesas,gpio-r8a774c0",
0217 "renesas,rcar-gen3-gpio";
0218 reg = <0 0xe6054000 0 0x50>;
0219 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0220 #gpio-cells = <2>;
0221 gpio-controller;
0222 gpio-ranges = <&pfc 0 128 11>;
0223 #interrupt-cells = <2>;
0224 interrupt-controller;
0225 clocks = <&cpg CPG_MOD 908>;
0226 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0227 resets = <&cpg 908>;
0228 };
0229
0230 gpio5: gpio@e6055000 {
0231 compatible = "renesas,gpio-r8a774c0",
0232 "renesas,rcar-gen3-gpio";
0233 reg = <0 0xe6055000 0 0x50>;
0234 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0235 #gpio-cells = <2>;
0236 gpio-controller;
0237 gpio-ranges = <&pfc 0 160 20>;
0238 #interrupt-cells = <2>;
0239 interrupt-controller;
0240 clocks = <&cpg CPG_MOD 907>;
0241 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0242 resets = <&cpg 907>;
0243 };
0244
0245 gpio6: gpio@e6055400 {
0246 compatible = "renesas,gpio-r8a774c0",
0247 "renesas,rcar-gen3-gpio";
0248 reg = <0 0xe6055400 0 0x50>;
0249 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0250 #gpio-cells = <2>;
0251 gpio-controller;
0252 gpio-ranges = <&pfc 0 192 18>;
0253 #interrupt-cells = <2>;
0254 interrupt-controller;
0255 clocks = <&cpg CPG_MOD 906>;
0256 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0257 resets = <&cpg 906>;
0258 };
0259
0260 pfc: pinctrl@e6060000 {
0261 compatible = "renesas,pfc-r8a774c0";
0262 reg = <0 0xe6060000 0 0x508>;
0263 };
0264
0265 cmt0: timer@e60f0000 {
0266 compatible = "renesas,r8a774c0-cmt0",
0267 "renesas,rcar-gen3-cmt0";
0268 reg = <0 0xe60f0000 0 0x1004>;
0269 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0270 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0271 clocks = <&cpg CPG_MOD 303>;
0272 clock-names = "fck";
0273 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0274 resets = <&cpg 303>;
0275 status = "disabled";
0276 };
0277
0278 cmt1: timer@e6130000 {
0279 compatible = "renesas,r8a774c0-cmt1",
0280 "renesas,rcar-gen3-cmt1";
0281 reg = <0 0xe6130000 0 0x1004>;
0282 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0283 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0284 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0285 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0286 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0287 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0288 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0289 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0290 clocks = <&cpg CPG_MOD 302>;
0291 clock-names = "fck";
0292 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0293 resets = <&cpg 302>;
0294 status = "disabled";
0295 };
0296
0297 cmt2: timer@e6140000 {
0298 compatible = "renesas,r8a774c0-cmt1",
0299 "renesas,rcar-gen3-cmt1";
0300 reg = <0 0xe6140000 0 0x1004>;
0301 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0302 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0303 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0304 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0305 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0306 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0307 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0308 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0309 clocks = <&cpg CPG_MOD 301>;
0310 clock-names = "fck";
0311 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0312 resets = <&cpg 301>;
0313 status = "disabled";
0314 };
0315
0316 cmt3: timer@e6148000 {
0317 compatible = "renesas,r8a774c0-cmt1",
0318 "renesas,rcar-gen3-cmt1";
0319 reg = <0 0xe6148000 0 0x1004>;
0320 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0321 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0322 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0323 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0324 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0325 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0326 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0327 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0328 clocks = <&cpg CPG_MOD 300>;
0329 clock-names = "fck";
0330 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0331 resets = <&cpg 300>;
0332 status = "disabled";
0333 };
0334
0335 cpg: clock-controller@e6150000 {
0336 compatible = "renesas,r8a774c0-cpg-mssr";
0337 reg = <0 0xe6150000 0 0x1000>;
0338 clocks = <&extal_clk>;
0339 clock-names = "extal";
0340 #clock-cells = <2>;
0341 #power-domain-cells = <0>;
0342 #reset-cells = <1>;
0343 };
0344
0345 rst: reset-controller@e6160000 {
0346 compatible = "renesas,r8a774c0-rst";
0347 reg = <0 0xe6160000 0 0x0200>;
0348 };
0349
0350 sysc: system-controller@e6180000 {
0351 compatible = "renesas,r8a774c0-sysc";
0352 reg = <0 0xe6180000 0 0x0400>;
0353 #power-domain-cells = <1>;
0354 };
0355
0356 thermal: thermal@e6190000 {
0357 compatible = "renesas,thermal-r8a774c0";
0358 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
0359 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0360 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0361 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0362 clocks = <&cpg CPG_MOD 522>;
0363 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0364 resets = <&cpg 522>;
0365 #thermal-sensor-cells = <0>;
0366 };
0367
0368 intc_ex: interrupt-controller@e61c0000 {
0369 compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc";
0370 #interrupt-cells = <2>;
0371 interrupt-controller;
0372 reg = <0 0xe61c0000 0 0x200>;
0373 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0374 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0375 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0376 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0377 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0378 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0379 clocks = <&cpg CPG_MOD 407>;
0380 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0381 resets = <&cpg 407>;
0382 };
0383
0384 tmu0: timer@e61e0000 {
0385 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
0386 reg = <0 0xe61e0000 0 0x30>;
0387 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0388 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0389 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0390 clocks = <&cpg CPG_MOD 125>;
0391 clock-names = "fck";
0392 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0393 resets = <&cpg 125>;
0394 status = "disabled";
0395 };
0396
0397 tmu1: timer@e6fc0000 {
0398 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
0399 reg = <0 0xe6fc0000 0 0x30>;
0400 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0401 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0402 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0403 clocks = <&cpg CPG_MOD 124>;
0404 clock-names = "fck";
0405 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0406 resets = <&cpg 124>;
0407 status = "disabled";
0408 };
0409
0410 tmu2: timer@e6fd0000 {
0411 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
0412 reg = <0 0xe6fd0000 0 0x30>;
0413 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0414 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0415 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0416 clocks = <&cpg CPG_MOD 123>;
0417 clock-names = "fck";
0418 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0419 resets = <&cpg 123>;
0420 status = "disabled";
0421 };
0422
0423 tmu3: timer@e6fe0000 {
0424 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
0425 reg = <0 0xe6fe0000 0 0x30>;
0426 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0427 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0428 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0429 clocks = <&cpg CPG_MOD 122>;
0430 clock-names = "fck";
0431 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0432 resets = <&cpg 122>;
0433 status = "disabled";
0434 };
0435
0436 tmu4: timer@ffc00000 {
0437 compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
0438 reg = <0 0xffc00000 0 0x30>;
0439 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0440 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0441 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0442 clocks = <&cpg CPG_MOD 121>;
0443 clock-names = "fck";
0444 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0445 resets = <&cpg 121>;
0446 status = "disabled";
0447 };
0448
0449 i2c0: i2c@e6500000 {
0450 #address-cells = <1>;
0451 #size-cells = <0>;
0452 compatible = "renesas,i2c-r8a774c0",
0453 "renesas,rcar-gen3-i2c";
0454 reg = <0 0xe6500000 0 0x40>;
0455 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0456 clocks = <&cpg CPG_MOD 931>;
0457 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0458 resets = <&cpg 931>;
0459 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0460 <&dmac2 0x91>, <&dmac2 0x90>;
0461 dma-names = "tx", "rx", "tx", "rx";
0462 i2c-scl-internal-delay-ns = <110>;
0463 status = "disabled";
0464 };
0465
0466 i2c1: i2c@e6508000 {
0467 #address-cells = <1>;
0468 #size-cells = <0>;
0469 compatible = "renesas,i2c-r8a774c0",
0470 "renesas,rcar-gen3-i2c";
0471 reg = <0 0xe6508000 0 0x40>;
0472 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0473 clocks = <&cpg CPG_MOD 930>;
0474 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0475 resets = <&cpg 930>;
0476 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0477 <&dmac2 0x93>, <&dmac2 0x92>;
0478 dma-names = "tx", "rx", "tx", "rx";
0479 i2c-scl-internal-delay-ns = <6>;
0480 status = "disabled";
0481 };
0482
0483 i2c2: i2c@e6510000 {
0484 #address-cells = <1>;
0485 #size-cells = <0>;
0486 compatible = "renesas,i2c-r8a774c0",
0487 "renesas,rcar-gen3-i2c";
0488 reg = <0 0xe6510000 0 0x40>;
0489 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0490 clocks = <&cpg CPG_MOD 929>;
0491 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0492 resets = <&cpg 929>;
0493 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0494 <&dmac2 0x95>, <&dmac2 0x94>;
0495 dma-names = "tx", "rx", "tx", "rx";
0496 i2c-scl-internal-delay-ns = <6>;
0497 status = "disabled";
0498 };
0499
0500 i2c3: i2c@e66d0000 {
0501 #address-cells = <1>;
0502 #size-cells = <0>;
0503 compatible = "renesas,i2c-r8a774c0",
0504 "renesas,rcar-gen3-i2c";
0505 reg = <0 0xe66d0000 0 0x40>;
0506 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0507 clocks = <&cpg CPG_MOD 928>;
0508 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0509 resets = <&cpg 928>;
0510 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0511 dma-names = "tx", "rx";
0512 i2c-scl-internal-delay-ns = <110>;
0513 status = "disabled";
0514 };
0515
0516 i2c4: i2c@e66d8000 {
0517 #address-cells = <1>;
0518 #size-cells = <0>;
0519 compatible = "renesas,i2c-r8a774c0",
0520 "renesas,rcar-gen3-i2c";
0521 reg = <0 0xe66d8000 0 0x40>;
0522 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0523 clocks = <&cpg CPG_MOD 927>;
0524 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0525 resets = <&cpg 927>;
0526 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
0527 dma-names = "tx", "rx";
0528 i2c-scl-internal-delay-ns = <6>;
0529 status = "disabled";
0530 };
0531
0532 i2c5: i2c@e66e0000 {
0533 #address-cells = <1>;
0534 #size-cells = <0>;
0535 compatible = "renesas,i2c-r8a774c0",
0536 "renesas,rcar-gen3-i2c";
0537 reg = <0 0xe66e0000 0 0x40>;
0538 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0539 clocks = <&cpg CPG_MOD 919>;
0540 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0541 resets = <&cpg 919>;
0542 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
0543 dma-names = "tx", "rx";
0544 i2c-scl-internal-delay-ns = <6>;
0545 status = "disabled";
0546 };
0547
0548 i2c6: i2c@e66e8000 {
0549 #address-cells = <1>;
0550 #size-cells = <0>;
0551 compatible = "renesas,i2c-r8a774c0",
0552 "renesas,rcar-gen3-i2c";
0553 reg = <0 0xe66e8000 0 0x40>;
0554 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0555 clocks = <&cpg CPG_MOD 918>;
0556 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0557 resets = <&cpg 918>;
0558 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
0559 dma-names = "tx", "rx";
0560 i2c-scl-internal-delay-ns = <6>;
0561 status = "disabled";
0562 };
0563
0564 i2c7: i2c@e6690000 {
0565 #address-cells = <1>;
0566 #size-cells = <0>;
0567 compatible = "renesas,i2c-r8a774c0",
0568 "renesas,rcar-gen3-i2c";
0569 reg = <0 0xe6690000 0 0x40>;
0570 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
0571 clocks = <&cpg CPG_MOD 1003>;
0572 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0573 resets = <&cpg 1003>;
0574 i2c-scl-internal-delay-ns = <6>;
0575 status = "disabled";
0576 };
0577
0578 iic_pmic: i2c@e60b0000 {
0579 #address-cells = <1>;
0580 #size-cells = <0>;
0581 compatible = "renesas,iic-r8a774c0",
0582 "renesas,rcar-gen3-iic",
0583 "renesas,rmobile-iic";
0584 reg = <0 0xe60b0000 0 0x425>;
0585 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0586 clocks = <&cpg CPG_MOD 926>;
0587 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0588 resets = <&cpg 926>;
0589 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
0590 dma-names = "tx", "rx";
0591 status = "disabled";
0592 };
0593
0594 hscif0: serial@e6540000 {
0595 compatible = "renesas,hscif-r8a774c0",
0596 "renesas,rcar-gen3-hscif",
0597 "renesas,hscif";
0598 reg = <0 0xe6540000 0 0x60>;
0599 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0600 clocks = <&cpg CPG_MOD 520>,
0601 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
0602 <&scif_clk>;
0603 clock-names = "fck", "brg_int", "scif_clk";
0604 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0605 <&dmac2 0x31>, <&dmac2 0x30>;
0606 dma-names = "tx", "rx", "tx", "rx";
0607 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0608 resets = <&cpg 520>;
0609 status = "disabled";
0610 };
0611
0612 hscif1: serial@e6550000 {
0613 compatible = "renesas,hscif-r8a774c0",
0614 "renesas,rcar-gen3-hscif",
0615 "renesas,hscif";
0616 reg = <0 0xe6550000 0 0x60>;
0617 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0618 clocks = <&cpg CPG_MOD 519>,
0619 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
0620 <&scif_clk>;
0621 clock-names = "fck", "brg_int", "scif_clk";
0622 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0623 <&dmac2 0x33>, <&dmac2 0x32>;
0624 dma-names = "tx", "rx", "tx", "rx";
0625 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0626 resets = <&cpg 519>;
0627 status = "disabled";
0628 };
0629
0630 hscif2: serial@e6560000 {
0631 compatible = "renesas,hscif-r8a774c0",
0632 "renesas,rcar-gen3-hscif",
0633 "renesas,hscif";
0634 reg = <0 0xe6560000 0 0x60>;
0635 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0636 clocks = <&cpg CPG_MOD 518>,
0637 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
0638 <&scif_clk>;
0639 clock-names = "fck", "brg_int", "scif_clk";
0640 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0641 <&dmac2 0x35>, <&dmac2 0x34>;
0642 dma-names = "tx", "rx", "tx", "rx";
0643 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0644 resets = <&cpg 518>;
0645 status = "disabled";
0646 };
0647
0648 hscif3: serial@e66a0000 {
0649 compatible = "renesas,hscif-r8a774c0",
0650 "renesas,rcar-gen3-hscif",
0651 "renesas,hscif";
0652 reg = <0 0xe66a0000 0 0x60>;
0653 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0654 clocks = <&cpg CPG_MOD 517>,
0655 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
0656 <&scif_clk>;
0657 clock-names = "fck", "brg_int", "scif_clk";
0658 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0659 dma-names = "tx", "rx";
0660 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0661 resets = <&cpg 517>;
0662 status = "disabled";
0663 };
0664
0665 hscif4: serial@e66b0000 {
0666 compatible = "renesas,hscif-r8a774c0",
0667 "renesas,rcar-gen3-hscif",
0668 "renesas,hscif";
0669 reg = <0 0xe66b0000 0 0x60>;
0670 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0671 clocks = <&cpg CPG_MOD 516>,
0672 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
0673 <&scif_clk>;
0674 clock-names = "fck", "brg_int", "scif_clk";
0675 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
0676 dma-names = "tx", "rx";
0677 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0678 resets = <&cpg 516>;
0679 status = "disabled";
0680 };
0681
0682 hsusb: usb@e6590000 {
0683 compatible = "renesas,usbhs-r8a774c0",
0684 "renesas,rcar-gen3-usbhs";
0685 reg = <0 0xe6590000 0 0x200>;
0686 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0687 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0688 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0689 <&usb_dmac1 0>, <&usb_dmac1 1>;
0690 dma-names = "ch0", "ch1", "ch2", "ch3";
0691 renesas,buswait = <11>;
0692 phys = <&usb2_phy0 3>;
0693 phy-names = "usb";
0694 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0695 resets = <&cpg 704>, <&cpg 703>;
0696 status = "disabled";
0697 };
0698
0699 usb_dmac0: dma-controller@e65a0000 {
0700 compatible = "renesas,r8a774c0-usb-dmac",
0701 "renesas,usb-dmac";
0702 reg = <0 0xe65a0000 0 0x100>;
0703 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0704 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0705 interrupt-names = "ch0", "ch1";
0706 clocks = <&cpg CPG_MOD 330>;
0707 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0708 resets = <&cpg 330>;
0709 #dma-cells = <1>;
0710 dma-channels = <2>;
0711 };
0712
0713 usb_dmac1: dma-controller@e65b0000 {
0714 compatible = "renesas,r8a774c0-usb-dmac",
0715 "renesas,usb-dmac";
0716 reg = <0 0xe65b0000 0 0x100>;
0717 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0718 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0719 interrupt-names = "ch0", "ch1";
0720 clocks = <&cpg CPG_MOD 331>;
0721 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0722 resets = <&cpg 331>;
0723 #dma-cells = <1>;
0724 dma-channels = <2>;
0725 };
0726
0727 dmac0: dma-controller@e6700000 {
0728 compatible = "renesas,dmac-r8a774c0",
0729 "renesas,rcar-dmac";
0730 reg = <0 0xe6700000 0 0x10000>;
0731 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0732 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0733 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0734 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0735 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0736 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0737 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0738 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0739 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0740 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0741 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0742 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0743 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0744 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0745 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0746 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
0747 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0748 interrupt-names = "error",
0749 "ch0", "ch1", "ch2", "ch3",
0750 "ch4", "ch5", "ch6", "ch7",
0751 "ch8", "ch9", "ch10", "ch11",
0752 "ch12", "ch13", "ch14", "ch15";
0753 clocks = <&cpg CPG_MOD 219>;
0754 clock-names = "fck";
0755 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0756 resets = <&cpg 219>;
0757 #dma-cells = <1>;
0758 dma-channels = <16>;
0759 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0760 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0761 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0762 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
0763 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
0764 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
0765 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
0766 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
0767 };
0768
0769 dmac1: dma-controller@e7300000 {
0770 compatible = "renesas,dmac-r8a774c0",
0771 "renesas,rcar-dmac";
0772 reg = <0 0xe7300000 0 0x10000>;
0773 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0774 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0775 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0776 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0777 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0778 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0779 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0780 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0781 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0782 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0783 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0784 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0785 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0786 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0787 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0788 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
0789 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
0790 interrupt-names = "error",
0791 "ch0", "ch1", "ch2", "ch3",
0792 "ch4", "ch5", "ch6", "ch7",
0793 "ch8", "ch9", "ch10", "ch11",
0794 "ch12", "ch13", "ch14", "ch15";
0795 clocks = <&cpg CPG_MOD 218>;
0796 clock-names = "fck";
0797 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0798 resets = <&cpg 218>;
0799 #dma-cells = <1>;
0800 dma-channels = <16>;
0801 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
0802 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
0803 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
0804 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
0805 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
0806 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
0807 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
0808 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
0809 };
0810
0811 dmac2: dma-controller@e7310000 {
0812 compatible = "renesas,dmac-r8a774c0",
0813 "renesas,rcar-dmac";
0814 reg = <0 0xe7310000 0 0x10000>;
0815 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
0816 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
0817 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
0818 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
0819 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
0820 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
0821 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
0822 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
0823 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
0824 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
0825 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
0826 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
0827 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
0828 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
0829 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
0830 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
0831 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
0832 interrupt-names = "error",
0833 "ch0", "ch1", "ch2", "ch3",
0834 "ch4", "ch5", "ch6", "ch7",
0835 "ch8", "ch9", "ch10", "ch11",
0836 "ch12", "ch13", "ch14", "ch15";
0837 clocks = <&cpg CPG_MOD 217>;
0838 clock-names = "fck";
0839 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0840 resets = <&cpg 217>;
0841 #dma-cells = <1>;
0842 dma-channels = <16>;
0843 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
0844 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
0845 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
0846 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
0847 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
0848 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
0849 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
0850 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
0851 };
0852
0853 ipmmu_ds0: iommu@e6740000 {
0854 compatible = "renesas,ipmmu-r8a774c0";
0855 reg = <0 0xe6740000 0 0x1000>;
0856 renesas,ipmmu-main = <&ipmmu_mm 0>;
0857 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0858 #iommu-cells = <1>;
0859 };
0860
0861 ipmmu_ds1: iommu@e7740000 {
0862 compatible = "renesas,ipmmu-r8a774c0";
0863 reg = <0 0xe7740000 0 0x1000>;
0864 renesas,ipmmu-main = <&ipmmu_mm 1>;
0865 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0866 #iommu-cells = <1>;
0867 };
0868
0869 ipmmu_hc: iommu@e6570000 {
0870 compatible = "renesas,ipmmu-r8a774c0";
0871 reg = <0 0xe6570000 0 0x1000>;
0872 renesas,ipmmu-main = <&ipmmu_mm 2>;
0873 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0874 #iommu-cells = <1>;
0875 };
0876
0877 ipmmu_mm: iommu@e67b0000 {
0878 compatible = "renesas,ipmmu-r8a774c0";
0879 reg = <0 0xe67b0000 0 0x1000>;
0880 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
0881 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
0882 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0883 #iommu-cells = <1>;
0884 };
0885
0886 ipmmu_mp: iommu@ec670000 {
0887 compatible = "renesas,ipmmu-r8a774c0";
0888 reg = <0 0xec670000 0 0x1000>;
0889 renesas,ipmmu-main = <&ipmmu_mm 4>;
0890 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0891 #iommu-cells = <1>;
0892 };
0893
0894 ipmmu_pv0: iommu@fd800000 {
0895 compatible = "renesas,ipmmu-r8a774c0";
0896 reg = <0 0xfd800000 0 0x1000>;
0897 renesas,ipmmu-main = <&ipmmu_mm 6>;
0898 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0899 #iommu-cells = <1>;
0900 };
0901
0902 ipmmu_vc0: iommu@fe6b0000 {
0903 compatible = "renesas,ipmmu-r8a774c0";
0904 reg = <0 0xfe6b0000 0 0x1000>;
0905 renesas,ipmmu-main = <&ipmmu_mm 12>;
0906 power-domains = <&sysc R8A774C0_PD_A3VC>;
0907 #iommu-cells = <1>;
0908 };
0909
0910 ipmmu_vi0: iommu@febd0000 {
0911 compatible = "renesas,ipmmu-r8a774c0";
0912 reg = <0 0xfebd0000 0 0x1000>;
0913 renesas,ipmmu-main = <&ipmmu_mm 14>;
0914 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0915 #iommu-cells = <1>;
0916 };
0917
0918 ipmmu_vp0: iommu@fe990000 {
0919 compatible = "renesas,ipmmu-r8a774c0";
0920 reg = <0 0xfe990000 0 0x1000>;
0921 renesas,ipmmu-main = <&ipmmu_mm 16>;
0922 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0923 #iommu-cells = <1>;
0924 };
0925
0926 avb: ethernet@e6800000 {
0927 compatible = "renesas,etheravb-r8a774c0",
0928 "renesas,etheravb-rcar-gen3";
0929 reg = <0 0xe6800000 0 0x800>;
0930 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0931 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0932 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0933 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0934 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0935 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0936 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
0937 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0938 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0939 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0940 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0941 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0942 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0943 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0944 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0945 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0946 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0947 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0948 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0949 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0950 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0951 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
0952 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
0953 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
0954 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0955 interrupt-names = "ch0", "ch1", "ch2", "ch3",
0956 "ch4", "ch5", "ch6", "ch7",
0957 "ch8", "ch9", "ch10", "ch11",
0958 "ch12", "ch13", "ch14", "ch15",
0959 "ch16", "ch17", "ch18", "ch19",
0960 "ch20", "ch21", "ch22", "ch23",
0961 "ch24";
0962 clocks = <&cpg CPG_MOD 812>;
0963 clock-names = "fck";
0964 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0965 resets = <&cpg 812>;
0966 phy-mode = "rgmii";
0967 rx-internal-delay-ps = <0>;
0968 iommus = <&ipmmu_ds0 16>;
0969 #address-cells = <1>;
0970 #size-cells = <0>;
0971 status = "disabled";
0972 };
0973
0974 can0: can@e6c30000 {
0975 compatible = "renesas,can-r8a774c0",
0976 "renesas,rcar-gen3-can";
0977 reg = <0 0xe6c30000 0 0x1000>;
0978 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
0979 clocks = <&cpg CPG_MOD 916>,
0980 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
0981 <&can_clk>;
0982 clock-names = "clkp1", "clkp2", "can_clk";
0983 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
0984 assigned-clock-rates = <40000000>;
0985 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0986 resets = <&cpg 916>;
0987 status = "disabled";
0988 };
0989
0990 can1: can@e6c38000 {
0991 compatible = "renesas,can-r8a774c0",
0992 "renesas,rcar-gen3-can";
0993 reg = <0 0xe6c38000 0 0x1000>;
0994 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
0995 clocks = <&cpg CPG_MOD 915>,
0996 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
0997 <&can_clk>;
0998 clock-names = "clkp1", "clkp2", "can_clk";
0999 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1000 assigned-clock-rates = <40000000>;
1001 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1002 resets = <&cpg 915>;
1003 status = "disabled";
1004 };
1005
1006 canfd: can@e66c0000 {
1007 compatible = "renesas,r8a774c0-canfd",
1008 "renesas,rcar-gen3-canfd";
1009 reg = <0 0xe66c0000 0 0x8000>;
1010 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1011 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1012 interrupt-names = "ch_int", "g_int";
1013 clocks = <&cpg CPG_MOD 914>,
1014 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1015 <&can_clk>;
1016 clock-names = "fck", "canfd", "can_clk";
1017 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1018 assigned-clock-rates = <40000000>;
1019 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1020 resets = <&cpg 914>;
1021 status = "disabled";
1022
1023 channel0 {
1024 status = "disabled";
1025 };
1026
1027 channel1 {
1028 status = "disabled";
1029 };
1030 };
1031
1032 pwm0: pwm@e6e30000 {
1033 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1034 reg = <0 0xe6e30000 0 0x8>;
1035 clocks = <&cpg CPG_MOD 523>;
1036 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1037 resets = <&cpg 523>;
1038 #pwm-cells = <2>;
1039 status = "disabled";
1040 };
1041
1042 pwm1: pwm@e6e31000 {
1043 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1044 reg = <0 0xe6e31000 0 0x8>;
1045 clocks = <&cpg CPG_MOD 523>;
1046 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1047 resets = <&cpg 523>;
1048 #pwm-cells = <2>;
1049 status = "disabled";
1050 };
1051
1052 pwm2: pwm@e6e32000 {
1053 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1054 reg = <0 0xe6e32000 0 0x8>;
1055 clocks = <&cpg CPG_MOD 523>;
1056 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1057 resets = <&cpg 523>;
1058 #pwm-cells = <2>;
1059 status = "disabled";
1060 };
1061
1062 pwm3: pwm@e6e33000 {
1063 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1064 reg = <0 0xe6e33000 0 0x8>;
1065 clocks = <&cpg CPG_MOD 523>;
1066 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1067 resets = <&cpg 523>;
1068 #pwm-cells = <2>;
1069 status = "disabled";
1070 };
1071
1072 pwm4: pwm@e6e34000 {
1073 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1074 reg = <0 0xe6e34000 0 0x8>;
1075 clocks = <&cpg CPG_MOD 523>;
1076 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1077 resets = <&cpg 523>;
1078 #pwm-cells = <2>;
1079 status = "disabled";
1080 };
1081
1082 pwm5: pwm@e6e35000 {
1083 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1084 reg = <0 0xe6e35000 0 0x8>;
1085 clocks = <&cpg CPG_MOD 523>;
1086 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1087 resets = <&cpg 523>;
1088 #pwm-cells = <2>;
1089 status = "disabled";
1090 };
1091
1092 pwm6: pwm@e6e36000 {
1093 compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1094 reg = <0 0xe6e36000 0 0x8>;
1095 clocks = <&cpg CPG_MOD 523>;
1096 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1097 resets = <&cpg 523>;
1098 #pwm-cells = <2>;
1099 status = "disabled";
1100 };
1101
1102 scif0: serial@e6e60000 {
1103 compatible = "renesas,scif-r8a774c0",
1104 "renesas,rcar-gen3-scif", "renesas,scif";
1105 reg = <0 0xe6e60000 0 64>;
1106 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MOD 207>,
1108 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1109 <&scif_clk>;
1110 clock-names = "fck", "brg_int", "scif_clk";
1111 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1112 <&dmac2 0x51>, <&dmac2 0x50>;
1113 dma-names = "tx", "rx", "tx", "rx";
1114 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1115 resets = <&cpg 207>;
1116 status = "disabled";
1117 };
1118
1119 scif1: serial@e6e68000 {
1120 compatible = "renesas,scif-r8a774c0",
1121 "renesas,rcar-gen3-scif", "renesas,scif";
1122 reg = <0 0xe6e68000 0 64>;
1123 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1124 clocks = <&cpg CPG_MOD 206>,
1125 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1126 <&scif_clk>;
1127 clock-names = "fck", "brg_int", "scif_clk";
1128 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1129 <&dmac2 0x53>, <&dmac2 0x52>;
1130 dma-names = "tx", "rx", "tx", "rx";
1131 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1132 resets = <&cpg 206>;
1133 status = "disabled";
1134 };
1135
1136 scif2: serial@e6e88000 {
1137 compatible = "renesas,scif-r8a774c0",
1138 "renesas,rcar-gen3-scif", "renesas,scif";
1139 reg = <0 0xe6e88000 0 64>;
1140 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1141 clocks = <&cpg CPG_MOD 310>,
1142 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1143 <&scif_clk>;
1144 clock-names = "fck", "brg_int", "scif_clk";
1145 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1146 <&dmac2 0x13>, <&dmac2 0x12>;
1147 dma-names = "tx", "rx", "tx", "rx";
1148 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1149 resets = <&cpg 310>;
1150 status = "disabled";
1151 };
1152
1153 scif3: serial@e6c50000 {
1154 compatible = "renesas,scif-r8a774c0",
1155 "renesas,rcar-gen3-scif", "renesas,scif";
1156 reg = <0 0xe6c50000 0 64>;
1157 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1158 clocks = <&cpg CPG_MOD 204>,
1159 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1160 <&scif_clk>;
1161 clock-names = "fck", "brg_int", "scif_clk";
1162 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1163 dma-names = "tx", "rx";
1164 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1165 resets = <&cpg 204>;
1166 status = "disabled";
1167 };
1168
1169 scif4: serial@e6c40000 {
1170 compatible = "renesas,scif-r8a774c0",
1171 "renesas,rcar-gen3-scif", "renesas,scif";
1172 reg = <0 0xe6c40000 0 64>;
1173 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1174 clocks = <&cpg CPG_MOD 203>,
1175 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1176 <&scif_clk>;
1177 clock-names = "fck", "brg_int", "scif_clk";
1178 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1179 dma-names = "tx", "rx";
1180 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1181 resets = <&cpg 203>;
1182 status = "disabled";
1183 };
1184
1185 scif5: serial@e6f30000 {
1186 compatible = "renesas,scif-r8a774c0",
1187 "renesas,rcar-gen3-scif", "renesas,scif";
1188 reg = <0 0xe6f30000 0 64>;
1189 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1190 clocks = <&cpg CPG_MOD 202>,
1191 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1192 <&scif_clk>;
1193 clock-names = "fck", "brg_int", "scif_clk";
1194 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1195 dma-names = "tx", "rx";
1196 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1197 resets = <&cpg 202>;
1198 status = "disabled";
1199 };
1200
1201 msiof0: spi@e6e90000 {
1202 compatible = "renesas,msiof-r8a774c0",
1203 "renesas,rcar-gen3-msiof";
1204 reg = <0 0xe6e90000 0 0x0064>;
1205 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1206 clocks = <&cpg CPG_MOD 211>;
1207 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1208 <&dmac2 0x41>, <&dmac2 0x40>;
1209 dma-names = "tx", "rx", "tx", "rx";
1210 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1211 resets = <&cpg 211>;
1212 #address-cells = <1>;
1213 #size-cells = <0>;
1214 status = "disabled";
1215 };
1216
1217 msiof1: spi@e6ea0000 {
1218 compatible = "renesas,msiof-r8a774c0",
1219 "renesas,rcar-gen3-msiof";
1220 reg = <0 0xe6ea0000 0 0x0064>;
1221 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1222 clocks = <&cpg CPG_MOD 210>;
1223 dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1224 dma-names = "tx", "rx";
1225 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1226 resets = <&cpg 210>;
1227 #address-cells = <1>;
1228 #size-cells = <0>;
1229 status = "disabled";
1230 };
1231
1232 msiof2: spi@e6c00000 {
1233 compatible = "renesas,msiof-r8a774c0",
1234 "renesas,rcar-gen3-msiof";
1235 reg = <0 0xe6c00000 0 0x0064>;
1236 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1237 clocks = <&cpg CPG_MOD 209>;
1238 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1239 dma-names = "tx", "rx";
1240 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1241 resets = <&cpg 209>;
1242 #address-cells = <1>;
1243 #size-cells = <0>;
1244 status = "disabled";
1245 };
1246
1247 msiof3: spi@e6c10000 {
1248 compatible = "renesas,msiof-r8a774c0",
1249 "renesas,rcar-gen3-msiof";
1250 reg = <0 0xe6c10000 0 0x0064>;
1251 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1252 clocks = <&cpg CPG_MOD 208>;
1253 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1254 dma-names = "tx", "rx";
1255 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1256 resets = <&cpg 208>;
1257 #address-cells = <1>;
1258 #size-cells = <0>;
1259 status = "disabled";
1260 };
1261
1262 vin4: video@e6ef4000 {
1263 compatible = "renesas,vin-r8a774c0";
1264 reg = <0 0xe6ef4000 0 0x1000>;
1265 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 807>;
1267 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1268 resets = <&cpg 807>;
1269 renesas,id = <4>;
1270 status = "disabled";
1271
1272 ports {
1273 #address-cells = <1>;
1274 #size-cells = <0>;
1275
1276 port@1 {
1277 #address-cells = <1>;
1278 #size-cells = <0>;
1279
1280 reg = <1>;
1281
1282 vin4csi40: endpoint@2 {
1283 reg = <2>;
1284 remote-endpoint = <&csi40vin4>;
1285 };
1286 };
1287 };
1288 };
1289
1290 vin5: video@e6ef5000 {
1291 compatible = "renesas,vin-r8a774c0";
1292 reg = <0 0xe6ef5000 0 0x1000>;
1293 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1294 clocks = <&cpg CPG_MOD 806>;
1295 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1296 resets = <&cpg 806>;
1297 renesas,id = <5>;
1298 status = "disabled";
1299
1300 ports {
1301 #address-cells = <1>;
1302 #size-cells = <0>;
1303
1304 port@1 {
1305 #address-cells = <1>;
1306 #size-cells = <0>;
1307
1308 reg = <1>;
1309
1310 vin5csi40: endpoint@2 {
1311 reg = <2>;
1312 remote-endpoint = <&csi40vin5>;
1313 };
1314 };
1315 };
1316 };
1317
1318 rcar_sound: sound@ec500000 {
1319 /*
1320 * #sound-dai-cells is required
1321 *
1322 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1323 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1324 */
1325 /*
1326 * #clock-cells is required for audio_clkout0/1/2/3
1327 *
1328 * clkout : #clock-cells = <0>; <&rcar_sound>;
1329 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1330 */
1331 compatible = "renesas,rcar_sound-r8a774c0",
1332 "renesas,rcar_sound-gen3";
1333 reg = <0 0xec500000 0 0x1000>, /* SCU */
1334 <0 0xec5a0000 0 0x100>, /* ADG */
1335 <0 0xec540000 0 0x1000>, /* SSIU */
1336 <0 0xec541000 0 0x280>, /* SSI */
1337 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1338 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1339
1340 clocks = <&cpg CPG_MOD 1005>,
1341 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1342 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1343 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1344 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1345 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1346 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1347 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1348 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1349 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1350 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1351 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1352 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1353 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1354 <&audio_clk_a>, <&audio_clk_b>,
1355 <&audio_clk_c>,
1356 <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1357 clock-names = "ssi-all",
1358 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1359 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1360 "ssi.1", "ssi.0",
1361 "src.9", "src.8", "src.7", "src.6",
1362 "src.5", "src.4", "src.3", "src.2",
1363 "src.1", "src.0",
1364 "mix.1", "mix.0",
1365 "ctu.1", "ctu.0",
1366 "dvc.0", "dvc.1",
1367 "clk_a", "clk_b", "clk_c", "clk_i";
1368 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1369 resets = <&cpg 1005>,
1370 <&cpg 1006>, <&cpg 1007>,
1371 <&cpg 1008>, <&cpg 1009>,
1372 <&cpg 1010>, <&cpg 1011>,
1373 <&cpg 1012>, <&cpg 1013>,
1374 <&cpg 1014>, <&cpg 1015>;
1375 reset-names = "ssi-all",
1376 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1377 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1378 "ssi.1", "ssi.0";
1379 status = "disabled";
1380
1381 rcar_sound,ctu {
1382 ctu00: ctu-0 { };
1383 ctu01: ctu-1 { };
1384 ctu02: ctu-2 { };
1385 ctu03: ctu-3 { };
1386 ctu10: ctu-4 { };
1387 ctu11: ctu-5 { };
1388 ctu12: ctu-6 { };
1389 ctu13: ctu-7 { };
1390 };
1391
1392 rcar_sound,dvc {
1393 dvc0: dvc-0 {
1394 dmas = <&audma0 0xbc>;
1395 dma-names = "tx";
1396 };
1397 dvc1: dvc-1 {
1398 dmas = <&audma0 0xbe>;
1399 dma-names = "tx";
1400 };
1401 };
1402
1403 rcar_sound,mix {
1404 mix0: mix-0 { };
1405 mix1: mix-1 { };
1406 };
1407
1408 rcar_sound,src {
1409 src0: src-0 {
1410 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1411 dmas = <&audma0 0x85>, <&audma0 0x9a>;
1412 dma-names = "rx", "tx";
1413 };
1414 src1: src-1 {
1415 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1416 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1417 dma-names = "rx", "tx";
1418 };
1419 src2: src-2 {
1420 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1421 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1422 dma-names = "rx", "tx";
1423 };
1424 src3: src-3 {
1425 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1426 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1427 dma-names = "rx", "tx";
1428 };
1429 src4: src-4 {
1430 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1431 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1432 dma-names = "rx", "tx";
1433 };
1434 src5: src-5 {
1435 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1436 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1437 dma-names = "rx", "tx";
1438 };
1439 src6: src-6 {
1440 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1441 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1442 dma-names = "rx", "tx";
1443 };
1444 src7: src-7 {
1445 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1446 dmas = <&audma0 0x93>, <&audma0 0xb6>;
1447 dma-names = "rx", "tx";
1448 };
1449 src8: src-8 {
1450 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1451 dmas = <&audma0 0x95>, <&audma0 0xb8>;
1452 dma-names = "rx", "tx";
1453 };
1454 src9: src-9 {
1455 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1456 dmas = <&audma0 0x97>, <&audma0 0xba>;
1457 dma-names = "rx", "tx";
1458 };
1459 };
1460
1461 rcar_sound,ssi {
1462 ssi0: ssi-0 {
1463 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1464 dmas = <&audma0 0x01>, <&audma0 0x02>,
1465 <&audma0 0x15>, <&audma0 0x16>;
1466 dma-names = "rx", "tx", "rxu", "txu";
1467 };
1468 ssi1: ssi-1 {
1469 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1470 dmas = <&audma0 0x03>, <&audma0 0x04>,
1471 <&audma0 0x49>, <&audma0 0x4a>;
1472 dma-names = "rx", "tx", "rxu", "txu";
1473 };
1474 ssi2: ssi-2 {
1475 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1476 dmas = <&audma0 0x05>, <&audma0 0x06>,
1477 <&audma0 0x63>, <&audma0 0x64>;
1478 dma-names = "rx", "tx", "rxu", "txu";
1479 };
1480 ssi3: ssi-3 {
1481 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1482 dmas = <&audma0 0x07>, <&audma0 0x08>,
1483 <&audma0 0x6f>, <&audma0 0x70>;
1484 dma-names = "rx", "tx", "rxu", "txu";
1485 };
1486 ssi4: ssi-4 {
1487 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1488 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1489 <&audma0 0x71>, <&audma0 0x72>;
1490 dma-names = "rx", "tx", "rxu", "txu";
1491 };
1492 ssi5: ssi-5 {
1493 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1494 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1495 <&audma0 0x73>, <&audma0 0x74>;
1496 dma-names = "rx", "tx", "rxu", "txu";
1497 };
1498 ssi6: ssi-6 {
1499 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1500 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1501 <&audma0 0x75>, <&audma0 0x76>;
1502 dma-names = "rx", "tx", "rxu", "txu";
1503 };
1504 ssi7: ssi-7 {
1505 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1506 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1507 <&audma0 0x79>, <&audma0 0x7a>;
1508 dma-names = "rx", "tx", "rxu", "txu";
1509 };
1510 ssi8: ssi-8 {
1511 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1512 dmas = <&audma0 0x11>, <&audma0 0x12>,
1513 <&audma0 0x7b>, <&audma0 0x7c>;
1514 dma-names = "rx", "tx", "rxu", "txu";
1515 };
1516 ssi9: ssi-9 {
1517 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1518 dmas = <&audma0 0x13>, <&audma0 0x14>,
1519 <&audma0 0x7d>, <&audma0 0x7e>;
1520 dma-names = "rx", "tx", "rxu", "txu";
1521 };
1522 };
1523 };
1524
1525 audma0: dma-controller@ec700000 {
1526 compatible = "renesas,dmac-r8a774c0",
1527 "renesas,rcar-dmac";
1528 reg = <0 0xec700000 0 0x10000>;
1529 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1530 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1531 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1532 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1533 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1534 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1535 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1536 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1537 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1538 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1539 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1540 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1541 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1542 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1543 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1544 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1545 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1546 interrupt-names = "error",
1547 "ch0", "ch1", "ch2", "ch3",
1548 "ch4", "ch5", "ch6", "ch7",
1549 "ch8", "ch9", "ch10", "ch11",
1550 "ch12", "ch13", "ch14", "ch15";
1551 clocks = <&cpg CPG_MOD 502>;
1552 clock-names = "fck";
1553 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1554 resets = <&cpg 502>;
1555 #dma-cells = <1>;
1556 dma-channels = <16>;
1557 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1558 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1559 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1560 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1561 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1562 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1563 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1564 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1565 };
1566
1567 xhci0: usb@ee000000 {
1568 compatible = "renesas,xhci-r8a774c0",
1569 "renesas,rcar-gen3-xhci";
1570 reg = <0 0xee000000 0 0xc00>;
1571 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1572 clocks = <&cpg CPG_MOD 328>;
1573 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1574 resets = <&cpg 328>;
1575 status = "disabled";
1576 };
1577
1578 usb3_peri0: usb@ee020000 {
1579 compatible = "renesas,r8a774c0-usb3-peri",
1580 "renesas,rcar-gen3-usb3-peri";
1581 reg = <0 0xee020000 0 0x400>;
1582 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1583 clocks = <&cpg CPG_MOD 328>;
1584 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1585 resets = <&cpg 328>;
1586 status = "disabled";
1587 };
1588
1589 ohci0: usb@ee080000 {
1590 compatible = "generic-ohci";
1591 reg = <0 0xee080000 0 0x100>;
1592 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1593 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1594 phys = <&usb2_phy0 1>;
1595 phy-names = "usb";
1596 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1597 resets = <&cpg 703>, <&cpg 704>;
1598 status = "disabled";
1599 };
1600
1601 ehci0: usb@ee080100 {
1602 compatible = "generic-ehci";
1603 reg = <0 0xee080100 0 0x100>;
1604 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1605 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1606 phys = <&usb2_phy0 2>;
1607 phy-names = "usb";
1608 companion = <&ohci0>;
1609 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1610 resets = <&cpg 703>, <&cpg 704>;
1611 status = "disabled";
1612 };
1613
1614 usb2_phy0: usb-phy@ee080200 {
1615 compatible = "renesas,usb2-phy-r8a774c0",
1616 "renesas,rcar-gen3-usb2-phy";
1617 reg = <0 0xee080200 0 0x700>;
1618 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1619 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1620 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1621 resets = <&cpg 703>, <&cpg 704>;
1622 #phy-cells = <1>;
1623 status = "disabled";
1624 };
1625
1626 sdhi0: mmc@ee100000 {
1627 compatible = "renesas,sdhi-r8a774c0",
1628 "renesas,rcar-gen3-sdhi";
1629 reg = <0 0xee100000 0 0x2000>;
1630 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1631 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1632 clock-names = "core", "clkh";
1633 max-frequency = <200000000>;
1634 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1635 resets = <&cpg 314>;
1636 status = "disabled";
1637 };
1638
1639 sdhi1: mmc@ee120000 {
1640 compatible = "renesas,sdhi-r8a774c0",
1641 "renesas,rcar-gen3-sdhi";
1642 reg = <0 0xee120000 0 0x2000>;
1643 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1644 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1645 clock-names = "core", "clkh";
1646 max-frequency = <200000000>;
1647 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1648 resets = <&cpg 313>;
1649 status = "disabled";
1650 };
1651
1652 sdhi3: mmc@ee160000 {
1653 compatible = "renesas,sdhi-r8a774c0",
1654 "renesas,rcar-gen3-sdhi";
1655 reg = <0 0xee160000 0 0x2000>;
1656 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1657 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1658 clock-names = "core", "clkh";
1659 max-frequency = <200000000>;
1660 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1661 resets = <&cpg 311>;
1662 status = "disabled";
1663 };
1664
1665 rpc: spi@ee200000 {
1666 compatible = "renesas,r8a774c0-rpc-if",
1667 "renesas,rcar-gen3-rpc-if";
1668 reg = <0 0xee200000 0 0x200>,
1669 <0 0x08000000 0 0x4000000>,
1670 <0 0xee208000 0 0x100>;
1671 reg-names = "regs", "dirmap", "wbuf";
1672 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1673 clocks = <&cpg CPG_MOD 917>;
1674 clock-names = "rpc";
1675 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1676 resets = <&cpg 917>;
1677 #address-cells = <1>;
1678 #size-cells = <0>;
1679 status = "disabled";
1680 };
1681
1682 gic: interrupt-controller@f1010000 {
1683 compatible = "arm,gic-400";
1684 #interrupt-cells = <3>;
1685 #address-cells = <0>;
1686 interrupt-controller;
1687 reg = <0x0 0xf1010000 0 0x1000>,
1688 <0x0 0xf1020000 0 0x20000>,
1689 <0x0 0xf1040000 0 0x20000>,
1690 <0x0 0xf1060000 0 0x20000>;
1691 interrupts = <GIC_PPI 9
1692 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1693 clocks = <&cpg CPG_MOD 408>;
1694 clock-names = "clk";
1695 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1696 resets = <&cpg 408>;
1697 };
1698
1699 pciec0: pcie@fe000000 {
1700 compatible = "renesas,pcie-r8a774c0",
1701 "renesas,pcie-rcar-gen3";
1702 reg = <0 0xfe000000 0 0x80000>;
1703 #address-cells = <3>;
1704 #size-cells = <2>;
1705 bus-range = <0x00 0xff>;
1706 device_type = "pci";
1707 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1708 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1709 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1710 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1711 /* Map all possible DDR as inbound ranges */
1712 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1713 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1714 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1715 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1716 #interrupt-cells = <1>;
1717 interrupt-map-mask = <0 0 0 0>;
1718 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1719 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1720 clock-names = "pcie", "pcie_bus";
1721 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1722 resets = <&cpg 319>;
1723 status = "disabled";
1724 };
1725
1726 pciec0_ep: pcie-ep@fe000000 {
1727 compatible = "renesas,r8a774c0-pcie-ep",
1728 "renesas,rcar-gen3-pcie-ep";
1729 reg = <0x0 0xfe000000 0 0x80000>,
1730 <0x0 0xfe100000 0 0x100000>,
1731 <0x0 0xfe200000 0 0x200000>,
1732 <0x0 0x30000000 0 0x8000000>,
1733 <0x0 0x38000000 0 0x8000000>;
1734 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
1735 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1736 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1737 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1738 clocks = <&cpg CPG_MOD 319>;
1739 clock-names = "pcie";
1740 resets = <&cpg 319>;
1741 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1742 status = "disabled";
1743 };
1744
1745 vspb0: vsp@fe960000 {
1746 compatible = "renesas,vsp2";
1747 reg = <0 0xfe960000 0 0x8000>;
1748 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1749 clocks = <&cpg CPG_MOD 626>;
1750 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1751 resets = <&cpg 626>;
1752 renesas,fcp = <&fcpvb0>;
1753 };
1754
1755 vspd0: vsp@fea20000 {
1756 compatible = "renesas,vsp2";
1757 reg = <0 0xfea20000 0 0x7000>;
1758 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1759 clocks = <&cpg CPG_MOD 623>;
1760 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1761 resets = <&cpg 623>;
1762 renesas,fcp = <&fcpvd0>;
1763 };
1764
1765 vspd1: vsp@fea28000 {
1766 compatible = "renesas,vsp2";
1767 reg = <0 0xfea28000 0 0x7000>;
1768 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1769 clocks = <&cpg CPG_MOD 622>;
1770 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1771 resets = <&cpg 622>;
1772 renesas,fcp = <&fcpvd1>;
1773 };
1774
1775 vspi0: vsp@fe9a0000 {
1776 compatible = "renesas,vsp2";
1777 reg = <0 0xfe9a0000 0 0x8000>;
1778 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1779 clocks = <&cpg CPG_MOD 631>;
1780 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1781 resets = <&cpg 631>;
1782 renesas,fcp = <&fcpvi0>;
1783 };
1784
1785 fcpvb0: fcp@fe96f000 {
1786 compatible = "renesas,fcpv";
1787 reg = <0 0xfe96f000 0 0x200>;
1788 clocks = <&cpg CPG_MOD 607>;
1789 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1790 resets = <&cpg 607>;
1791 iommus = <&ipmmu_vp0 5>;
1792 };
1793
1794 fcpvd0: fcp@fea27000 {
1795 compatible = "renesas,fcpv";
1796 reg = <0 0xfea27000 0 0x200>;
1797 clocks = <&cpg CPG_MOD 603>;
1798 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1799 resets = <&cpg 603>;
1800 iommus = <&ipmmu_vi0 8>;
1801 };
1802
1803 fcpvd1: fcp@fea2f000 {
1804 compatible = "renesas,fcpv";
1805 reg = <0 0xfea2f000 0 0x200>;
1806 clocks = <&cpg CPG_MOD 602>;
1807 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1808 resets = <&cpg 602>;
1809 iommus = <&ipmmu_vi0 9>;
1810 };
1811
1812 fcpvi0: fcp@fe9af000 {
1813 compatible = "renesas,fcpv";
1814 reg = <0 0xfe9af000 0 0x200>;
1815 clocks = <&cpg CPG_MOD 611>;
1816 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1817 resets = <&cpg 611>;
1818 iommus = <&ipmmu_vp0 8>;
1819 };
1820
1821 csi40: csi2@feaa0000 {
1822 compatible = "renesas,r8a774c0-csi2";
1823 reg = <0 0xfeaa0000 0 0x10000>;
1824 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1825 clocks = <&cpg CPG_MOD 716>;
1826 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1827 resets = <&cpg 716>;
1828 status = "disabled";
1829
1830 ports {
1831 #address-cells = <1>;
1832 #size-cells = <0>;
1833
1834 port@0 {
1835 reg = <0>;
1836 };
1837
1838 port@1 {
1839 #address-cells = <1>;
1840 #size-cells = <0>;
1841
1842 reg = <1>;
1843
1844 csi40vin4: endpoint@0 {
1845 reg = <0>;
1846 remote-endpoint = <&vin4csi40>;
1847 };
1848 csi40vin5: endpoint@1 {
1849 reg = <1>;
1850 remote-endpoint = <&vin5csi40>;
1851 };
1852 };
1853 };
1854 };
1855
1856 du: display@feb00000 {
1857 compatible = "renesas,du-r8a774c0";
1858 reg = <0 0xfeb00000 0 0x40000>;
1859 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1860 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1861 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1862 clock-names = "du.0", "du.1";
1863 resets = <&cpg 724>;
1864 reset-names = "du.0";
1865 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1866
1867 status = "disabled";
1868
1869 ports {
1870 #address-cells = <1>;
1871 #size-cells = <0>;
1872
1873 port@0 {
1874 reg = <0>;
1875 };
1876
1877 port@1 {
1878 reg = <1>;
1879 du_out_lvds0: endpoint {
1880 remote-endpoint = <&lvds0_in>;
1881 };
1882 };
1883
1884 port@2 {
1885 reg = <2>;
1886 du_out_lvds1: endpoint {
1887 remote-endpoint = <&lvds1_in>;
1888 };
1889 };
1890 };
1891 };
1892
1893 lvds0: lvds-encoder@feb90000 {
1894 compatible = "renesas,r8a774c0-lvds";
1895 reg = <0 0xfeb90000 0 0x20>;
1896 clocks = <&cpg CPG_MOD 727>;
1897 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1898 resets = <&cpg 727>;
1899 status = "disabled";
1900
1901 renesas,companion = <&lvds1>;
1902
1903 ports {
1904 #address-cells = <1>;
1905 #size-cells = <0>;
1906
1907 port@0 {
1908 reg = <0>;
1909 lvds0_in: endpoint {
1910 remote-endpoint = <&du_out_lvds0>;
1911 };
1912 };
1913
1914 port@1 {
1915 reg = <1>;
1916 };
1917 };
1918 };
1919
1920 lvds1: lvds-encoder@feb90100 {
1921 compatible = "renesas,r8a774c0-lvds";
1922 reg = <0 0xfeb90100 0 0x20>;
1923 clocks = <&cpg CPG_MOD 727>;
1924 power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1925 resets = <&cpg 726>;
1926 status = "disabled";
1927
1928 ports {
1929 #address-cells = <1>;
1930 #size-cells = <0>;
1931
1932 port@0 {
1933 reg = <0>;
1934 lvds1_in: endpoint {
1935 remote-endpoint = <&du_out_lvds1>;
1936 };
1937 };
1938
1939 port@1 {
1940 reg = <1>;
1941 };
1942 };
1943 };
1944
1945 prr: chipid@fff00044 {
1946 compatible = "renesas,prr";
1947 reg = <0 0xfff00044 0 4>;
1948 };
1949 };
1950
1951 thermal-zones {
1952 cpu-thermal {
1953 polling-delay-passive = <250>;
1954 polling-delay = <0>;
1955 thermal-sensors = <&thermal>;
1956 sustainable-power = <717>;
1957
1958 cooling-maps {
1959 map0 {
1960 trip = <&target>;
1961 cooling-device = <&a53_0 0 2>;
1962 contribution = <1024>;
1963 };
1964 };
1965
1966 trips {
1967 sensor1_crit: sensor1-crit {
1968 temperature = <120000>;
1969 hysteresis = <2000>;
1970 type = "critical";
1971 };
1972
1973 target: trip-point1 {
1974 temperature = <100000>;
1975 hysteresis = <2000>;
1976 type = "passive";
1977 };
1978 };
1979 };
1980 };
1981
1982 timer {
1983 compatible = "arm,armv8-timer";
1984 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1985 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1986 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1987 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1988 };
1989
1990 /* External USB clocks - can be overridden by the board */
1991 usb3s0_clk: usb3s0 {
1992 compatible = "fixed-clock";
1993 #clock-cells = <0>;
1994 clock-frequency = <0>;
1995 };
1996
1997 usb_extal_clk: usb_extal {
1998 compatible = "fixed-clock";
1999 #clock-cells = <0>;
2000 clock-frequency = <0>;
2001 };
2002 };
