arm64/renesas/r8a774c0-ek874-idk-2121wr.dts

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874),
0004  * connected to an Advantech IDK-2121WR 21.5" LVDS panel
0005  *
0006  * Copyright (C) 2019 Renesas Electronics Corp.
0007  */
0008
0009 #include "r8a774c0-ek874.dts"
0010
0011 / {
0012         backlight: backlight {
0013                 compatible = "pwm-backlight";
0014                 pwms = <&pwm5 0 50000>;
0015
0016                 brightness-levels = <0 4 8 16 32 64 128 255>;
0017                 default-brightness-level = <6>;
0018
0019                 power-supply = <&reg_12p0v>;
0020                 enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
0021         };
0022
0023         panel-lvds {
0024                 compatible = "advantech,idk-2121wr", "panel-lvds";
0025
0026                 width-mm = <476>;
0027                 height-mm = <268>;
0028
0029                 data-mapping = "vesa-24";
0030
0031                 panel-timing {
0032                         clock-frequency = <148500000>;
0033                         hactive = <1920>;
0034                         vactive = <1080>;
0035                         hsync-len = <44>;
0036                         hfront-porch = <88>;
0037                         hback-porch = <148>;
0038                         vfront-porch = <4>;
0039                         vback-porch = <36>;
0040                         vsync-len = <5>;
0041                 };
0042
0043                 ports {
0044                         #address-cells = <1>;
0045                         #size-cells = <0>;
0046
0047                         port@0 {
0048                                 reg = <0>;
0049                                 dual-lvds-odd-pixels;
0050                                 panel_in0: endpoint {
0051                                         remote-endpoint = <&lvds0_out>;
0052                                 };
0053                         };
0054
0055                         port@1 {
0056                                 reg = <1>;
0057                                 dual-lvds-even-pixels;
0058                                 panel_in1: endpoint {
0059                                         remote-endpoint = <&lvds1_out>;
0060                                 };
0061                         };
0062                 };
0063         };
0064 };
0065
0066 &gpio0 {
0067         /*
0068          * When GP0_17 is low LVDS[01] are connected to the LVDS connector
0069          * When GP0_17 is high LVDS[01] are connected to the LT8918L
0070          */
0071         lvds-connector-en-hog {
0072                 gpio-hog;
0073                 gpios = <17 GPIO_ACTIVE_HIGH>;
0074                 output-low;
0075                 line-name = "lvds-connector-en-gpio";
0076         };
0077 };
0078
0079 &lvds0 {
0080         ports {
0081                 port@1 {
0082                         lvds0_out: endpoint {
0083                                 remote-endpoint = <&panel_in0>;
0084                         };
0085                 };
0086         };
0087 };
0088
0089 &lvds1 {
0090         status = "okay";
0091
0092         clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
0093         clock-names = "fck", "dclkin.0", "extal";
0094
0095         ports {
0096                 port@1 {
0097                         lvds1_out: endpoint {
0098                                 remote-endpoint = <&panel_in1>;
0099                         };
0100                 };
0101         };
0102 };
0103
0104 &pfc {
0105         pwm5_pins: pwm5 {
0106                 groups = "pwm5_a";
0107                 function = "pwm5";
0108         };
0109 };
0110
0111 &pwm5 {
0112         pinctrl-0 = <&pwm5_pins>;
0113         pinctrl-names = "default";
0114
0115         status = "okay";
0116 };