0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the r8a774b1 SoC
0004 *
0005 * Copyright (C) 2019 Renesas Electronics Corp.
0006 */
0007
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009 #include <dt-bindings/interrupt-controller/arm-gic.h>
0010 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
0011 #include <dt-bindings/power/r8a774b1-sysc.h>
0012
0013 #define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
0014
0015 / {
0016 compatible = "renesas,r8a774b1";
0017 #address-cells = <2>;
0018 #size-cells = <2>;
0019
0020 /*
0021 * The external audio clocks are configured as 0 Hz fixed frequency
0022 * clocks by default.
0023 * Boards that provide audio clocks should override them.
0024 */
0025 audio_clk_a: audio_clk_a {
0026 compatible = "fixed-clock";
0027 #clock-cells = <0>;
0028 clock-frequency = <0>;
0029 };
0030
0031 audio_clk_b: audio_clk_b {
0032 compatible = "fixed-clock";
0033 #clock-cells = <0>;
0034 clock-frequency = <0>;
0035 };
0036
0037 audio_clk_c: audio_clk_c {
0038 compatible = "fixed-clock";
0039 #clock-cells = <0>;
0040 clock-frequency = <0>;
0041 };
0042
0043 /* External CAN clock - to be overridden by boards that provide it */
0044 can_clk: can {
0045 compatible = "fixed-clock";
0046 #clock-cells = <0>;
0047 clock-frequency = <0>;
0048 };
0049
0050 cluster0_opp: opp-table-0 {
0051 compatible = "operating-points-v2";
0052 opp-shared;
0053
0054 opp-500000000 {
0055 opp-hz = /bits/ 64 <500000000>;
0056 opp-microvolt = <830000>;
0057 clock-latency-ns = <300000>;
0058 };
0059 opp-1000000000 {
0060 opp-hz = /bits/ 64 <1000000000>;
0061 opp-microvolt = <830000>;
0062 clock-latency-ns = <300000>;
0063 };
0064 opp-1500000000 {
0065 opp-hz = /bits/ 64 <1500000000>;
0066 opp-microvolt = <830000>;
0067 clock-latency-ns = <300000>;
0068 opp-suspend;
0069 };
0070 };
0071
0072 cpus {
0073 #address-cells = <1>;
0074 #size-cells = <0>;
0075
0076 a57_0: cpu@0 {
0077 compatible = "arm,cortex-a57";
0078 reg = <0x0>;
0079 device_type = "cpu";
0080 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>;
0081 next-level-cache = <&L2_CA57>;
0082 enable-method = "psci";
0083 #cooling-cells = <2>;
0084 dynamic-power-coefficient = <854>;
0085 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
0086 operating-points-v2 = <&cluster0_opp>;
0087 };
0088
0089 a57_1: cpu@1 {
0090 compatible = "arm,cortex-a57";
0091 reg = <0x1>;
0092 device_type = "cpu";
0093 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>;
0094 next-level-cache = <&L2_CA57>;
0095 enable-method = "psci";
0096 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
0097 operating-points-v2 = <&cluster0_opp>;
0098 };
0099
0100 L2_CA57: cache-controller-0 {
0101 compatible = "cache";
0102 power-domains = <&sysc R8A774B1_PD_CA57_SCU>;
0103 cache-unified;
0104 cache-level = <2>;
0105 };
0106 };
0107
0108 extal_clk: extal {
0109 compatible = "fixed-clock";
0110 #clock-cells = <0>;
0111 /* This value must be overridden by the board */
0112 clock-frequency = <0>;
0113 };
0114
0115 extalr_clk: extalr {
0116 compatible = "fixed-clock";
0117 #clock-cells = <0>;
0118 /* This value must be overridden by the board */
0119 clock-frequency = <0>;
0120 };
0121
0122 /* External PCIe clock - can be overridden by the board */
0123 pcie_bus_clk: pcie_bus {
0124 compatible = "fixed-clock";
0125 #clock-cells = <0>;
0126 clock-frequency = <0>;
0127 };
0128
0129 pmu_a57 {
0130 compatible = "arm,cortex-a57-pmu";
0131 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0132 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0133 interrupt-affinity = <&a57_0>, <&a57_1>;
0134 };
0135
0136 psci {
0137 compatible = "arm,psci-1.0", "arm,psci-0.2";
0138 method = "smc";
0139 };
0140
0141 /* External SCIF clock - to be overridden by boards that provide it */
0142 scif_clk: scif {
0143 compatible = "fixed-clock";
0144 #clock-cells = <0>;
0145 clock-frequency = <0>;
0146 };
0147
0148 soc {
0149 compatible = "simple-bus";
0150 interrupt-parent = <&gic>;
0151 #address-cells = <2>;
0152 #size-cells = <2>;
0153 ranges;
0154
0155 rwdt: watchdog@e6020000 {
0156 compatible = "renesas,r8a774b1-wdt",
0157 "renesas,rcar-gen3-wdt";
0158 reg = <0 0xe6020000 0 0x0c>;
0159 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
0160 clocks = <&cpg CPG_MOD 402>;
0161 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0162 resets = <&cpg 402>;
0163 status = "disabled";
0164 };
0165
0166 gpio0: gpio@e6050000 {
0167 compatible = "renesas,gpio-r8a774b1",
0168 "renesas,rcar-gen3-gpio";
0169 reg = <0 0xe6050000 0 0x50>;
0170 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0171 #gpio-cells = <2>;
0172 gpio-controller;
0173 gpio-ranges = <&pfc 0 0 16>;
0174 #interrupt-cells = <2>;
0175 interrupt-controller;
0176 clocks = <&cpg CPG_MOD 912>;
0177 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0178 resets = <&cpg 912>;
0179 };
0180
0181 gpio1: gpio@e6051000 {
0182 compatible = "renesas,gpio-r8a774b1",
0183 "renesas,rcar-gen3-gpio";
0184 reg = <0 0xe6051000 0 0x50>;
0185 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0186 #gpio-cells = <2>;
0187 gpio-controller;
0188 gpio-ranges = <&pfc 0 32 29>;
0189 #interrupt-cells = <2>;
0190 interrupt-controller;
0191 clocks = <&cpg CPG_MOD 911>;
0192 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0193 resets = <&cpg 911>;
0194 };
0195
0196 gpio2: gpio@e6052000 {
0197 compatible = "renesas,gpio-r8a774b1",
0198 "renesas,rcar-gen3-gpio";
0199 reg = <0 0xe6052000 0 0x50>;
0200 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
0201 #gpio-cells = <2>;
0202 gpio-controller;
0203 gpio-ranges = <&pfc 0 64 15>;
0204 #interrupt-cells = <2>;
0205 interrupt-controller;
0206 clocks = <&cpg CPG_MOD 910>;
0207 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0208 resets = <&cpg 910>;
0209 };
0210
0211 gpio3: gpio@e6053000 {
0212 compatible = "renesas,gpio-r8a774b1",
0213 "renesas,rcar-gen3-gpio";
0214 reg = <0 0xe6053000 0 0x50>;
0215 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0216 #gpio-cells = <2>;
0217 gpio-controller;
0218 gpio-ranges = <&pfc 0 96 16>;
0219 #interrupt-cells = <2>;
0220 interrupt-controller;
0221 clocks = <&cpg CPG_MOD 909>;
0222 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0223 resets = <&cpg 909>;
0224 };
0225
0226 gpio4: gpio@e6054000 {
0227 compatible = "renesas,gpio-r8a774b1",
0228 "renesas,rcar-gen3-gpio";
0229 reg = <0 0xe6054000 0 0x50>;
0230 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0231 #gpio-cells = <2>;
0232 gpio-controller;
0233 gpio-ranges = <&pfc 0 128 18>;
0234 #interrupt-cells = <2>;
0235 interrupt-controller;
0236 clocks = <&cpg CPG_MOD 908>;
0237 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0238 resets = <&cpg 908>;
0239 };
0240
0241 gpio5: gpio@e6055000 {
0242 compatible = "renesas,gpio-r8a774b1",
0243 "renesas,rcar-gen3-gpio";
0244 reg = <0 0xe6055000 0 0x50>;
0245 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0246 #gpio-cells = <2>;
0247 gpio-controller;
0248 gpio-ranges = <&pfc 0 160 26>;
0249 #interrupt-cells = <2>;
0250 interrupt-controller;
0251 clocks = <&cpg CPG_MOD 907>;
0252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0253 resets = <&cpg 907>;
0254 };
0255
0256 gpio6: gpio@e6055400 {
0257 compatible = "renesas,gpio-r8a774b1",
0258 "renesas,rcar-gen3-gpio";
0259 reg = <0 0xe6055400 0 0x50>;
0260 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
0261 #gpio-cells = <2>;
0262 gpio-controller;
0263 gpio-ranges = <&pfc 0 192 32>;
0264 #interrupt-cells = <2>;
0265 interrupt-controller;
0266 clocks = <&cpg CPG_MOD 906>;
0267 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0268 resets = <&cpg 906>;
0269 };
0270
0271 gpio7: gpio@e6055800 {
0272 compatible = "renesas,gpio-r8a774b1",
0273 "renesas,rcar-gen3-gpio";
0274 reg = <0 0xe6055800 0 0x50>;
0275 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0276 #gpio-cells = <2>;
0277 gpio-controller;
0278 gpio-ranges = <&pfc 0 224 4>;
0279 #interrupt-cells = <2>;
0280 interrupt-controller;
0281 clocks = <&cpg CPG_MOD 905>;
0282 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0283 resets = <&cpg 905>;
0284 };
0285
0286 pfc: pinctrl@e6060000 {
0287 compatible = "renesas,pfc-r8a774b1";
0288 reg = <0 0xe6060000 0 0x50c>;
0289 };
0290
0291 cmt0: timer@e60f0000 {
0292 compatible = "renesas,r8a774b1-cmt0",
0293 "renesas,rcar-gen3-cmt0";
0294 reg = <0 0xe60f0000 0 0x1004>;
0295 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0296 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0297 clocks = <&cpg CPG_MOD 303>;
0298 clock-names = "fck";
0299 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0300 resets = <&cpg 303>;
0301 status = "disabled";
0302 };
0303
0304 cmt1: timer@e6130000 {
0305 compatible = "renesas,r8a774b1-cmt1",
0306 "renesas,rcar-gen3-cmt1";
0307 reg = <0 0xe6130000 0 0x1004>;
0308 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
0309 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
0310 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
0311 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
0312 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
0313 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0314 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0315 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
0316 clocks = <&cpg CPG_MOD 302>;
0317 clock-names = "fck";
0318 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0319 resets = <&cpg 302>;
0320 status = "disabled";
0321 };
0322
0323 cmt2: timer@e6140000 {
0324 compatible = "renesas,r8a774b1-cmt1",
0325 "renesas,rcar-gen3-cmt1";
0326 reg = <0 0xe6140000 0 0x1004>;
0327 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
0328 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
0329 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
0330 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
0331 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
0332 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
0333 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
0334 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
0335 clocks = <&cpg CPG_MOD 301>;
0336 clock-names = "fck";
0337 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0338 resets = <&cpg 301>;
0339 status = "disabled";
0340 };
0341
0342 cmt3: timer@e6148000 {
0343 compatible = "renesas,r8a774b1-cmt1",
0344 "renesas,rcar-gen3-cmt1";
0345 reg = <0 0xe6148000 0 0x1004>;
0346 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
0347 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
0348 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
0349 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
0350 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
0351 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
0352 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
0353 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
0354 clocks = <&cpg CPG_MOD 300>;
0355 clock-names = "fck";
0356 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0357 resets = <&cpg 300>;
0358 status = "disabled";
0359 };
0360
0361 cpg: clock-controller@e6150000 {
0362 compatible = "renesas,r8a774b1-cpg-mssr";
0363 reg = <0 0xe6150000 0 0x1000>;
0364 clocks = <&extal_clk>, <&extalr_clk>;
0365 clock-names = "extal", "extalr";
0366 #clock-cells = <2>;
0367 #power-domain-cells = <0>;
0368 #reset-cells = <1>;
0369 };
0370
0371 rst: reset-controller@e6160000 {
0372 compatible = "renesas,r8a774b1-rst";
0373 reg = <0 0xe6160000 0 0x0200>;
0374 };
0375
0376 sysc: system-controller@e6180000 {
0377 compatible = "renesas,r8a774b1-sysc";
0378 reg = <0 0xe6180000 0 0x0400>;
0379 #power-domain-cells = <1>;
0380 };
0381
0382 tsc: thermal@e6198000 {
0383 compatible = "renesas,r8a774b1-thermal";
0384 reg = <0 0xe6198000 0 0x100>,
0385 <0 0xe61a0000 0 0x100>,
0386 <0 0xe61a8000 0 0x100>;
0387 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0388 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0389 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
0390 clocks = <&cpg CPG_MOD 522>;
0391 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0392 resets = <&cpg 522>;
0393 #thermal-sensor-cells = <1>;
0394 };
0395
0396 intc_ex: interrupt-controller@e61c0000 {
0397 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc";
0398 #interrupt-cells = <2>;
0399 interrupt-controller;
0400 reg = <0 0xe61c0000 0 0x200>;
0401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0402 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0403 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0404 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0405 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0406 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
0407 clocks = <&cpg CPG_MOD 407>;
0408 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0409 resets = <&cpg 407>;
0410 };
0411
0412 tmu0: timer@e61e0000 {
0413 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
0414 reg = <0 0xe61e0000 0 0x30>;
0415 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0416 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0417 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
0418 clocks = <&cpg CPG_MOD 125>;
0419 clock-names = "fck";
0420 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0421 resets = <&cpg 125>;
0422 status = "disabled";
0423 };
0424
0425 tmu1: timer@e6fc0000 {
0426 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
0427 reg = <0 0xe6fc0000 0 0x30>;
0428 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0429 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0430 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0431 clocks = <&cpg CPG_MOD 124>;
0432 clock-names = "fck";
0433 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0434 resets = <&cpg 124>;
0435 status = "disabled";
0436 };
0437
0438 tmu2: timer@e6fd0000 {
0439 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
0440 reg = <0 0xe6fd0000 0 0x30>;
0441 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
0442 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
0443 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
0444 clocks = <&cpg CPG_MOD 123>;
0445 clock-names = "fck";
0446 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0447 resets = <&cpg 123>;
0448 status = "disabled";
0449 };
0450
0451 tmu3: timer@e6fe0000 {
0452 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
0453 reg = <0 0xe6fe0000 0 0x30>;
0454 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0455 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0456 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
0457 clocks = <&cpg CPG_MOD 122>;
0458 clock-names = "fck";
0459 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0460 resets = <&cpg 122>;
0461 status = "disabled";
0462 };
0463
0464 tmu4: timer@ffc00000 {
0465 compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
0466 reg = <0 0xffc00000 0 0x30>;
0467 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
0468 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
0469 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
0470 clocks = <&cpg CPG_MOD 121>;
0471 clock-names = "fck";
0472 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0473 resets = <&cpg 121>;
0474 status = "disabled";
0475 };
0476
0477 i2c0: i2c@e6500000 {
0478 #address-cells = <1>;
0479 #size-cells = <0>;
0480 compatible = "renesas,i2c-r8a774b1",
0481 "renesas,rcar-gen3-i2c";
0482 reg = <0 0xe6500000 0 0x40>;
0483 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0484 clocks = <&cpg CPG_MOD 931>;
0485 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0486 resets = <&cpg 931>;
0487 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
0488 <&dmac2 0x91>, <&dmac2 0x90>;
0489 dma-names = "tx", "rx", "tx", "rx";
0490 i2c-scl-internal-delay-ns = <110>;
0491 status = "disabled";
0492 };
0493
0494 i2c1: i2c@e6508000 {
0495 #address-cells = <1>;
0496 #size-cells = <0>;
0497 compatible = "renesas,i2c-r8a774b1",
0498 "renesas,rcar-gen3-i2c";
0499 reg = <0 0xe6508000 0 0x40>;
0500 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
0501 clocks = <&cpg CPG_MOD 930>;
0502 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0503 resets = <&cpg 930>;
0504 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
0505 <&dmac2 0x93>, <&dmac2 0x92>;
0506 dma-names = "tx", "rx", "tx", "rx";
0507 i2c-scl-internal-delay-ns = <6>;
0508 status = "disabled";
0509 };
0510
0511 i2c2: i2c@e6510000 {
0512 #address-cells = <1>;
0513 #size-cells = <0>;
0514 compatible = "renesas,i2c-r8a774b1",
0515 "renesas,rcar-gen3-i2c";
0516 reg = <0 0xe6510000 0 0x40>;
0517 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
0518 clocks = <&cpg CPG_MOD 929>;
0519 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0520 resets = <&cpg 929>;
0521 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
0522 <&dmac2 0x95>, <&dmac2 0x94>;
0523 dma-names = "tx", "rx", "tx", "rx";
0524 i2c-scl-internal-delay-ns = <6>;
0525 status = "disabled";
0526 };
0527
0528 i2c3: i2c@e66d0000 {
0529 #address-cells = <1>;
0530 #size-cells = <0>;
0531 compatible = "renesas,i2c-r8a774b1",
0532 "renesas,rcar-gen3-i2c";
0533 reg = <0 0xe66d0000 0 0x40>;
0534 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
0535 clocks = <&cpg CPG_MOD 928>;
0536 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0537 resets = <&cpg 928>;
0538 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
0539 dma-names = "tx", "rx";
0540 i2c-scl-internal-delay-ns = <110>;
0541 status = "disabled";
0542 };
0543
0544 i2c4: i2c@e66d8000 {
0545 #address-cells = <1>;
0546 #size-cells = <0>;
0547 compatible = "renesas,i2c-r8a774b1",
0548 "renesas,rcar-gen3-i2c";
0549 reg = <0 0xe66d8000 0 0x40>;
0550 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
0551 clocks = <&cpg CPG_MOD 927>;
0552 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0553 resets = <&cpg 927>;
0554 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
0555 dma-names = "tx", "rx";
0556 i2c-scl-internal-delay-ns = <110>;
0557 status = "disabled";
0558 };
0559
0560 i2c5: i2c@e66e0000 {
0561 #address-cells = <1>;
0562 #size-cells = <0>;
0563 compatible = "renesas,i2c-r8a774b1",
0564 "renesas,rcar-gen3-i2c";
0565 reg = <0 0xe66e0000 0 0x40>;
0566 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
0567 clocks = <&cpg CPG_MOD 919>;
0568 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0569 resets = <&cpg 919>;
0570 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
0571 dma-names = "tx", "rx";
0572 i2c-scl-internal-delay-ns = <110>;
0573 status = "disabled";
0574 };
0575
0576 i2c6: i2c@e66e8000 {
0577 #address-cells = <1>;
0578 #size-cells = <0>;
0579 compatible = "renesas,i2c-r8a774b1",
0580 "renesas,rcar-gen3-i2c";
0581 reg = <0 0xe66e8000 0 0x40>;
0582 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
0583 clocks = <&cpg CPG_MOD 918>;
0584 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0585 resets = <&cpg 918>;
0586 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
0587 dma-names = "tx", "rx";
0588 i2c-scl-internal-delay-ns = <6>;
0589 status = "disabled";
0590 };
0591
0592 iic_pmic: i2c@e60b0000 {
0593 #address-cells = <1>;
0594 #size-cells = <0>;
0595 compatible = "renesas,iic-r8a774b1",
0596 "renesas,rcar-gen3-iic",
0597 "renesas,rmobile-iic";
0598 reg = <0 0xe60b0000 0 0x425>;
0599 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
0600 clocks = <&cpg CPG_MOD 926>;
0601 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0602 resets = <&cpg 926>;
0603 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
0604 dma-names = "tx", "rx";
0605 status = "disabled";
0606 };
0607
0608 hscif0: serial@e6540000 {
0609 compatible = "renesas,hscif-r8a774b1",
0610 "renesas,rcar-gen3-hscif",
0611 "renesas,hscif";
0612 reg = <0 0xe6540000 0 0x60>;
0613 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
0614 clocks = <&cpg CPG_MOD 520>,
0615 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
0616 <&scif_clk>;
0617 clock-names = "fck", "brg_int", "scif_clk";
0618 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
0619 <&dmac2 0x31>, <&dmac2 0x30>;
0620 dma-names = "tx", "rx", "tx", "rx";
0621 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0622 resets = <&cpg 520>;
0623 status = "disabled";
0624 };
0625
0626 hscif1: serial@e6550000 {
0627 compatible = "renesas,hscif-r8a774b1",
0628 "renesas,rcar-gen3-hscif",
0629 "renesas,hscif";
0630 reg = <0 0xe6550000 0 0x60>;
0631 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0632 clocks = <&cpg CPG_MOD 519>,
0633 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
0634 <&scif_clk>;
0635 clock-names = "fck", "brg_int", "scif_clk";
0636 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
0637 <&dmac2 0x33>, <&dmac2 0x32>;
0638 dma-names = "tx", "rx", "tx", "rx";
0639 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0640 resets = <&cpg 519>;
0641 status = "disabled";
0642 };
0643
0644 hscif2: serial@e6560000 {
0645 compatible = "renesas,hscif-r8a774b1",
0646 "renesas,rcar-gen3-hscif",
0647 "renesas,hscif";
0648 reg = <0 0xe6560000 0 0x60>;
0649 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
0650 clocks = <&cpg CPG_MOD 518>,
0651 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
0652 <&scif_clk>;
0653 clock-names = "fck", "brg_int", "scif_clk";
0654 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
0655 <&dmac2 0x35>, <&dmac2 0x34>;
0656 dma-names = "tx", "rx", "tx", "rx";
0657 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0658 resets = <&cpg 518>;
0659 status = "disabled";
0660 };
0661
0662 hscif3: serial@e66a0000 {
0663 compatible = "renesas,hscif-r8a774b1",
0664 "renesas,rcar-gen3-hscif",
0665 "renesas,hscif";
0666 reg = <0 0xe66a0000 0 0x60>;
0667 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0668 clocks = <&cpg CPG_MOD 517>,
0669 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
0670 <&scif_clk>;
0671 clock-names = "fck", "brg_int", "scif_clk";
0672 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
0673 dma-names = "tx", "rx";
0674 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0675 resets = <&cpg 517>;
0676 status = "disabled";
0677 };
0678
0679 hscif4: serial@e66b0000 {
0680 compatible = "renesas,hscif-r8a774b1",
0681 "renesas,rcar-gen3-hscif",
0682 "renesas,hscif";
0683 reg = <0 0xe66b0000 0 0x60>;
0684 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0685 clocks = <&cpg CPG_MOD 516>,
0686 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
0687 <&scif_clk>;
0688 clock-names = "fck", "brg_int", "scif_clk";
0689 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
0690 dma-names = "tx", "rx";
0691 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0692 resets = <&cpg 516>;
0693 status = "disabled";
0694 };
0695
0696 hsusb: usb@e6590000 {
0697 compatible = "renesas,usbhs-r8a774b1",
0698 "renesas,rcar-gen3-usbhs";
0699 reg = <0 0xe6590000 0 0x200>;
0700 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0701 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
0702 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
0703 <&usb_dmac1 0>, <&usb_dmac1 1>;
0704 dma-names = "ch0", "ch1", "ch2", "ch3";
0705 renesas,buswait = <11>;
0706 phys = <&usb2_phy0 3>;
0707 phy-names = "usb";
0708 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0709 resets = <&cpg 704>, <&cpg 703>;
0710 status = "disabled";
0711 };
0712
0713 usb2_clksel: clock-controller@e6590630 {
0714 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel",
0715 "renesas,rcar-gen3-usb2-clock-sel";
0716 reg = <0 0xe6590630 0 0x02>;
0717 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
0718 <&usb_extal_clk>, <&usb3s0_clk>;
0719 clock-names = "ehci_ohci", "hs-usb-if",
0720 "usb_extal", "usb_xtal";
0721 #clock-cells = <0>;
0722 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0723 resets = <&cpg 703>, <&cpg 704>;
0724 reset-names = "ehci_ohci", "hs-usb-if";
0725 status = "disabled";
0726 };
0727
0728 usb_dmac0: dma-controller@e65a0000 {
0729 compatible = "renesas,r8a774b1-usb-dmac",
0730 "renesas,usb-dmac";
0731 reg = <0 0xe65a0000 0 0x100>;
0732 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
0733 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
0734 interrupt-names = "ch0", "ch1";
0735 clocks = <&cpg CPG_MOD 330>;
0736 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0737 resets = <&cpg 330>;
0738 #dma-cells = <1>;
0739 dma-channels = <2>;
0740 };
0741
0742 usb_dmac1: dma-controller@e65b0000 {
0743 compatible = "renesas,r8a774b1-usb-dmac",
0744 "renesas,usb-dmac";
0745 reg = <0 0xe65b0000 0 0x100>;
0746 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
0747 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
0748 interrupt-names = "ch0", "ch1";
0749 clocks = <&cpg CPG_MOD 331>;
0750 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0751 resets = <&cpg 331>;
0752 #dma-cells = <1>;
0753 dma-channels = <2>;
0754 };
0755
0756 usb3_phy0: usb-phy@e65ee000 {
0757 compatible = "renesas,r8a774b1-usb3-phy",
0758 "renesas,rcar-gen3-usb3-phy";
0759 reg = <0 0xe65ee000 0 0x90>;
0760 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
0761 <&usb_extal_clk>;
0762 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
0763 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0764 resets = <&cpg 328>;
0765 #phy-cells = <0>;
0766 status = "disabled";
0767 };
0768
0769 dmac0: dma-controller@e6700000 {
0770 compatible = "renesas,dmac-r8a774b1",
0771 "renesas,rcar-dmac";
0772 reg = <0 0xe6700000 0 0x10000>;
0773 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
0774 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
0775 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
0776 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
0777 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
0778 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
0779 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
0780 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
0781 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
0782 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
0783 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
0784 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
0785 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
0786 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
0787 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
0788 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
0789 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0790 interrupt-names = "error",
0791 "ch0", "ch1", "ch2", "ch3",
0792 "ch4", "ch5", "ch6", "ch7",
0793 "ch8", "ch9", "ch10", "ch11",
0794 "ch12", "ch13", "ch14", "ch15";
0795 clocks = <&cpg CPG_MOD 219>;
0796 clock-names = "fck";
0797 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0798 resets = <&cpg 219>;
0799 #dma-cells = <1>;
0800 dma-channels = <16>;
0801 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
0802 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
0803 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
0804 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
0805 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
0806 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
0807 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
0808 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
0809 };
0810
0811 dmac1: dma-controller@e7300000 {
0812 compatible = "renesas,dmac-r8a774b1",
0813 "renesas,rcar-dmac";
0814 reg = <0 0xe7300000 0 0x10000>;
0815 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
0816 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
0817 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
0818 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
0819 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
0820 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
0821 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
0822 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
0823 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
0824 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
0825 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
0826 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
0827 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
0828 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
0829 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
0830 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
0831 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
0832 interrupt-names = "error",
0833 "ch0", "ch1", "ch2", "ch3",
0834 "ch4", "ch5", "ch6", "ch7",
0835 "ch8", "ch9", "ch10", "ch11",
0836 "ch12", "ch13", "ch14", "ch15";
0837 clocks = <&cpg CPG_MOD 218>;
0838 clock-names = "fck";
0839 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0840 resets = <&cpg 218>;
0841 #dma-cells = <1>;
0842 dma-channels = <16>;
0843 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
0844 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
0845 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
0846 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
0847 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
0848 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
0849 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
0850 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
0851 };
0852
0853 dmac2: dma-controller@e7310000 {
0854 compatible = "renesas,dmac-r8a774b1",
0855 "renesas,rcar-dmac";
0856 reg = <0 0xe7310000 0 0x10000>;
0857 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
0858 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
0859 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
0860 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
0861 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
0862 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
0863 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
0864 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
0865 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
0866 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
0867 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
0868 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
0869 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
0870 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
0871 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
0872 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
0873 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
0874 interrupt-names = "error",
0875 "ch0", "ch1", "ch2", "ch3",
0876 "ch4", "ch5", "ch6", "ch7",
0877 "ch8", "ch9", "ch10", "ch11",
0878 "ch12", "ch13", "ch14", "ch15";
0879 clocks = <&cpg CPG_MOD 217>;
0880 clock-names = "fck";
0881 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0882 resets = <&cpg 217>;
0883 #dma-cells = <1>;
0884 dma-channels = <16>;
0885 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
0886 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
0887 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
0888 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
0889 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
0890 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
0891 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
0892 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
0893 };
0894
0895 ipmmu_ds0: iommu@e6740000 {
0896 compatible = "renesas,ipmmu-r8a774b1";
0897 reg = <0 0xe6740000 0 0x1000>;
0898 renesas,ipmmu-main = <&ipmmu_mm 0>;
0899 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0900 #iommu-cells = <1>;
0901 };
0902
0903 ipmmu_ds1: iommu@e7740000 {
0904 compatible = "renesas,ipmmu-r8a774b1";
0905 reg = <0 0xe7740000 0 0x1000>;
0906 renesas,ipmmu-main = <&ipmmu_mm 1>;
0907 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0908 #iommu-cells = <1>;
0909 };
0910
0911 ipmmu_hc: iommu@e6570000 {
0912 compatible = "renesas,ipmmu-r8a774b1";
0913 reg = <0 0xe6570000 0 0x1000>;
0914 renesas,ipmmu-main = <&ipmmu_mm 2>;
0915 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0916 #iommu-cells = <1>;
0917 };
0918
0919 ipmmu_mm: iommu@e67b0000 {
0920 compatible = "renesas,ipmmu-r8a774b1";
0921 reg = <0 0xe67b0000 0 0x1000>;
0922 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
0923 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
0924 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0925 #iommu-cells = <1>;
0926 };
0927
0928 ipmmu_mp: iommu@ec670000 {
0929 compatible = "renesas,ipmmu-r8a774b1";
0930 reg = <0 0xec670000 0 0x1000>;
0931 renesas,ipmmu-main = <&ipmmu_mm 4>;
0932 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0933 #iommu-cells = <1>;
0934 };
0935
0936 ipmmu_pv0: iommu@fd800000 {
0937 compatible = "renesas,ipmmu-r8a774b1";
0938 reg = <0 0xfd800000 0 0x1000>;
0939 renesas,ipmmu-main = <&ipmmu_mm 6>;
0940 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0941 #iommu-cells = <1>;
0942 };
0943
0944 ipmmu_vc0: iommu@fe6b0000 {
0945 compatible = "renesas,ipmmu-r8a774b1";
0946 reg = <0 0xfe6b0000 0 0x1000>;
0947 renesas,ipmmu-main = <&ipmmu_mm 12>;
0948 power-domains = <&sysc R8A774B1_PD_A3VC>;
0949 #iommu-cells = <1>;
0950 };
0951
0952 ipmmu_vi0: iommu@febd0000 {
0953 compatible = "renesas,ipmmu-r8a774b1";
0954 reg = <0 0xfebd0000 0 0x1000>;
0955 renesas,ipmmu-main = <&ipmmu_mm 14>;
0956 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
0957 #iommu-cells = <1>;
0958 };
0959
0960 ipmmu_vp0: iommu@fe990000 {
0961 compatible = "renesas,ipmmu-r8a774b1";
0962 reg = <0 0xfe990000 0 0x1000>;
0963 renesas,ipmmu-main = <&ipmmu_mm 16>;
0964 power-domains = <&sysc R8A774B1_PD_A3VP>;
0965 #iommu-cells = <1>;
0966 };
0967
0968 avb: ethernet@e6800000 {
0969 compatible = "renesas,etheravb-r8a774b1",
0970 "renesas,etheravb-rcar-gen3";
0971 reg = <0 0xe6800000 0 0x800>;
0972 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0973 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0974 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0975 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
0976 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0977 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
0978 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
0979 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
0980 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0981 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0982 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0983 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0984 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0985 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0986 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0987 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0988 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0989 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0990 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0991 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0992 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
0993 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
0994 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
0995 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
0996 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0997 interrupt-names = "ch0", "ch1", "ch2", "ch3",
0998 "ch4", "ch5", "ch6", "ch7",
0999 "ch8", "ch9", "ch10", "ch11",
1000 "ch12", "ch13", "ch14", "ch15",
1001 "ch16", "ch17", "ch18", "ch19",
1002 "ch20", "ch21", "ch22", "ch23",
1003 "ch24";
1004 clocks = <&cpg CPG_MOD 812>;
1005 clock-names = "fck";
1006 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1007 resets = <&cpg 812>;
1008 phy-mode = "rgmii";
1009 rx-internal-delay-ps = <0>;
1010 tx-internal-delay-ps = <0>;
1011 iommus = <&ipmmu_ds0 16>;
1012 #address-cells = <1>;
1013 #size-cells = <0>;
1014 status = "disabled";
1015 };
1016
1017 can0: can@e6c30000 {
1018 compatible = "renesas,can-r8a774b1",
1019 "renesas,rcar-gen3-can";
1020 reg = <0 0xe6c30000 0 0x1000>;
1021 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&cpg CPG_MOD 916>,
1023 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1024 <&can_clk>;
1025 clock-names = "clkp1", "clkp2", "can_clk";
1026 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1027 assigned-clock-rates = <40000000>;
1028 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1029 resets = <&cpg 916>;
1030 status = "disabled";
1031 };
1032
1033 can1: can@e6c38000 {
1034 compatible = "renesas,can-r8a774b1",
1035 "renesas,rcar-gen3-can";
1036 reg = <0 0xe6c38000 0 0x1000>;
1037 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1038 clocks = <&cpg CPG_MOD 915>,
1039 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1040 <&can_clk>;
1041 clock-names = "clkp1", "clkp2", "can_clk";
1042 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1043 assigned-clock-rates = <40000000>;
1044 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1045 resets = <&cpg 915>;
1046 status = "disabled";
1047 };
1048
1049 canfd: can@e66c0000 {
1050 compatible = "renesas,r8a774b1-canfd",
1051 "renesas,rcar-gen3-canfd";
1052 reg = <0 0xe66c0000 0 0x8000>;
1053 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1054 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1055 interrupt-names = "ch_int", "g_int";
1056 clocks = <&cpg CPG_MOD 914>,
1057 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1058 <&can_clk>;
1059 clock-names = "fck", "canfd", "can_clk";
1060 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1061 assigned-clock-rates = <40000000>;
1062 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1063 resets = <&cpg 914>;
1064 status = "disabled";
1065
1066 channel0 {
1067 status = "disabled";
1068 };
1069
1070 channel1 {
1071 status = "disabled";
1072 };
1073 };
1074
1075 pwm0: pwm@e6e30000 {
1076 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1077 reg = <0 0xe6e30000 0 0x8>;
1078 #pwm-cells = <2>;
1079 clocks = <&cpg CPG_MOD 523>;
1080 resets = <&cpg 523>;
1081 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1082 status = "disabled";
1083 };
1084
1085 pwm1: pwm@e6e31000 {
1086 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1087 reg = <0 0xe6e31000 0 0x8>;
1088 #pwm-cells = <2>;
1089 clocks = <&cpg CPG_MOD 523>;
1090 resets = <&cpg 523>;
1091 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1092 status = "disabled";
1093 };
1094
1095 pwm2: pwm@e6e32000 {
1096 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1097 reg = <0 0xe6e32000 0 0x8>;
1098 #pwm-cells = <2>;
1099 clocks = <&cpg CPG_MOD 523>;
1100 resets = <&cpg 523>;
1101 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1102 status = "disabled";
1103 };
1104
1105 pwm3: pwm@e6e33000 {
1106 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1107 reg = <0 0xe6e33000 0 0x8>;
1108 #pwm-cells = <2>;
1109 clocks = <&cpg CPG_MOD 523>;
1110 resets = <&cpg 523>;
1111 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1112 status = "disabled";
1113 };
1114
1115 pwm4: pwm@e6e34000 {
1116 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1117 reg = <0 0xe6e34000 0 0x8>;
1118 #pwm-cells = <2>;
1119 clocks = <&cpg CPG_MOD 523>;
1120 resets = <&cpg 523>;
1121 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1122 status = "disabled";
1123 };
1124
1125 pwm5: pwm@e6e35000 {
1126 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1127 reg = <0 0xe6e35000 0 0x8>;
1128 #pwm-cells = <2>;
1129 clocks = <&cpg CPG_MOD 523>;
1130 resets = <&cpg 523>;
1131 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1132 status = "disabled";
1133 };
1134
1135 pwm6: pwm@e6e36000 {
1136 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1137 reg = <0 0xe6e36000 0 0x8>;
1138 #pwm-cells = <2>;
1139 clocks = <&cpg CPG_MOD 523>;
1140 resets = <&cpg 523>;
1141 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1142 status = "disabled";
1143 };
1144
1145 scif0: serial@e6e60000 {
1146 compatible = "renesas,scif-r8a774b1",
1147 "renesas,rcar-gen3-scif", "renesas,scif";
1148 reg = <0 0xe6e60000 0 0x40>;
1149 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1150 clocks = <&cpg CPG_MOD 207>,
1151 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1152 <&scif_clk>;
1153 clock-names = "fck", "brg_int", "scif_clk";
1154 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1155 <&dmac2 0x51>, <&dmac2 0x50>;
1156 dma-names = "tx", "rx", "tx", "rx";
1157 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1158 resets = <&cpg 207>;
1159 status = "disabled";
1160 };
1161
1162 scif1: serial@e6e68000 {
1163 compatible = "renesas,scif-r8a774b1",
1164 "renesas,rcar-gen3-scif", "renesas,scif";
1165 reg = <0 0xe6e68000 0 0x40>;
1166 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1167 clocks = <&cpg CPG_MOD 206>,
1168 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1169 <&scif_clk>;
1170 clock-names = "fck", "brg_int", "scif_clk";
1171 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1172 <&dmac2 0x53>, <&dmac2 0x52>;
1173 dma-names = "tx", "rx", "tx", "rx";
1174 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1175 resets = <&cpg 206>;
1176 status = "disabled";
1177 };
1178
1179 scif2: serial@e6e88000 {
1180 compatible = "renesas,scif-r8a774b1",
1181 "renesas,rcar-gen3-scif", "renesas,scif";
1182 reg = <0 0xe6e88000 0 0x40>;
1183 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1184 clocks = <&cpg CPG_MOD 310>,
1185 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1186 <&scif_clk>;
1187 clock-names = "fck", "brg_int", "scif_clk";
1188 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1189 <&dmac2 0x13>, <&dmac2 0x12>;
1190 dma-names = "tx", "rx", "tx", "rx";
1191 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1192 resets = <&cpg 310>;
1193 status = "disabled";
1194 };
1195
1196 scif3: serial@e6c50000 {
1197 compatible = "renesas,scif-r8a774b1",
1198 "renesas,rcar-gen3-scif", "renesas,scif";
1199 reg = <0 0xe6c50000 0 0x40>;
1200 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1201 clocks = <&cpg CPG_MOD 204>,
1202 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1203 <&scif_clk>;
1204 clock-names = "fck", "brg_int", "scif_clk";
1205 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1206 dma-names = "tx", "rx";
1207 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1208 resets = <&cpg 204>;
1209 status = "disabled";
1210 };
1211
1212 scif4: serial@e6c40000 {
1213 compatible = "renesas,scif-r8a774b1",
1214 "renesas,rcar-gen3-scif", "renesas,scif";
1215 reg = <0 0xe6c40000 0 0x40>;
1216 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1217 clocks = <&cpg CPG_MOD 203>,
1218 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1219 <&scif_clk>;
1220 clock-names = "fck", "brg_int", "scif_clk";
1221 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1222 dma-names = "tx", "rx";
1223 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1224 resets = <&cpg 203>;
1225 status = "disabled";
1226 };
1227
1228 scif5: serial@e6f30000 {
1229 compatible = "renesas,scif-r8a774b1",
1230 "renesas,rcar-gen3-scif", "renesas,scif";
1231 reg = <0 0xe6f30000 0 0x40>;
1232 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1233 clocks = <&cpg CPG_MOD 202>,
1234 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1235 <&scif_clk>;
1236 clock-names = "fck", "brg_int", "scif_clk";
1237 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1238 <&dmac2 0x5b>, <&dmac2 0x5a>;
1239 dma-names = "tx", "rx", "tx", "rx";
1240 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1241 resets = <&cpg 202>;
1242 status = "disabled";
1243 };
1244
1245 msiof0: spi@e6e90000 {
1246 compatible = "renesas,msiof-r8a774b1",
1247 "renesas,rcar-gen3-msiof";
1248 reg = <0 0xe6e90000 0 0x0064>;
1249 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 211>;
1251 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1252 <&dmac2 0x41>, <&dmac2 0x40>;
1253 dma-names = "tx", "rx", "tx", "rx";
1254 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1255 resets = <&cpg 211>;
1256 #address-cells = <1>;
1257 #size-cells = <0>;
1258 status = "disabled";
1259 };
1260
1261 msiof1: spi@e6ea0000 {
1262 compatible = "renesas,msiof-r8a774b1",
1263 "renesas,rcar-gen3-msiof";
1264 reg = <0 0xe6ea0000 0 0x0064>;
1265 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1266 clocks = <&cpg CPG_MOD 210>;
1267 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1268 <&dmac2 0x43>, <&dmac2 0x42>;
1269 dma-names = "tx", "rx", "tx", "rx";
1270 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1271 resets = <&cpg 210>;
1272 #address-cells = <1>;
1273 #size-cells = <0>;
1274 status = "disabled";
1275 };
1276
1277 msiof2: spi@e6c00000 {
1278 compatible = "renesas,msiof-r8a774b1",
1279 "renesas,rcar-gen3-msiof";
1280 reg = <0 0xe6c00000 0 0x0064>;
1281 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1282 clocks = <&cpg CPG_MOD 209>;
1283 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1284 dma-names = "tx", "rx";
1285 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1286 resets = <&cpg 209>;
1287 #address-cells = <1>;
1288 #size-cells = <0>;
1289 status = "disabled";
1290 };
1291
1292 msiof3: spi@e6c10000 {
1293 compatible = "renesas,msiof-r8a774b1",
1294 "renesas,rcar-gen3-msiof";
1295 reg = <0 0xe6c10000 0 0x0064>;
1296 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1297 clocks = <&cpg CPG_MOD 208>;
1298 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1299 dma-names = "tx", "rx";
1300 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1301 resets = <&cpg 208>;
1302 #address-cells = <1>;
1303 #size-cells = <0>;
1304 status = "disabled";
1305 };
1306
1307 vin0: video@e6ef0000 {
1308 compatible = "renesas,vin-r8a774b1";
1309 reg = <0 0xe6ef0000 0 0x1000>;
1310 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1311 clocks = <&cpg CPG_MOD 811>;
1312 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1313 resets = <&cpg 811>;
1314 renesas,id = <0>;
1315 status = "disabled";
1316
1317 ports {
1318 #address-cells = <1>;
1319 #size-cells = <0>;
1320
1321 port@1 {
1322 #address-cells = <1>;
1323 #size-cells = <0>;
1324
1325 reg = <1>;
1326
1327 vin0csi20: endpoint@0 {
1328 reg = <0>;
1329 remote-endpoint = <&csi20vin0>;
1330 };
1331 vin0csi40: endpoint@2 {
1332 reg = <2>;
1333 remote-endpoint = <&csi40vin0>;
1334 };
1335 };
1336 };
1337 };
1338
1339 vin1: video@e6ef1000 {
1340 compatible = "renesas,vin-r8a774b1";
1341 reg = <0 0xe6ef1000 0 0x1000>;
1342 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1343 clocks = <&cpg CPG_MOD 810>;
1344 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1345 resets = <&cpg 810>;
1346 renesas,id = <1>;
1347 status = "disabled";
1348
1349 ports {
1350 #address-cells = <1>;
1351 #size-cells = <0>;
1352
1353 port@1 {
1354 #address-cells = <1>;
1355 #size-cells = <0>;
1356
1357 reg = <1>;
1358
1359 vin1csi20: endpoint@0 {
1360 reg = <0>;
1361 remote-endpoint = <&csi20vin1>;
1362 };
1363 vin1csi40: endpoint@2 {
1364 reg = <2>;
1365 remote-endpoint = <&csi40vin1>;
1366 };
1367 };
1368 };
1369 };
1370
1371 vin2: video@e6ef2000 {
1372 compatible = "renesas,vin-r8a774b1";
1373 reg = <0 0xe6ef2000 0 0x1000>;
1374 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1375 clocks = <&cpg CPG_MOD 809>;
1376 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1377 resets = <&cpg 809>;
1378 renesas,id = <2>;
1379 status = "disabled";
1380
1381 ports {
1382 #address-cells = <1>;
1383 #size-cells = <0>;
1384
1385 port@1 {
1386 #address-cells = <1>;
1387 #size-cells = <0>;
1388
1389 reg = <1>;
1390
1391 vin2csi20: endpoint@0 {
1392 reg = <0>;
1393 remote-endpoint = <&csi20vin2>;
1394 };
1395 vin2csi40: endpoint@2 {
1396 reg = <2>;
1397 remote-endpoint = <&csi40vin2>;
1398 };
1399 };
1400 };
1401 };
1402
1403 vin3: video@e6ef3000 {
1404 compatible = "renesas,vin-r8a774b1";
1405 reg = <0 0xe6ef3000 0 0x1000>;
1406 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1407 clocks = <&cpg CPG_MOD 808>;
1408 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1409 resets = <&cpg 808>;
1410 renesas,id = <3>;
1411 status = "disabled";
1412
1413 ports {
1414 #address-cells = <1>;
1415 #size-cells = <0>;
1416
1417 port@1 {
1418 #address-cells = <1>;
1419 #size-cells = <0>;
1420
1421 reg = <1>;
1422
1423 vin3csi20: endpoint@0 {
1424 reg = <0>;
1425 remote-endpoint = <&csi20vin3>;
1426 };
1427 vin3csi40: endpoint@2 {
1428 reg = <2>;
1429 remote-endpoint = <&csi40vin3>;
1430 };
1431 };
1432 };
1433 };
1434
1435 vin4: video@e6ef4000 {
1436 compatible = "renesas,vin-r8a774b1";
1437 reg = <0 0xe6ef4000 0 0x1000>;
1438 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1439 clocks = <&cpg CPG_MOD 807>;
1440 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1441 resets = <&cpg 807>;
1442 renesas,id = <4>;
1443 status = "disabled";
1444
1445 ports {
1446 #address-cells = <1>;
1447 #size-cells = <0>;
1448
1449 port@1 {
1450 #address-cells = <1>;
1451 #size-cells = <0>;
1452
1453 reg = <1>;
1454
1455 vin4csi20: endpoint@0 {
1456 reg = <0>;
1457 remote-endpoint = <&csi20vin4>;
1458 };
1459 vin4csi40: endpoint@2 {
1460 reg = <2>;
1461 remote-endpoint = <&csi40vin4>;
1462 };
1463 };
1464 };
1465 };
1466
1467 vin5: video@e6ef5000 {
1468 compatible = "renesas,vin-r8a774b1";
1469 reg = <0 0xe6ef5000 0 0x1000>;
1470 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1471 clocks = <&cpg CPG_MOD 806>;
1472 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1473 resets = <&cpg 806>;
1474 renesas,id = <5>;
1475 status = "disabled";
1476
1477 ports {
1478 #address-cells = <1>;
1479 #size-cells = <0>;
1480
1481 port@1 {
1482 #address-cells = <1>;
1483 #size-cells = <0>;
1484
1485 reg = <1>;
1486
1487 vin5csi20: endpoint@0 {
1488 reg = <0>;
1489 remote-endpoint = <&csi20vin5>;
1490 };
1491 vin5csi40: endpoint@2 {
1492 reg = <2>;
1493 remote-endpoint = <&csi40vin5>;
1494 };
1495 };
1496 };
1497 };
1498
1499 vin6: video@e6ef6000 {
1500 compatible = "renesas,vin-r8a774b1";
1501 reg = <0 0xe6ef6000 0 0x1000>;
1502 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1503 clocks = <&cpg CPG_MOD 805>;
1504 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1505 resets = <&cpg 805>;
1506 renesas,id = <6>;
1507 status = "disabled";
1508
1509 ports {
1510 #address-cells = <1>;
1511 #size-cells = <0>;
1512
1513 port@1 {
1514 #address-cells = <1>;
1515 #size-cells = <0>;
1516
1517 reg = <1>;
1518
1519 vin6csi20: endpoint@0 {
1520 reg = <0>;
1521 remote-endpoint = <&csi20vin6>;
1522 };
1523 vin6csi40: endpoint@2 {
1524 reg = <2>;
1525 remote-endpoint = <&csi40vin6>;
1526 };
1527 };
1528 };
1529 };
1530
1531 vin7: video@e6ef7000 {
1532 compatible = "renesas,vin-r8a774b1";
1533 reg = <0 0xe6ef7000 0 0x1000>;
1534 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1535 clocks = <&cpg CPG_MOD 804>;
1536 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1537 resets = <&cpg 804>;
1538 renesas,id = <7>;
1539 status = "disabled";
1540
1541 ports {
1542 #address-cells = <1>;
1543 #size-cells = <0>;
1544
1545 port@1 {
1546 #address-cells = <1>;
1547 #size-cells = <0>;
1548
1549 reg = <1>;
1550
1551 vin7csi20: endpoint@0 {
1552 reg = <0>;
1553 remote-endpoint = <&csi20vin7>;
1554 };
1555 vin7csi40: endpoint@2 {
1556 reg = <2>;
1557 remote-endpoint = <&csi40vin7>;
1558 };
1559 };
1560 };
1561 };
1562
1563 rcar_sound: sound@ec500000 {
1564 /*
1565 * #sound-dai-cells is required
1566 *
1567 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1568 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1569 */
1570 /*
1571 * #clock-cells is required for audio_clkout0/1/2/3
1572 *
1573 * clkout : #clock-cells = <0>; <&rcar_sound>;
1574 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1575 */
1576 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
1577 reg = <0 0xec500000 0 0x1000>, /* SCU */
1578 <0 0xec5a0000 0 0x100>, /* ADG */
1579 <0 0xec540000 0 0x1000>, /* SSIU */
1580 <0 0xec541000 0 0x280>, /* SSI */
1581 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1582 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1583
1584 clocks = <&cpg CPG_MOD 1005>,
1585 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1586 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1587 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1588 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1589 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1590 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1591 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1592 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1593 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1594 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1595 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1596 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1597 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1598 <&audio_clk_a>, <&audio_clk_b>,
1599 <&audio_clk_c>,
1600 <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
1601 clock-names = "ssi-all",
1602 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1603 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1604 "ssi.1", "ssi.0",
1605 "src.9", "src.8", "src.7", "src.6",
1606 "src.5", "src.4", "src.3", "src.2",
1607 "src.1", "src.0",
1608 "mix.1", "mix.0",
1609 "ctu.1", "ctu.0",
1610 "dvc.0", "dvc.1",
1611 "clk_a", "clk_b", "clk_c", "clk_i";
1612 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1613 resets = <&cpg 1005>,
1614 <&cpg 1006>, <&cpg 1007>,
1615 <&cpg 1008>, <&cpg 1009>,
1616 <&cpg 1010>, <&cpg 1011>,
1617 <&cpg 1012>, <&cpg 1013>,
1618 <&cpg 1014>, <&cpg 1015>;
1619 reset-names = "ssi-all",
1620 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1621 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1622 "ssi.1", "ssi.0";
1623 status = "disabled";
1624
1625 rcar_sound,ctu {
1626 ctu00: ctu-0 { };
1627 ctu01: ctu-1 { };
1628 ctu02: ctu-2 { };
1629 ctu03: ctu-3 { };
1630 ctu10: ctu-4 { };
1631 ctu11: ctu-5 { };
1632 ctu12: ctu-6 { };
1633 ctu13: ctu-7 { };
1634 };
1635
1636 rcar_sound,dvc {
1637 dvc0: dvc-0 {
1638 dmas = <&audma1 0xbc>;
1639 dma-names = "tx";
1640 };
1641 dvc1: dvc-1 {
1642 dmas = <&audma1 0xbe>;
1643 dma-names = "tx";
1644 };
1645 };
1646
1647 rcar_sound,mix {
1648 mix0: mix-0 { };
1649 mix1: mix-1 { };
1650 };
1651
1652 rcar_sound,src {
1653 src0: src-0 {
1654 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1655 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1656 dma-names = "rx", "tx";
1657 };
1658 src1: src-1 {
1659 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1660 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1661 dma-names = "rx", "tx";
1662 };
1663 src2: src-2 {
1664 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1665 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1666 dma-names = "rx", "tx";
1667 };
1668 src3: src-3 {
1669 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1670 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1671 dma-names = "rx", "tx";
1672 };
1673 src4: src-4 {
1674 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1675 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1676 dma-names = "rx", "tx";
1677 };
1678 src5: src-5 {
1679 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1680 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1681 dma-names = "rx", "tx";
1682 };
1683 src6: src-6 {
1684 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1685 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1686 dma-names = "rx", "tx";
1687 };
1688 src7: src-7 {
1689 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1690 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1691 dma-names = "rx", "tx";
1692 };
1693 src8: src-8 {
1694 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1695 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1696 dma-names = "rx", "tx";
1697 };
1698 src9: src-9 {
1699 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1700 dmas = <&audma0 0x97>, <&audma1 0xba>;
1701 dma-names = "rx", "tx";
1702 };
1703 };
1704
1705 rcar_sound,ssi {
1706 ssi0: ssi-0 {
1707 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1708 dmas = <&audma0 0x01>, <&audma1 0x02>;
1709 dma-names = "rx", "tx";
1710 };
1711 ssi1: ssi-1 {
1712 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1713 dmas = <&audma0 0x03>, <&audma1 0x04>;
1714 dma-names = "rx", "tx";
1715 };
1716 ssi2: ssi-2 {
1717 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1718 dmas = <&audma0 0x05>, <&audma1 0x06>;
1719 dma-names = "rx", "tx";
1720 };
1721 ssi3: ssi-3 {
1722 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1723 dmas = <&audma0 0x07>, <&audma1 0x08>;
1724 dma-names = "rx", "tx";
1725 };
1726 ssi4: ssi-4 {
1727 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1728 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1729 dma-names = "rx", "tx";
1730 };
1731 ssi5: ssi-5 {
1732 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1733 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1734 dma-names = "rx", "tx";
1735 };
1736 ssi6: ssi-6 {
1737 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1738 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1739 dma-names = "rx", "tx";
1740 };
1741 ssi7: ssi-7 {
1742 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1743 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1744 dma-names = "rx", "tx";
1745 };
1746 ssi8: ssi-8 {
1747 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1748 dmas = <&audma0 0x11>, <&audma1 0x12>;
1749 dma-names = "rx", "tx";
1750 };
1751 ssi9: ssi-9 {
1752 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1753 dmas = <&audma0 0x13>, <&audma1 0x14>;
1754 dma-names = "rx", "tx";
1755 };
1756 };
1757
1758 rcar_sound,ssiu {
1759 ssiu00: ssiu-0 {
1760 dmas = <&audma0 0x15>, <&audma1 0x16>;
1761 dma-names = "rx", "tx";
1762 };
1763 ssiu01: ssiu-1 {
1764 dmas = <&audma0 0x35>, <&audma1 0x36>;
1765 dma-names = "rx", "tx";
1766 };
1767 ssiu02: ssiu-2 {
1768 dmas = <&audma0 0x37>, <&audma1 0x38>;
1769 dma-names = "rx", "tx";
1770 };
1771 ssiu03: ssiu-3 {
1772 dmas = <&audma0 0x47>, <&audma1 0x48>;
1773 dma-names = "rx", "tx";
1774 };
1775 ssiu04: ssiu-4 {
1776 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1777 dma-names = "rx", "tx";
1778 };
1779 ssiu05: ssiu-5 {
1780 dmas = <&audma0 0x43>, <&audma1 0x44>;
1781 dma-names = "rx", "tx";
1782 };
1783 ssiu06: ssiu-6 {
1784 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1785 dma-names = "rx", "tx";
1786 };
1787 ssiu07: ssiu-7 {
1788 dmas = <&audma0 0x53>, <&audma1 0x54>;
1789 dma-names = "rx", "tx";
1790 };
1791 ssiu10: ssiu-8 {
1792 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1793 dma-names = "rx", "tx";
1794 };
1795 ssiu11: ssiu-9 {
1796 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1797 dma-names = "rx", "tx";
1798 };
1799 ssiu12: ssiu-10 {
1800 dmas = <&audma0 0x57>, <&audma1 0x58>;
1801 dma-names = "rx", "tx";
1802 };
1803 ssiu13: ssiu-11 {
1804 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1805 dma-names = "rx", "tx";
1806 };
1807 ssiu14: ssiu-12 {
1808 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1809 dma-names = "rx", "tx";
1810 };
1811 ssiu15: ssiu-13 {
1812 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1813 dma-names = "rx", "tx";
1814 };
1815 ssiu16: ssiu-14 {
1816 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1817 dma-names = "rx", "tx";
1818 };
1819 ssiu17: ssiu-15 {
1820 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1821 dma-names = "rx", "tx";
1822 };
1823 ssiu20: ssiu-16 {
1824 dmas = <&audma0 0x63>, <&audma1 0x64>;
1825 dma-names = "rx", "tx";
1826 };
1827 ssiu21: ssiu-17 {
1828 dmas = <&audma0 0x67>, <&audma1 0x68>;
1829 dma-names = "rx", "tx";
1830 };
1831 ssiu22: ssiu-18 {
1832 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1833 dma-names = "rx", "tx";
1834 };
1835 ssiu23: ssiu-19 {
1836 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1837 dma-names = "rx", "tx";
1838 };
1839 ssiu24: ssiu-20 {
1840 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1841 dma-names = "rx", "tx";
1842 };
1843 ssiu25: ssiu-21 {
1844 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1845 dma-names = "rx", "tx";
1846 };
1847 ssiu26: ssiu-22 {
1848 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1849 dma-names = "rx", "tx";
1850 };
1851 ssiu27: ssiu-23 {
1852 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1853 dma-names = "rx", "tx";
1854 };
1855 ssiu30: ssiu-24 {
1856 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1857 dma-names = "rx", "tx";
1858 };
1859 ssiu31: ssiu-25 {
1860 dmas = <&audma0 0x21>, <&audma1 0x22>;
1861 dma-names = "rx", "tx";
1862 };
1863 ssiu32: ssiu-26 {
1864 dmas = <&audma0 0x23>, <&audma1 0x24>;
1865 dma-names = "rx", "tx";
1866 };
1867 ssiu33: ssiu-27 {
1868 dmas = <&audma0 0x25>, <&audma1 0x26>;
1869 dma-names = "rx", "tx";
1870 };
1871 ssiu34: ssiu-28 {
1872 dmas = <&audma0 0x27>, <&audma1 0x28>;
1873 dma-names = "rx", "tx";
1874 };
1875 ssiu35: ssiu-29 {
1876 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1877 dma-names = "rx", "tx";
1878 };
1879 ssiu36: ssiu-30 {
1880 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1881 dma-names = "rx", "tx";
1882 };
1883 ssiu37: ssiu-31 {
1884 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1885 dma-names = "rx", "tx";
1886 };
1887 ssiu40: ssiu-32 {
1888 dmas = <&audma0 0x71>, <&audma1 0x72>;
1889 dma-names = "rx", "tx";
1890 };
1891 ssiu41: ssiu-33 {
1892 dmas = <&audma0 0x17>, <&audma1 0x18>;
1893 dma-names = "rx", "tx";
1894 };
1895 ssiu42: ssiu-34 {
1896 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1897 dma-names = "rx", "tx";
1898 };
1899 ssiu43: ssiu-35 {
1900 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1901 dma-names = "rx", "tx";
1902 };
1903 ssiu44: ssiu-36 {
1904 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1905 dma-names = "rx", "tx";
1906 };
1907 ssiu45: ssiu-37 {
1908 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1909 dma-names = "rx", "tx";
1910 };
1911 ssiu46: ssiu-38 {
1912 dmas = <&audma0 0x31>, <&audma1 0x32>;
1913 dma-names = "rx", "tx";
1914 };
1915 ssiu47: ssiu-39 {
1916 dmas = <&audma0 0x33>, <&audma1 0x34>;
1917 dma-names = "rx", "tx";
1918 };
1919 ssiu50: ssiu-40 {
1920 dmas = <&audma0 0x73>, <&audma1 0x74>;
1921 dma-names = "rx", "tx";
1922 };
1923 ssiu60: ssiu-41 {
1924 dmas = <&audma0 0x75>, <&audma1 0x76>;
1925 dma-names = "rx", "tx";
1926 };
1927 ssiu70: ssiu-42 {
1928 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1929 dma-names = "rx", "tx";
1930 };
1931 ssiu80: ssiu-43 {
1932 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1933 dma-names = "rx", "tx";
1934 };
1935 ssiu90: ssiu-44 {
1936 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1937 dma-names = "rx", "tx";
1938 };
1939 ssiu91: ssiu-45 {
1940 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1941 dma-names = "rx", "tx";
1942 };
1943 ssiu92: ssiu-46 {
1944 dmas = <&audma0 0x81>, <&audma1 0x82>;
1945 dma-names = "rx", "tx";
1946 };
1947 ssiu93: ssiu-47 {
1948 dmas = <&audma0 0x83>, <&audma1 0x84>;
1949 dma-names = "rx", "tx";
1950 };
1951 ssiu94: ssiu-48 {
1952 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1953 dma-names = "rx", "tx";
1954 };
1955 ssiu95: ssiu-49 {
1956 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1957 dma-names = "rx", "tx";
1958 };
1959 ssiu96: ssiu-50 {
1960 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1961 dma-names = "rx", "tx";
1962 };
1963 ssiu97: ssiu-51 {
1964 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1965 dma-names = "rx", "tx";
1966 };
1967 };
1968 };
1969
1970 audma0: dma-controller@ec700000 {
1971 compatible = "renesas,dmac-r8a774b1",
1972 "renesas,rcar-dmac";
1973 reg = <0 0xec700000 0 0x10000>;
1974 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1975 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1976 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1977 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1978 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1979 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1980 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1981 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1982 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1983 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1984 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1985 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1986 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1987 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1988 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1989 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1990 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1991 interrupt-names = "error",
1992 "ch0", "ch1", "ch2", "ch3",
1993 "ch4", "ch5", "ch6", "ch7",
1994 "ch8", "ch9", "ch10", "ch11",
1995 "ch12", "ch13", "ch14", "ch15";
1996 clocks = <&cpg CPG_MOD 502>;
1997 clock-names = "fck";
1998 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1999 resets = <&cpg 502>;
2000 #dma-cells = <1>;
2001 dma-channels = <16>;
2002 };
2003
2004 audma1: dma-controller@ec720000 {
2005 compatible = "renesas,dmac-r8a774b1",
2006 "renesas,rcar-dmac";
2007 reg = <0 0xec720000 0 0x10000>;
2008 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2009 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2010 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2011 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2012 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2013 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2014 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2015 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2016 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2017 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2018 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2019 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2020 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2021 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2022 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2023 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2024 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2025 interrupt-names = "error",
2026 "ch0", "ch1", "ch2", "ch3",
2027 "ch4", "ch5", "ch6", "ch7",
2028 "ch8", "ch9", "ch10", "ch11",
2029 "ch12", "ch13", "ch14", "ch15";
2030 clocks = <&cpg CPG_MOD 501>;
2031 clock-names = "fck";
2032 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2033 resets = <&cpg 501>;
2034 #dma-cells = <1>;
2035 dma-channels = <16>;
2036 };
2037
2038 xhci0: usb@ee000000 {
2039 compatible = "renesas,xhci-r8a774b1",
2040 "renesas,rcar-gen3-xhci";
2041 reg = <0 0xee000000 0 0xc00>;
2042 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2043 clocks = <&cpg CPG_MOD 328>;
2044 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2045 resets = <&cpg 328>;
2046 status = "disabled";
2047 };
2048
2049 usb3_peri0: usb@ee020000 {
2050 compatible = "renesas,r8a774b1-usb3-peri",
2051 "renesas,rcar-gen3-usb3-peri";
2052 reg = <0 0xee020000 0 0x400>;
2053 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2054 clocks = <&cpg CPG_MOD 328>;
2055 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2056 resets = <&cpg 328>;
2057 status = "disabled";
2058 };
2059
2060 ohci0: usb@ee080000 {
2061 compatible = "generic-ohci";
2062 reg = <0 0xee080000 0 0x100>;
2063 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2064 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2065 phys = <&usb2_phy0 1>;
2066 phy-names = "usb";
2067 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2068 resets = <&cpg 703>, <&cpg 704>;
2069 status = "disabled";
2070 };
2071
2072 ohci1: usb@ee0a0000 {
2073 compatible = "generic-ohci";
2074 reg = <0 0xee0a0000 0 0x100>;
2075 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2076 clocks = <&cpg CPG_MOD 702>;
2077 phys = <&usb2_phy1 1>;
2078 phy-names = "usb";
2079 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2080 resets = <&cpg 702>;
2081 status = "disabled";
2082 };
2083
2084 ehci0: usb@ee080100 {
2085 compatible = "generic-ehci";
2086 reg = <0 0xee080100 0 0x100>;
2087 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2088 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2089 phys = <&usb2_phy0 2>;
2090 phy-names = "usb";
2091 companion = <&ohci0>;
2092 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2093 resets = <&cpg 703>, <&cpg 704>;
2094 status = "disabled";
2095 };
2096
2097 ehci1: usb@ee0a0100 {
2098 compatible = "generic-ehci";
2099 reg = <0 0xee0a0100 0 0x100>;
2100 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2101 clocks = <&cpg CPG_MOD 702>;
2102 phys = <&usb2_phy1 2>;
2103 phy-names = "usb";
2104 companion = <&ohci1>;
2105 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2106 resets = <&cpg 702>;
2107 status = "disabled";
2108 };
2109
2110 usb2_phy0: usb-phy@ee080200 {
2111 compatible = "renesas,usb2-phy-r8a774b1",
2112 "renesas,rcar-gen3-usb2-phy";
2113 reg = <0 0xee080200 0 0x700>;
2114 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2115 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2116 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2117 resets = <&cpg 703>, <&cpg 704>;
2118 #phy-cells = <1>;
2119 status = "disabled";
2120 };
2121
2122 usb2_phy1: usb-phy@ee0a0200 {
2123 compatible = "renesas,usb2-phy-r8a774b1",
2124 "renesas,rcar-gen3-usb2-phy";
2125 reg = <0 0xee0a0200 0 0x700>;
2126 clocks = <&cpg CPG_MOD 702>;
2127 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2128 resets = <&cpg 702>;
2129 #phy-cells = <1>;
2130 status = "disabled";
2131 };
2132
2133 sdhi0: mmc@ee100000 {
2134 compatible = "renesas,sdhi-r8a774b1",
2135 "renesas,rcar-gen3-sdhi";
2136 reg = <0 0xee100000 0 0x2000>;
2137 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2138 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>;
2139 clock-names = "core", "clkh";
2140 max-frequency = <200000000>;
2141 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2142 resets = <&cpg 314>;
2143 status = "disabled";
2144 };
2145
2146 sdhi1: mmc@ee120000 {
2147 compatible = "renesas,sdhi-r8a774b1",
2148 "renesas,rcar-gen3-sdhi";
2149 reg = <0 0xee120000 0 0x2000>;
2150 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2151 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>;
2152 clock-names = "core", "clkh";
2153 max-frequency = <200000000>;
2154 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2155 resets = <&cpg 313>;
2156 status = "disabled";
2157 };
2158
2159 sdhi2: mmc@ee140000 {
2160 compatible = "renesas,sdhi-r8a774b1",
2161 "renesas,rcar-gen3-sdhi";
2162 reg = <0 0xee140000 0 0x2000>;
2163 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2164 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>;
2165 clock-names = "core", "clkh";
2166 max-frequency = <200000000>;
2167 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2168 resets = <&cpg 312>;
2169 status = "disabled";
2170 };
2171
2172 sdhi3: mmc@ee160000 {
2173 compatible = "renesas,sdhi-r8a774b1",
2174 "renesas,rcar-gen3-sdhi";
2175 reg = <0 0xee160000 0 0x2000>;
2176 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2177 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>;
2178 clock-names = "core", "clkh";
2179 max-frequency = <200000000>;
2180 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2181 resets = <&cpg 311>;
2182 status = "disabled";
2183 };
2184
2185 rpc: spi@ee200000 {
2186 compatible = "renesas,r8a774b1-rpc-if",
2187 "renesas,rcar-gen3-rpc-if";
2188 reg = <0 0xee200000 0 0x200>,
2189 <0 0x08000000 0 0x4000000>,
2190 <0 0xee208000 0 0x100>;
2191 reg-names = "regs", "dirmap", "wbuf";
2192 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2193 clocks = <&cpg CPG_MOD 917>;
2194 clock-names = "rpc";
2195 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2196 resets = <&cpg 917>;
2197 #address-cells = <1>;
2198 #size-cells = <0>;
2199 status = "disabled";
2200 };
2201
2202 sata: sata@ee300000 {
2203 compatible = "renesas,sata-r8a774b1",
2204 "renesas,rcar-gen3-sata";
2205 reg = <0 0xee300000 0 0x200000>;
2206 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2207 clocks = <&cpg CPG_MOD 815>;
2208 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2209 resets = <&cpg 815>;
2210 status = "disabled";
2211 };
2212
2213 gic: interrupt-controller@f1010000 {
2214 compatible = "arm,gic-400";
2215 #interrupt-cells = <3>;
2216 #address-cells = <0>;
2217 interrupt-controller;
2218 reg = <0x0 0xf1010000 0 0x1000>,
2219 <0x0 0xf1020000 0 0x20000>,
2220 <0x0 0xf1040000 0 0x20000>,
2221 <0x0 0xf1060000 0 0x20000>;
2222 interrupts = <GIC_PPI 9
2223 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2224 clocks = <&cpg CPG_MOD 408>;
2225 clock-names = "clk";
2226 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2227 resets = <&cpg 408>;
2228 };
2229
2230 pciec0: pcie@fe000000 {
2231 compatible = "renesas,pcie-r8a774b1",
2232 "renesas,pcie-rcar-gen3";
2233 reg = <0 0xfe000000 0 0x80000>;
2234 #address-cells = <3>;
2235 #size-cells = <2>;
2236 bus-range = <0x00 0xff>;
2237 device_type = "pci";
2238 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2239 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2240 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2241 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2242 /* Map all possible DDR as inbound ranges */
2243 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2244 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2245 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2246 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2247 #interrupt-cells = <1>;
2248 interrupt-map-mask = <0 0 0 0>;
2249 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2250 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2251 clock-names = "pcie", "pcie_bus";
2252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2253 resets = <&cpg 319>;
2254 status = "disabled";
2255 };
2256
2257 pciec1: pcie@ee800000 {
2258 compatible = "renesas,pcie-r8a774b1",
2259 "renesas,pcie-rcar-gen3";
2260 reg = <0 0xee800000 0 0x80000>;
2261 #address-cells = <3>;
2262 #size-cells = <2>;
2263 bus-range = <0x00 0xff>;
2264 device_type = "pci";
2265 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2266 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2267 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2268 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2269 /* Map all possible DDR as inbound ranges */
2270 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2271 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2272 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2273 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2274 #interrupt-cells = <1>;
2275 interrupt-map-mask = <0 0 0 0>;
2276 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2277 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2278 clock-names = "pcie", "pcie_bus";
2279 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2280 resets = <&cpg 318>;
2281 status = "disabled";
2282 };
2283
2284 pciec0_ep: pcie-ep@fe000000 {
2285 compatible = "renesas,r8a774b1-pcie-ep",
2286 "renesas,rcar-gen3-pcie-ep";
2287 reg = <0x0 0xfe000000 0 0x80000>,
2288 <0x0 0xfe100000 0 0x100000>,
2289 <0x0 0xfe200000 0 0x200000>,
2290 <0x0 0x30000000 0 0x8000000>,
2291 <0x0 0x38000000 0 0x8000000>;
2292 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2293 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2294 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2295 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2296 clocks = <&cpg CPG_MOD 319>;
2297 clock-names = "pcie";
2298 resets = <&cpg 319>;
2299 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2300 status = "disabled";
2301 };
2302
2303 pciec1_ep: pcie-ep@ee800000 {
2304 compatible = "renesas,r8a774b1-pcie-ep",
2305 "renesas,rcar-gen3-pcie-ep";
2306 reg = <0x0 0xee800000 0 0x80000>,
2307 <0x0 0xee900000 0 0x100000>,
2308 <0x0 0xeea00000 0 0x200000>,
2309 <0x0 0xc0000000 0 0x8000000>,
2310 <0x0 0xc8000000 0 0x8000000>;
2311 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2312 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2313 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2314 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2315 clocks = <&cpg CPG_MOD 318>;
2316 clock-names = "pcie";
2317 resets = <&cpg 318>;
2318 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2319 status = "disabled";
2320 };
2321
2322 fdp1@fe940000 {
2323 compatible = "renesas,fdp1";
2324 reg = <0 0xfe940000 0 0x2400>;
2325 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2326 clocks = <&cpg CPG_MOD 119>;
2327 power-domains = <&sysc R8A774B1_PD_A3VP>;
2328 resets = <&cpg 119>;
2329 renesas,fcp = <&fcpf0>;
2330 };
2331
2332 fcpf0: fcp@fe950000 {
2333 compatible = "renesas,fcpf";
2334 reg = <0 0xfe950000 0 0x200>;
2335 clocks = <&cpg CPG_MOD 615>;
2336 power-domains = <&sysc R8A774B1_PD_A3VP>;
2337 resets = <&cpg 615>;
2338 };
2339
2340 vspb: vsp@fe960000 {
2341 compatible = "renesas,vsp2";
2342 reg = <0 0xfe960000 0 0x8000>;
2343 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2344 clocks = <&cpg CPG_MOD 626>;
2345 power-domains = <&sysc R8A774B1_PD_A3VP>;
2346 resets = <&cpg 626>;
2347
2348 renesas,fcp = <&fcpvb0>;
2349 };
2350
2351 vspi0: vsp@fe9a0000 {
2352 compatible = "renesas,vsp2";
2353 reg = <0 0xfe9a0000 0 0x8000>;
2354 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2355 clocks = <&cpg CPG_MOD 631>;
2356 power-domains = <&sysc R8A774B1_PD_A3VP>;
2357 resets = <&cpg 631>;
2358
2359 renesas,fcp = <&fcpvi0>;
2360 };
2361
2362 vspd0: vsp@fea20000 {
2363 compatible = "renesas,vsp2";
2364 reg = <0 0xfea20000 0 0x5000>;
2365 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2366 clocks = <&cpg CPG_MOD 623>;
2367 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2368 resets = <&cpg 623>;
2369
2370 renesas,fcp = <&fcpvd0>;
2371 };
2372
2373 vspd1: vsp@fea28000 {
2374 compatible = "renesas,vsp2";
2375 reg = <0 0xfea28000 0 0x5000>;
2376 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2377 clocks = <&cpg CPG_MOD 622>;
2378 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2379 resets = <&cpg 622>;
2380
2381 renesas,fcp = <&fcpvd1>;
2382 };
2383
2384 fcpvb0: fcp@fe96f000 {
2385 compatible = "renesas,fcpv";
2386 reg = <0 0xfe96f000 0 0x200>;
2387 clocks = <&cpg CPG_MOD 607>;
2388 power-domains = <&sysc R8A774B1_PD_A3VP>;
2389 resets = <&cpg 607>;
2390 };
2391
2392 fcpvd0: fcp@fea27000 {
2393 compatible = "renesas,fcpv";
2394 reg = <0 0xfea27000 0 0x200>;
2395 clocks = <&cpg CPG_MOD 603>;
2396 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2397 resets = <&cpg 603>;
2398 };
2399
2400 fcpvd1: fcp@fea2f000 {
2401 compatible = "renesas,fcpv";
2402 reg = <0 0xfea2f000 0 0x200>;
2403 clocks = <&cpg CPG_MOD 602>;
2404 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2405 resets = <&cpg 602>;
2406 };
2407
2408 fcpvi0: fcp@fe9af000 {
2409 compatible = "renesas,fcpv";
2410 reg = <0 0xfe9af000 0 0x200>;
2411 clocks = <&cpg CPG_MOD 611>;
2412 power-domains = <&sysc R8A774B1_PD_A3VP>;
2413 resets = <&cpg 611>;
2414 };
2415
2416 csi20: csi2@fea80000 {
2417 compatible = "renesas,r8a774b1-csi2";
2418 reg = <0 0xfea80000 0 0x10000>;
2419 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2420 clocks = <&cpg CPG_MOD 714>;
2421 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2422 resets = <&cpg 714>;
2423 status = "disabled";
2424
2425 ports {
2426 #address-cells = <1>;
2427 #size-cells = <0>;
2428
2429 port@0 {
2430 reg = <0>;
2431 };
2432
2433 port@1 {
2434 #address-cells = <1>;
2435 #size-cells = <0>;
2436
2437 reg = <1>;
2438
2439 csi20vin0: endpoint@0 {
2440 reg = <0>;
2441 remote-endpoint = <&vin0csi20>;
2442 };
2443 csi20vin1: endpoint@1 {
2444 reg = <1>;
2445 remote-endpoint = <&vin1csi20>;
2446 };
2447 csi20vin2: endpoint@2 {
2448 reg = <2>;
2449 remote-endpoint = <&vin2csi20>;
2450 };
2451 csi20vin3: endpoint@3 {
2452 reg = <3>;
2453 remote-endpoint = <&vin3csi20>;
2454 };
2455 csi20vin4: endpoint@4 {
2456 reg = <4>;
2457 remote-endpoint = <&vin4csi20>;
2458 };
2459 csi20vin5: endpoint@5 {
2460 reg = <5>;
2461 remote-endpoint = <&vin5csi20>;
2462 };
2463 csi20vin6: endpoint@6 {
2464 reg = <6>;
2465 remote-endpoint = <&vin6csi20>;
2466 };
2467 csi20vin7: endpoint@7 {
2468 reg = <7>;
2469 remote-endpoint = <&vin7csi20>;
2470 };
2471 };
2472 };
2473 };
2474
2475 csi40: csi2@feaa0000 {
2476 compatible = "renesas,r8a774b1-csi2";
2477 reg = <0 0xfeaa0000 0 0x10000>;
2478 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2479 clocks = <&cpg CPG_MOD 716>;
2480 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2481 resets = <&cpg 716>;
2482 status = "disabled";
2483
2484 ports {
2485 #address-cells = <1>;
2486 #size-cells = <0>;
2487
2488 port@0 {
2489 reg = <0>;
2490 };
2491
2492 port@1 {
2493 #address-cells = <1>;
2494 #size-cells = <0>;
2495
2496 reg = <1>;
2497
2498 csi40vin0: endpoint@0 {
2499 reg = <0>;
2500 remote-endpoint = <&vin0csi40>;
2501 };
2502 csi40vin1: endpoint@1 {
2503 reg = <1>;
2504 remote-endpoint = <&vin1csi40>;
2505 };
2506 csi40vin2: endpoint@2 {
2507 reg = <2>;
2508 remote-endpoint = <&vin2csi40>;
2509 };
2510 csi40vin3: endpoint@3 {
2511 reg = <3>;
2512 remote-endpoint = <&vin3csi40>;
2513 };
2514 csi40vin4: endpoint@4 {
2515 reg = <4>;
2516 remote-endpoint = <&vin4csi40>;
2517 };
2518 csi40vin5: endpoint@5 {
2519 reg = <5>;
2520 remote-endpoint = <&vin5csi40>;
2521 };
2522 csi40vin6: endpoint@6 {
2523 reg = <6>;
2524 remote-endpoint = <&vin6csi40>;
2525 };
2526 csi40vin7: endpoint@7 {
2527 reg = <7>;
2528 remote-endpoint = <&vin7csi40>;
2529 };
2530 };
2531 };
2532 };
2533
2534 hdmi0: hdmi@fead0000 {
2535 compatible = "renesas,r8a774b1-hdmi",
2536 "renesas,rcar-gen3-hdmi";
2537 reg = <0 0xfead0000 0 0x10000>;
2538 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2539 clocks = <&cpg CPG_MOD 729>,
2540 <&cpg CPG_CORE R8A774B1_CLK_HDMI>;
2541 clock-names = "iahb", "isfr";
2542 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2543 resets = <&cpg 729>;
2544 status = "disabled";
2545
2546 ports {
2547 #address-cells = <1>;
2548 #size-cells = <0>;
2549
2550 port@0 {
2551 reg = <0>;
2552 dw_hdmi0_in: endpoint {
2553 remote-endpoint = <&du_out_hdmi0>;
2554 };
2555 };
2556 port@1 {
2557 reg = <1>;
2558 };
2559 port@2 {
2560 /* HDMI sound */
2561 reg = <2>;
2562 };
2563 };
2564 };
2565
2566 du: display@feb00000 {
2567 compatible = "renesas,du-r8a774b1";
2568 reg = <0 0xfeb00000 0 0x80000>;
2569 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2570 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2571 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2572 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2573 <&cpg CPG_MOD 721>;
2574 clock-names = "du.0", "du.1", "du.3";
2575 resets = <&cpg 724>, <&cpg 722>;
2576 reset-names = "du.0", "du.3";
2577 status = "disabled";
2578
2579 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2580
2581 ports {
2582 #address-cells = <1>;
2583 #size-cells = <0>;
2584
2585 port@0 {
2586 reg = <0>;
2587 };
2588 port@1 {
2589 reg = <1>;
2590 du_out_hdmi0: endpoint {
2591 remote-endpoint = <&dw_hdmi0_in>;
2592 };
2593 };
2594 port@2 {
2595 reg = <2>;
2596 du_out_lvds0: endpoint {
2597 remote-endpoint = <&lvds0_in>;
2598 };
2599 };
2600 };
2601 };
2602
2603 lvds0: lvds@feb90000 {
2604 compatible = "renesas,r8a774b1-lvds";
2605 reg = <0 0xfeb90000 0 0x14>;
2606 clocks = <&cpg CPG_MOD 727>;
2607 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2608 resets = <&cpg 727>;
2609 status = "disabled";
2610
2611 ports {
2612 #address-cells = <1>;
2613 #size-cells = <0>;
2614
2615 port@0 {
2616 reg = <0>;
2617 lvds0_in: endpoint {
2618 remote-endpoint = <&du_out_lvds0>;
2619 };
2620 };
2621 port@1 {
2622 reg = <1>;
2623 };
2624 };
2625 };
2626
2627 prr: chipid@fff00044 {
2628 compatible = "renesas,prr";
2629 reg = <0 0xfff00044 0 4>;
2630 };
2631 };
2632
2633 thermal-zones {
2634 sensor1_thermal: sensor1-thermal {
2635 polling-delay-passive = <250>;
2636 polling-delay = <1000>;
2637 thermal-sensors = <&tsc 0>;
2638 sustainable-power = <2439>;
2639
2640 trips {
2641 sensor1_crit: sensor1-crit {
2642 temperature = <120000>;
2643 hysteresis = <1000>;
2644 type = "critical";
2645 };
2646 };
2647 };
2648
2649 sensor2_thermal: sensor2-thermal {
2650 polling-delay-passive = <250>;
2651 polling-delay = <1000>;
2652 thermal-sensors = <&tsc 1>;
2653 sustainable-power = <2439>;
2654
2655 trips {
2656 sensor2_crit: sensor2-crit {
2657 temperature = <120000>;
2658 hysteresis = <1000>;
2659 type = "critical";
2660 };
2661 };
2662 };
2663
2664 sensor3_thermal: sensor3-thermal {
2665 polling-delay-passive = <250>;
2666 polling-delay = <1000>;
2667 thermal-sensors = <&tsc 2>;
2668 sustainable-power = <2439>;
2669
2670 cooling-maps {
2671 map0 {
2672 trip = <&target>;
2673 cooling-device = <&a57_0 0 2>;
2674 contribution = <1024>;
2675 };
2676 };
2677 trips {
2678 target: trip-point1 {
2679 temperature = <100000>;
2680 hysteresis = <1000>;
2681 type = "passive";
2682 };
2683
2684 sensor3_crit: sensor3-crit {
2685 temperature = <120000>;
2686 hysteresis = <1000>;
2687 type = "critical";
2688 };
2689 };
2690 };
2691 };
2692
2693 timer {
2694 compatible = "arm,armv8-timer";
2695 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2696 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2697 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2698 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2699 };
2700
2701 /* External USB clocks - can be overridden by the board */
2702 usb3s0_clk: usb3s0 {
2703 compatible = "fixed-clock";
2704 #clock-cells = <0>;
2705 clock-frequency = <0>;
2706 };
2707
2708 usb_extal_clk: usb_extal {
2709 compatible = "fixed-clock";
2710 #clock-cells = <0>;
2711 clock-frequency = <0>;
2712 };
2713 };
