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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
0004  *
0005  * Copyright (C) 2019 Renesas Electronics Corp.
0006  */
0007 
0008 / {
0009         model = "Silicon Linux sub board for CAT874 (CAT875)";
0010 
0011         aliases {
0012                 ethernet0 = &avb;
0013         };
0014 };
0015 
0016 &avb {
0017         pinctrl-0 = <&avb_pins>;
0018         pinctrl-names = "default";
0019         renesas,no-ether-link;
0020         phy-handle = <&phy0>;
0021         phy-mode = "rgmii-id";
0022         status = "okay";
0023 
0024         phy0: ethernet-phy@0 {
0025                 compatible = "ethernet-phy-id001c.c915",
0026                              "ethernet-phy-ieee802.3-c22";
0027                 reg = <0>;
0028                 interrupt-parent = <&gpio2>;
0029                 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
0030                 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
0031         };
0032 };
0033 
0034 &can0 {
0035         pinctrl-0 = <&can0_pins>;
0036         pinctrl-names = "default";
0037         status = "okay";
0038 };
0039 
0040 &can1 {
0041         pinctrl-0 = <&can1_pins>;
0042         pinctrl-names = "default";
0043         status = "okay";
0044 };
0045 
0046 &pciec0 {
0047         status = "okay";
0048 };
0049 
0050 &pfc {
0051         avb_pins: avb {
0052                 mux {
0053                         groups = "avb_mii";
0054                         function = "avb";
0055                 };
0056         };
0057 
0058         can0_pins: can0 {
0059                 groups = "can0_data";
0060                 function = "can0";
0061         };
0062 
0063         can1_pins: can1 {
0064                 groups = "can1_data";
0065                 function = "can1";
0066         };
0067 };