0001 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
0002 /*
0003 * Realtek RTD1293 SoC
0004 *
0005 * Copyright (c) 2017-2019 Andreas Färber
0006 */
0007
0008 #include "rtd129x.dtsi"
0009
0010 / {
0011 compatible = "realtek,rtd1293";
0012
0013 cpus {
0014 #address-cells = <2>;
0015 #size-cells = <0>;
0016
0017 cpu0: cpu@0 {
0018 device_type = "cpu";
0019 compatible = "arm,cortex-a53";
0020 reg = <0x0 0x0>;
0021 next-level-cache = <&l2>;
0022 };
0023
0024 cpu1: cpu@1 {
0025 device_type = "cpu";
0026 compatible = "arm,cortex-a53";
0027 reg = <0x0 0x1>;
0028 next-level-cache = <&l2>;
0029 };
0030
0031 l2: l2-cache {
0032 compatible = "cache";
0033 };
0034 };
0035
0036 timer {
0037 compatible = "arm,armv8-timer";
0038 interrupts = <GIC_PPI 13
0039 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
0040 <GIC_PPI 14
0041 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
0042 <GIC_PPI 11
0043 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
0044 <GIC_PPI 10
0045 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
0046 };
0047 };
0048
0049 &arm_pmu {
0050 interrupt-affinity = <&cpu0>, <&cpu1>;
0051 };
0052
0053 &gic {
0054 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
0055 };
