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0001 // SPDX-License-Identifier: BSD-3-Clause
0002 /*
0003  * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
0004  *
0005  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
0006  */
0007 
0008 ap_ec_spi: &spi10 {
0009         status = "okay";
0010 
0011         pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
0012         cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
0013 
0014         cros_ec: ec@0 {
0015                 compatible = "google,cros-ec-spi";
0016                 reg = <0>;
0017                 interrupt-parent = <&tlmm>;
0018                 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
0019                 pinctrl-names = "default";
0020                 pinctrl-0 = <&ap_ec_int_l>;
0021                 spi-max-frequency = <3000000>;
0022 
0023                 cros_ec_pwm: pwm {
0024                         compatible = "google,cros-ec-pwm";
0025                         #pwm-cells = <1>;
0026                 };
0027 
0028                 i2c_tunnel: i2c-tunnel {
0029                         compatible = "google,cros-ec-i2c-tunnel";
0030                         google,remote-bus = <0>;
0031                         #address-cells = <1>;
0032                         #size-cells = <0>;
0033                 };
0034 
0035                 typec {
0036                         compatible = "google,cros-ec-typec";
0037                         #address-cells = <1>;
0038                         #size-cells = <0>;
0039 
0040                         usb_c0: connector@0 {
0041                                 compatible = "usb-c-connector";
0042                                 reg = <0>;
0043                                 label = "left";
0044                                 power-role = "dual";
0045                                 data-role = "host";
0046                                 try-power-role = "source";
0047                         };
0048 
0049                         usb_c1: connector@1 {
0050                                 compatible = "usb-c-connector";
0051                                 reg = <1>;
0052                                 label = "right";
0053                                 power-role = "dual";
0054                                 data-role = "host";
0055                                 try-power-role = "source";
0056                         };
0057                 };
0058         };
0059 };
0060 
0061 #include <arm/cros-ec-keyboard.dtsi>
0062 #include <arm/cros-ec-sbs.dtsi>
0063 
0064 ap_h1_spi: &spi14 {
0065         status = "okay";
0066 
0067         pinctrl-0 = <&qup_spi14_data_clk>, <&qup_spi14_cs_gpio_init_high>, <&qup_spi14_cs_gpio>;
0068         cs-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
0069 
0070         cr50: tpm@0 {
0071                 compatible = "google,cr50";
0072                 reg = <0>;
0073                 pinctrl-names = "default";
0074                 pinctrl-0 = <&h1_ap_int_odl>;
0075                 spi-max-frequency = <800000>;
0076                 interrupt-parent = <&tlmm>;
0077                 interrupts = <104 IRQ_TYPE_EDGE_RISING>;
0078         };
0079 };
0080 
0081 &tlmm {
0082         ap_ec_int_l: ap-ec-int-l {
0083                 pins = "gpio18";
0084                 function = "gpio";
0085                 input-enable;
0086                 bias-pull-up;
0087         };
0088 
0089         h1_ap_int_odl: h1-ap-int-odl {
0090                 pins = "gpio104";
0091                 function = "gpio";
0092                 input-enable;
0093                 bias-pull-up;
0094         };
0095 
0096         qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
0097                 pins = "gpio43";
0098                 output-high;
0099         };
0100 
0101         qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high {
0102                 pins = "gpio59";
0103                 output-high;
0104         };
0105 };