0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Herobrine baseboard device tree source
0004 *
0005 * The set of things in this file is a bit loosely defined. It's roughly
0006 * defined as the set of things that the child boards happen to have in
0007 * common. Since all of the child boards started from the same original
0008 * design this is hopefully a large set of things but as more derivatives
0009 * appear things may "bubble down" out of this file. For things that are
0010 * part of the reference design but might not exist on child nodes we will
0011 * follow the lead of the SoC dtsi files and leave their status as "disabled".
0012 *
0013 * Copyright 2022 Google LLC.
0014 */
0015
0016 #include <dt-bindings/input/gpio-keys.h>
0017 #include <dt-bindings/input/input.h>
0018 #include <dt-bindings/leds/common.h>
0019
0020 #include "sc7280-qcard.dtsi"
0021 #include "sc7280-chrome-common.dtsi"
0022
0023 / {
0024 chosen {
0025 stdout-path = "serial0:115200n8";
0026 };
0027
0028 /*
0029 * FIXED REGULATORS
0030 *
0031 * Sort order:
0032 * 1. parents above children.
0033 * 2. higher voltage above lower voltage.
0034 * 3. alphabetically by node name.
0035 */
0036
0037 /* This is the top level supply and variable voltage */
0038 ppvar_sys: ppvar-sys-regulator {
0039 compatible = "regulator-fixed";
0040 regulator-name = "ppvar_sys";
0041 regulator-always-on;
0042 regulator-boot-on;
0043 };
0044
0045 /* This divides ppvar_sys by 2, so voltage is variable */
0046 src_vph_pwr: src-vph-pwr-regulator {
0047 compatible = "regulator-fixed";
0048 regulator-name = "src_vph_pwr";
0049
0050 /* EC turns on with switchcap_on; always on for AP */
0051 regulator-always-on;
0052 regulator-boot-on;
0053
0054 vin-supply = <&ppvar_sys>;
0055 };
0056
0057 pp5000_s5: pp5000-s5-regulator {
0058 compatible = "regulator-fixed";
0059 regulator-name = "pp5000_s5";
0060
0061 /* EC turns on with en_pp5000_s5; always on for AP */
0062 regulator-always-on;
0063 regulator-boot-on;
0064 regulator-min-microvolt = <5000000>;
0065 regulator-max-microvolt = <5000000>;
0066
0067 vin-supply = <&ppvar_sys>;
0068 };
0069
0070 pp3300_z1: pp3300-z1-regulator {
0071 compatible = "regulator-fixed";
0072 regulator-name = "pp3300_z1";
0073
0074 /* EC turns on with en_pp3300_z1; always on for AP */
0075 regulator-always-on;
0076 regulator-boot-on;
0077 regulator-min-microvolt = <3300000>;
0078 regulator-max-microvolt = <3300000>;
0079
0080 vin-supply = <&ppvar_sys>;
0081 };
0082
0083 pp3300_codec: pp3300-codec-regulator {
0084 compatible = "regulator-fixed";
0085 regulator-name = "pp3300_codec";
0086
0087 regulator-min-microvolt = <3300000>;
0088 regulator-max-microvolt = <3300000>;
0089
0090 gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
0091 enable-active-high;
0092 pinctrl-names = "default";
0093 pinctrl-0 = <&en_pp3300_codec>;
0094
0095 vin-supply = <&pp3300_z1>;
0096 status = "disabled";
0097 };
0098
0099 pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
0100 compatible = "regulator-fixed";
0101 regulator-name = "pp3300_left_in_mlb";
0102
0103 regulator-min-microvolt = <3300000>;
0104 regulator-max-microvolt = <3300000>;
0105
0106 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
0107 enable-active-high;
0108 pinctrl-names = "default";
0109 pinctrl-0 = <&en_pp3300_dx_edp>;
0110
0111 vin-supply = <&pp3300_z1>;
0112 };
0113
0114 pp3300_mcu_fp:
0115 pp3300_fp_ls:
0116 pp3300_fp_mcu: pp3300-fp-regulator {
0117 compatible = "regulator-fixed";
0118 regulator-name = "pp3300_fp";
0119
0120 regulator-min-microvolt = <3300000>;
0121 regulator-max-microvolt = <3300000>;
0122
0123 regulator-boot-on;
0124 regulator-always-on;
0125
0126 /*
0127 * WARNING: it is intentional that GPIO 77 isn't listed here.
0128 * The userspace script for updating the fingerprint firmware
0129 * needs to control the FP regulators during a FW update,
0130 * hence the signal can't be owned by the kernel regulator.
0131 */
0132
0133 pinctrl-names = "default";
0134 pinctrl-0 = <&en_fp_rails>;
0135
0136 vin-supply = <&pp3300_z1>;
0137 status = "disabled";
0138 };
0139
0140 pp3300_hub: pp3300-hub-regulator {
0141 compatible = "regulator-fixed";
0142 regulator-name = "pp3300_hub";
0143
0144 regulator-min-microvolt = <3300000>;
0145 regulator-max-microvolt = <3300000>;
0146
0147 regulator-boot-on;
0148 regulator-always-on;
0149
0150 gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
0151 enable-active-high;
0152 pinctrl-names = "default";
0153 pinctrl-0 = <&hub_en>;
0154
0155 vin-supply = <&pp3300_z1>;
0156 };
0157
0158 pp3300_tp: pp3300-tp-regulator {
0159 compatible = "regulator-fixed";
0160 regulator-name = "pp3300_tp";
0161
0162 regulator-min-microvolt = <3300000>;
0163 regulator-max-microvolt = <3300000>;
0164
0165 /* AP turns on with PP1800_L18B_S0; always on for AP */
0166 regulator-always-on;
0167 regulator-boot-on;
0168
0169 vin-supply = <&pp3300_z1>;
0170 };
0171
0172 pp3300_ssd: pp3300-ssd-regulator {
0173 compatible = "regulator-fixed";
0174 regulator-name = "pp3300_ssd";
0175
0176 regulator-min-microvolt = <3300000>;
0177 regulator-max-microvolt = <3300000>;
0178
0179 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
0180 enable-active-high;
0181 pinctrl-names = "default";
0182 pinctrl-0 = <&ssd_en>;
0183
0184 /*
0185 * The bootloaer may have left PCIe configured. Powering this
0186 * off while the PCIe clocks are still running isn't great,
0187 * so it's better to default to this regulator being on.
0188 */
0189 regulator-boot-on;
0190
0191 vin-supply = <&pp3300_z1>;
0192 };
0193
0194 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
0195 compatible = "regulator-fixed";
0196 regulator-name = "pp2850_vcm_wf_cam";
0197
0198 regulator-min-microvolt = <2850000>;
0199 regulator-max-microvolt = <2850000>;
0200
0201 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
0202 enable-active-high;
0203 pinctrl-names = "default";
0204 pinctrl-0 = <&wf_cam_en>;
0205
0206 vin-supply = <&pp3300_z1>;
0207 status = "disabled";
0208 };
0209
0210 pp2850_wf_cam: pp2850-wf-cam-regulator {
0211 compatible = "regulator-fixed";
0212 regulator-name = "pp2850_wf_cam";
0213
0214 regulator-min-microvolt = <2850000>;
0215 regulator-max-microvolt = <2850000>;
0216
0217 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
0218 enable-active-high;
0219 /*
0220 * The pinconf can only be referenced once so we put it on the
0221 * first regulator and comment it out here.
0222 *
0223 * pinctrl-names = "default";
0224 * pinctrl-0 = <&wf_cam_en>;
0225 */
0226
0227 vin-supply = <&pp3300_z1>;
0228 status = "disabled";
0229 };
0230
0231 pp1800_fp: pp1800-fp-regulator {
0232 compatible = "regulator-fixed";
0233 regulator-name = "pp1800_fp";
0234
0235 regulator-min-microvolt = <1800000>;
0236 regulator-max-microvolt = <1800000>;
0237
0238 regulator-boot-on;
0239 regulator-always-on;
0240
0241 /*
0242 * WARNING: it is intentional that GPIO 77 isn't listed here.
0243 * The userspace script for updating the fingerprint firmware
0244 * needs to control the FP regulators during a FW update,
0245 * hence the signal can't be owned by the kernel regulator.
0246 */
0247
0248 pinctrl-names = "default";
0249 pinctrl-0 = <&en_fp_rails>;
0250
0251 vin-supply = <&pp1800_l18b_s0>;
0252 status = "disabled";
0253 };
0254
0255 pp1800_wf_cam: pp1800-wf-cam-regulator {
0256 compatible = "regulator-fixed";
0257 regulator-name = "pp1800_wf_cam";
0258
0259 regulator-min-microvolt = <1800000>;
0260 regulator-max-microvolt = <1800000>;
0261
0262 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
0263 enable-active-high;
0264 /*
0265 * The pinconf can only be referenced once so we put it on the
0266 * first regulator and comment it out here.
0267 *
0268 * pinctrl-names = "default";
0269 * pinctrl-0 = <&wf_cam_en>;
0270 */
0271
0272 vin-supply = <&vreg_l19b_s0>;
0273 status = "disabled";
0274 };
0275
0276 pp1200_wf_cam: pp1200-wf-cam-regulator {
0277 compatible = "regulator-fixed";
0278 regulator-name = "pp1200_wf_cam";
0279
0280 regulator-min-microvolt = <1200000>;
0281 regulator-max-microvolt = <1200000>;
0282
0283 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
0284 enable-active-high;
0285 /*
0286 * The pinconf can only be referenced once so we put it on the
0287 * first regulator and comment it out here.
0288 *
0289 * pinctrl-names = "default";
0290 * pinctrl-0 = <&wf_cam_en>;
0291 */
0292
0293 vin-supply = <&pp3300_z1>;
0294 status = "disabled";
0295 };
0296
0297 /* BOARD-SPECIFIC TOP LEVEL NODES */
0298
0299 pwmleds: pwmleds {
0300 compatible = "pwm-leds";
0301 status = "disabled";
0302 keyboard_backlight: keyboard-backlight {
0303 label = "cros_ec::kbd_backlight";
0304 function = LED_FUNCTION_KBD_BACKLIGHT;
0305 pwms = <&cros_ec_pwm 0>;
0306 max-brightness = <1023>;
0307 };
0308 };
0309 };
0310
0311 /*
0312 * ADJUSTMENTS TO QCARD REGULATORS
0313 *
0314 * Mostly this is just board-local names for regulators that come from
0315 * Qcard, but this also has some minor regulator overrides.
0316 *
0317 * Names are only listed here if regulators go somewhere other than a
0318 * testpoint.
0319 */
0320
0321 /* From Qcard to our board; ordered by PMIC-ID / rail number */
0322
0323 pp1256_s8b: &vreg_s8b_1p256 {};
0324
0325 pp1800_l18b_s0: &vreg_l18b_1p8 {};
0326 pp1800_l18b: &vreg_l18b_1p8 {};
0327
0328 vreg_l19b_s0: &vreg_l19b_1p8 {};
0329
0330 pp1800_alc5682: &vreg_l2c_1p8 {};
0331 pp1800_l2c: &vreg_l2c_1p8 {};
0332
0333 vreg_l4c: &vreg_l4c_1p8_3p0 {};
0334
0335 ppvar_l6c: &vreg_l6c_2p96 {};
0336
0337 pp3000_l7c: &vreg_l7c_3p0 {};
0338
0339 pp1800_prox: &vreg_l8c_1p8 {};
0340 pp1800_l8c: &vreg_l8c_1p8 {};
0341
0342 pp2950_l9c: &vreg_l9c_2p96 {};
0343
0344 pp1800_lcm: &vreg_l12c_1p8 {};
0345 pp1800_mipi: &vreg_l12c_1p8 {};
0346 pp1800_l12c: &vreg_l12c_1p8 {};
0347
0348 pp3300_lcm: &vreg_l13c_3p0 {};
0349 pp3300_mipi: &vreg_l13c_3p0 {};
0350 pp3300_l13c: &vreg_l13c_3p0 {};
0351
0352 /* From our board to Qcard; ordered same as node definition above */
0353
0354 vreg_edp_bl: &ppvar_sys {};
0355
0356 ts_avdd: &pp3300_left_in_mlb {};
0357 vreg_edp_3p3: &pp3300_left_in_mlb {};
0358
0359 /* Regulator overrides from Qcard */
0360
0361 /*
0362 * Herobrine boards only use l2c to power an external audio codec (like
0363 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
0364 */
0365 &vreg_l2c_1p8 {
0366 regulator-min-microvolt = <1800000>;
0367 };
0368
0369 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
0370
0371 &edp_panel {
0372 /* Our board provides power to the qcard for the eDP panel. */
0373 power-supply = <&vreg_edp_3p3>;
0374 };
0375
0376 ap_sar_sensor_i2c: &i2c1 {
0377 clock-frequency = <400000>;
0378 status = "disabled";
0379
0380 ap_sar_sensor0: proximity@28 {
0381 compatible = "semtech,sx9324";
0382 reg = <0x28>;
0383 #io-channel-cells = <1>;
0384 pinctrl-names = "default";
0385 pinctrl-0 = <&sar0_irq_odl>;
0386
0387 interrupt-parent = <&tlmm>;
0388 interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
0389
0390 vdd-supply = <&pp1800_prox>;
0391
0392 label = "proximity-wifi_cellular-0";
0393 status = "disabled";
0394 };
0395
0396 ap_sar_sensor1: proximity@2c {
0397 compatible = "semtech,sx9324";
0398 reg = <0x2c>;
0399 #io-channel-cells = <1>;
0400 pinctrl-names = "default";
0401 pinctrl-0 = <&sar1_irq_odl>;
0402
0403 interrupt-parent = <&tlmm>;
0404 interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
0405
0406 vdd-supply = <&pp1800_prox>;
0407
0408 label = "proximity-wifi_cellular-1";
0409 status = "disabled";
0410 };
0411 };
0412
0413 ap_i2c_tpm: &i2c14 {
0414 status = "okay";
0415 clock-frequency = <400000>;
0416
0417 tpm@50 {
0418 compatible = "google,cr50";
0419 reg = <0x50>;
0420
0421 pinctrl-names = "default";
0422 pinctrl-0 = <&gsc_ap_int_odl>;
0423
0424 interrupt-parent = <&tlmm>;
0425 interrupts = <104 IRQ_TYPE_EDGE_RISING>;
0426 };
0427 };
0428
0429 &mdss {
0430 status = "okay";
0431 };
0432
0433 &mdss_dp {
0434 status = "okay";
0435 pinctrl-names = "default";
0436 pinctrl-0 = <&dp_hot_plug_det>;
0437 data-lanes = <0 1>;
0438 };
0439
0440 &mdss_mdp {
0441 status = "okay";
0442 };
0443
0444 /* NVMe drive, enabled on a per-board basis */
0445 &pcie1 {
0446 pinctrl-names = "default";
0447 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
0448
0449 perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
0450 vddpe-3v3-supply = <&pp3300_ssd>;
0451 };
0452
0453 &pm8350c_pwm {
0454 status = "okay";
0455 };
0456
0457 &pm8350c_pwm_backlight {
0458 status = "okay";
0459
0460 /* Our board provides power to the qcard for the backlight */
0461 power-supply = <&vreg_edp_bl>;
0462 };
0463
0464 &pmk8350_rtc {
0465 status = "disabled";
0466 };
0467
0468 &qupv3_id_0 {
0469 status = "okay";
0470 };
0471
0472 &qupv3_id_1 {
0473 status = "okay";
0474 };
0475
0476 /* SD Card, enabled on a per-board basis */
0477 &sdhc_2 {
0478 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
0479 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
0480
0481 vmmc-supply = <&pp2950_l9c>;
0482 vqmmc-supply = <&ppvar_l6c>;
0483
0484 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
0485 };
0486
0487 &spi_flash {
0488 spi-max-frequency = <50000000>;
0489 };
0490
0491 /* Fingerprint, enabled on a per-board basis */
0492 ap_spi_fp: &spi9 {
0493 pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
0494
0495 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
0496
0497 cros_ec_fp: ec@0 {
0498 compatible = "google,cros-ec-spi";
0499 reg = <0>;
0500 interrupt-parent = <&tlmm>;
0501 interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
0502 pinctrl-names = "default";
0503 pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
0504 spi-max-frequency = <3000000>;
0505 };
0506 };
0507
0508 ap_ec_spi: &spi10 {
0509 status = "okay";
0510 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
0511
0512 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
0513
0514 cros_ec: ec@0 {
0515 compatible = "google,cros-ec-spi";
0516 reg = <0>;
0517 interrupt-parent = <&tlmm>;
0518 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
0519 pinctrl-names = "default";
0520 pinctrl-0 = <&ap_ec_int_l>;
0521 spi-max-frequency = <3000000>;
0522
0523 cros_ec_pwm: pwm {
0524 compatible = "google,cros-ec-pwm";
0525 #pwm-cells = <1>;
0526 };
0527
0528 i2c_tunnel: i2c-tunnel {
0529 compatible = "google,cros-ec-i2c-tunnel";
0530 google,remote-bus = <0>;
0531 #address-cells = <1>;
0532 #size-cells = <0>;
0533 };
0534
0535 typec {
0536 compatible = "google,cros-ec-typec";
0537 #address-cells = <1>;
0538 #size-cells = <0>;
0539
0540 usb_c0: connector@0 {
0541 compatible = "usb-c-connector";
0542 reg = <0>;
0543 label = "left";
0544 power-role = "dual";
0545 data-role = "host";
0546 try-power-role = "source";
0547 };
0548
0549 usb_c1: connector@1 {
0550 compatible = "usb-c-connector";
0551 reg = <1>;
0552 label = "right";
0553 power-role = "dual";
0554 data-role = "host";
0555 try-power-role = "source";
0556 };
0557 };
0558 };
0559 };
0560
0561 #include <arm/cros-ec-keyboard.dtsi>
0562 #include <arm/cros-ec-sbs.dtsi>
0563
0564 &keyboard_controller {
0565 function-row-physmap = <
0566 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
0567 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
0568 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
0569 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
0570 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
0571 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
0572 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
0573 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
0574 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
0575 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
0576 >;
0577 linux,keymap = <
0578 MATRIX_KEY(0x00, 0x02, KEY_BACK)
0579 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
0580 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
0581 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
0582 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
0583 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
0584 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
0585 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
0586 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
0587 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
0588
0589 CROS_STD_MAIN_KEYMAP
0590 >;
0591 };
0592
0593 &usb_1 {
0594 status = "okay";
0595 };
0596
0597 &usb_1_dwc3 {
0598 dr_mode = "host";
0599 };
0600
0601 &usb_1_hsphy {
0602 status = "okay";
0603 };
0604
0605 &usb_1_qmpphy {
0606 status = "okay";
0607 };
0608
0609 &usb_2 {
0610 status = "okay";
0611 };
0612
0613 &usb_2_dwc3 {
0614 dr_mode = "host";
0615 };
0616
0617 &usb_2_hsphy {
0618 status = "okay";
0619 };
0620
0621 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
0622
0623 &dp_hot_plug_det {
0624 bias-disable;
0625 };
0626
0627 &pcie1_clkreq_n {
0628 bias-pull-up;
0629 drive-strength = <2>;
0630 };
0631
0632 &qspi_cs0 {
0633 bias-disable;
0634 drive-strength = <8>;
0635 };
0636
0637 &qspi_clk {
0638 bias-disable;
0639 drive-strength = <8>;
0640 };
0641
0642 &qspi_data01 {
0643 /* High-Z when no transfers; nice to park the lines */
0644 bias-pull-up;
0645 drive-strength = <8>;
0646 };
0647
0648 /* For ap_tp_i2c */
0649 &qup_i2c0_data_clk {
0650 /* Has external pull */
0651 bias-disable;
0652 drive-strength = <2>;
0653 };
0654
0655 /* For ap_i2c_tpm */
0656 &qup_i2c14_data_clk {
0657 /* Has external pull */
0658 bias-disable;
0659 drive-strength = <2>;
0660 };
0661
0662 /* For ap_spi_fp */
0663 &qup_spi9_data_clk {
0664 bias-disable;
0665 drive-strength = <2>;
0666 };
0667
0668 /* For ap_spi_fp */
0669 &qup_spi9_cs_gpio {
0670 bias-disable;
0671 drive-strength = <2>;
0672 };
0673
0674 /* For ap_ec_spi */
0675 &qup_spi10_data_clk {
0676 bias-disable;
0677 drive-strength = <2>;
0678 };
0679
0680 /* For ap_ec_spi */
0681 &qup_spi10_cs_gpio {
0682 bias-disable;
0683 drive-strength = <2>;
0684 };
0685
0686 /* For uart_dbg */
0687 &qup_uart5_rx {
0688 bias-pull-up;
0689 };
0690
0691 /* For uart_dbg */
0692 &qup_uart5_tx {
0693 bias-disable;
0694 drive-strength = <2>;
0695 };
0696
0697 &sdc2_clk {
0698 bias-disable;
0699 drive-strength = <16>;
0700 };
0701
0702 &sdc2_cmd {
0703 bias-pull-up;
0704 drive-strength = <10>;
0705 };
0706
0707 &sdc2_data {
0708 bias-pull-up;
0709 drive-strength = <10>;
0710 };
0711
0712 /* PINCTRL - board-specific pinctrl */
0713
0714 &pm7325_gpios {
0715 /*
0716 * On a quick glance it might look like KYPD_VOL_UP_N is used, but
0717 * that only passes through to a debug connector and not to the actual
0718 * volume up key.
0719 */
0720 status = "disabled"; /* No GPIOs are connected */
0721 };
0722
0723 &pmk8350_gpios {
0724 status = "disabled"; /* No GPIOs are connected */
0725 };
0726
0727 &tlmm {
0728 /* pinctrl settings for pins that have no real owners. */
0729 pinctrl-names = "default";
0730 pinctrl-0 = <&bios_flash_wp_od>;
0731
0732 amp_en: amp-en {
0733 pins = "gpio63";
0734 function = "gpio";
0735 bias-disable;
0736 drive-strength = <2>;
0737 };
0738
0739 ap_ec_int_l: ap-ec-int-l {
0740 pins = "gpio18";
0741 function = "gpio";
0742 bias-pull-up;
0743 };
0744
0745 bios_flash_wp_od: bios-flash-wp-od {
0746 pins = "gpio16";
0747 function = "gpio";
0748 /* Has external pull */
0749 bias-disable;
0750 };
0751
0752 en_fp_rails: en-fp-rails {
0753 pins = "gpio77";
0754 function = "gpio";
0755 bias-disable;
0756 drive-strength = <2>;
0757 output-high;
0758 };
0759
0760 en_pp3300_codec: en-pp3300-codec {
0761 pins = "gpio105";
0762 function = "gpio";
0763 bias-disable;
0764 drive-strength = <2>;
0765 };
0766
0767 en_pp3300_dx_edp: en-pp3300-dx-edp {
0768 pins = "gpio80";
0769 function = "gpio";
0770 bias-disable;
0771 drive-strength = <2>;
0772 };
0773
0774 fp_rst_l: fp-rst-l {
0775 pins = "gpio78";
0776 function = "gpio";
0777 bias-disable;
0778 drive-strength = <2>;
0779 };
0780
0781 fp_to_ap_irq_l: fp-to-ap-irq-l {
0782 pins = "gpio61";
0783 function = "gpio";
0784 /* Has external pullup */
0785 bias-disable;
0786 };
0787
0788 fpmcu_boot0: fpmcu-boot0 {
0789 pins = "gpio68";
0790 function = "gpio";
0791 bias-disable;
0792 };
0793
0794 gsc_ap_int_odl: gsc-ap-int-odl {
0795 pins = "gpio104";
0796 function = "gpio";
0797 bias-pull-up;
0798 };
0799
0800 hp_irq: hp-irq {
0801 pins = "gpio101";
0802 function = "gpio";
0803 bias-pull-up;
0804 };
0805
0806 hub_en: hub-en {
0807 pins = "gpio157";
0808 function = "gpio";
0809 bias-disable;
0810 drive-strength = <2>;
0811 };
0812
0813 pe_wake_odl: pe-wake-odl {
0814 pins = "gpio3";
0815 function = "gpio";
0816 /* Has external pull */
0817 bias-disable;
0818 drive-strength = <2>;
0819 };
0820
0821 /* For ap_spi_fp */
0822 qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high {
0823 pins = "gpio39";
0824 function = "gpio";
0825 output-high;
0826 };
0827
0828 /* For ap_ec_spi */
0829 qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high {
0830 pins = "gpio43";
0831 function = "gpio";
0832 output-high;
0833 };
0834
0835 sar0_irq_odl: sar0-irq-odl {
0836 pins = "gpio141";
0837 function = "gpio";
0838 bias-pull-up;
0839 };
0840
0841 sar1_irq_odl: sar1-irq-odl {
0842 pins = "gpio140";
0843 function = "gpio";
0844 bias-pull-up;
0845 };
0846
0847 sd_cd_odl: sd-cd-odl {
0848 pins = "gpio91";
0849 function = "gpio";
0850 bias-pull-up;
0851 };
0852
0853 ssd_en: ssd-en {
0854 pins = "gpio51";
0855 function = "gpio";
0856 bias-disable;
0857 drive-strength = <2>;
0858 };
0859
0860 ssd_rst_l: ssd-rst-l {
0861 pins = "gpio2";
0862 function = "gpio";
0863 bias-disable;
0864 drive-strength = <2>;
0865 output-low;
0866 };
0867
0868 tp_int_odl: tp-int-odl {
0869 pins = "gpio7";
0870 function = "gpio";
0871 /* Has external pullup */
0872 bias-disable;
0873 };
0874
0875 wf_cam_en: wf-cam-en {
0876 pins = "gpio119";
0877 function = "gpio";
0878 /* Has external pulldown */
0879 bias-disable;
0880 drive-strength = <2>;
0881 };
0882 };
