0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Google Villager board device tree source
0004 *
0005 * Copyright 2022 Google LLC.
0006 */
0007
0008 /dts-v1/;
0009
0010 #include "sc7280-herobrine.dtsi"
0011
0012 / {
0013 model = "Google Villager (rev0+)";
0014 compatible = "google,villager", "qcom,sc7280";
0015 };
0016
0017 /*
0018 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
0019 *
0020 * Sort order matches the order in the parent files (parents before children).
0021 */
0022
0023 &pp3300_codec {
0024 status = "okay";
0025 };
0026
0027 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
0028
0029 ap_tp_i2c: &i2c0 {
0030 status = "okay";
0031 clock-frequency = <400000>;
0032
0033 trackpad: trackpad@2c {
0034 compatible = "hid-over-i2c";
0035 reg = <0x2c>;
0036 pinctrl-names = "default";
0037 pinctrl-0 = <&tp_int_odl>;
0038
0039 interrupt-parent = <&tlmm>;
0040 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
0041
0042 hid-descr-addr = <0x20>;
0043 vcc-supply = <&pp3300_z1>;
0044
0045 wakeup-source;
0046 };
0047 };
0048
0049 ts_i2c: &i2c13 {
0050 status = "okay";
0051 clock-frequency = <400000>;
0052
0053 ap_ts: touchscreen@10 {
0054 compatible = "elan,ekth6915";
0055 reg = <0x10>;
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
0058
0059 interrupt-parent = <&tlmm>;
0060 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
0061
0062 reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
0063
0064 vcc33-supply = <&ts_avdd>;
0065 };
0066 };
0067
0068 &ap_sar_sensor_i2c {
0069 status = "okay";
0070 };
0071
0072 &ap_sar_sensor0 {
0073 status = "okay";
0074 };
0075
0076 &ap_sar_sensor1 {
0077 status = "okay";
0078 };
0079
0080 &mdss_edp {
0081 status = "okay";
0082 };
0083
0084 &mdss_edp_phy {
0085 status = "okay";
0086 };
0087
0088 /* For nvme */
0089 &pcie1 {
0090 status = "okay";
0091 };
0092
0093 /* For nvme */
0094 &pcie1_phy {
0095 status = "okay";
0096 };
0097
0098 &pwmleds {
0099 status = "okay";
0100 };
0101
0102 /* For eMMC */
0103 &sdhc_1 {
0104 status = "okay";
0105 };
0106
0107 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
0108
0109 &ts_rst_conn {
0110 bias-disable;
0111 };
0112
0113 /* PINCTRL - BOARD-SPECIFIC */
0114
0115 /*
0116 * Methodology for gpio-line-names:
0117 * - If a pin goes to herobrine board and is named it gets that name.
0118 * - If a pin goes to herobrine board and is not named, it gets no name.
0119 * - If a pin is totally internal to Qcard then it gets Qcard name.
0120 * - If a pin is not hooked up on Qcard, it gets no name.
0121 */
0122
0123 &pm8350c_gpios {
0124 gpio-line-names = "FLASH_STROBE_1", /* 1 */
0125 "AP_SUSPEND",
0126 "PM8008_1_RST_N",
0127 "",
0128 "",
0129 "",
0130 "PMIC_EDP_BL_EN",
0131 "PMIC_EDP_BL_PWM",
0132 "";
0133 };
0134
0135 &tlmm {
0136 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
0137 "AP_TP_I2C_SCL",
0138 "SSD_RST_L",
0139 "PE_WAKE_ODL",
0140 "AP_SAR_SDA",
0141 "AP_SAR_SCL",
0142 "PRB_SC_GPIO_6",
0143 "TP_INT_ODL",
0144 "HP_I2C_SDA",
0145 "HP_I2C_SCL",
0146
0147 "GNSS_L1_EN", /* 10 */
0148 "GNSS_L5_EN",
0149 "SPI_AP_MOSI",
0150 "SPI_AP_MISO",
0151 "SPI_AP_CLK",
0152 "SPI_AP_CS0_L",
0153 /*
0154 * AP_FLASH_WP is crossystem ABI. Schematics
0155 * call it BIOS_FLASH_WP_OD.
0156 */
0157 "AP_FLASH_WP",
0158 "",
0159 "AP_EC_INT_L",
0160 "",
0161
0162 "UF_CAM_RST_L", /* 20 */
0163 "WF_CAM_RST_L",
0164 "UART_AP_TX_DBG_RX",
0165 "UART_DBG_TX_AP_RX",
0166 "",
0167 "PM8008_IRQ_1",
0168 "HOST2WLAN_SOL",
0169 "WLAN2HOST_SOL",
0170 "MOS_BT_UART_CTS",
0171 "MOS_BT_UART_RFR",
0172
0173 "MOS_BT_UART_TX", /* 30 */
0174 "MOS_BT_UART_RX",
0175 "PRB_SC_GPIO_32",
0176 "HUB_RST_L",
0177 "",
0178 "",
0179 "AP_SPI_FP_MISO",
0180 "AP_SPI_FP_MOSI",
0181 "AP_SPI_FP_CLK",
0182 "AP_SPI_FP_CS_L",
0183
0184 "AP_EC_SPI_MISO", /* 40 */
0185 "AP_EC_SPI_MOSI",
0186 "AP_EC_SPI_CLK",
0187 "AP_EC_SPI_CS_L",
0188 "LCM_RST_L",
0189 "EARLY_EUD_N",
0190 "",
0191 "DP_HOT_PLUG_DET",
0192 "IO_BRD_MLB_ID0",
0193 "IO_BRD_MLB_ID1",
0194
0195 "IO_BRD_MLB_ID2", /* 50 */
0196 "SSD_EN",
0197 "TS_I2C_SDA_CONN",
0198 "TS_I2C_CLK_CONN",
0199 "TS_RST_CONN",
0200 "TS_INT_CONN",
0201 "AP_I2C_TPM_SDA",
0202 "AP_I2C_TPM_SCL",
0203 "PRB_SC_GPIO_58",
0204 "PRB_SC_GPIO_59",
0205
0206 "EDP_HOT_PLUG_DET_N", /* 60 */
0207 "FP_TO_AP_IRQ_L",
0208 "",
0209 "AMP_EN",
0210 "CAM0_MCLK_GPIO_64",
0211 "CAM1_MCLK_GPIO_65",
0212 "WF_CAM_MCLK",
0213 "PRB_SC_GPIO_67",
0214 "FPMCU_BOOT0",
0215 "UF_CAM_SDA",
0216
0217 "UF_CAM_SCL", /* 70 */
0218 "",
0219 "",
0220 "WF_CAM_SDA",
0221 "WF_CAM_SCL",
0222 "",
0223 "",
0224 "EN_FP_RAILS",
0225 "FP_RST_L",
0226 "PCIE1_CLKREQ_ODL",
0227
0228 "EN_PP3300_DX_EDP", /* 80 */
0229 "SC_GPIO_81",
0230 "FORCED_USB_BOOT",
0231 "WCD_RESET_N",
0232 "MOS_WLAN_EN",
0233 "MOS_BT_EN",
0234 "MOS_SW_CTRL",
0235 "MOS_PCIE0_RST",
0236 "MOS_PCIE0_CLKREQ_N",
0237 "MOS_PCIE0_WAKE_N",
0238
0239 "MOS_LAA_AS_EN", /* 90 */
0240 "SD_CD_ODL",
0241 "",
0242 "",
0243 "MOS_BT_WLAN_SLIMBUS_CLK",
0244 "MOS_BT_WLAN_SLIMBUS_DAT0",
0245 "HP_MCLK",
0246 "HP_BCLK",
0247 "HP_DOUT",
0248 "HP_DIN",
0249
0250 "HP_LRCLK", /* 100 */
0251 "HP_IRQ",
0252 "",
0253 "",
0254 "GSC_AP_INT_ODL",
0255 "EN_PP3300_CODEC",
0256 "AMP_BCLK",
0257 "AMP_DIN",
0258 "AMP_LRCLK",
0259 "UIM1_DATA_GPIO_109",
0260
0261 "UIM1_CLK_GPIO_110", /* 110 */
0262 "UIM1_RESET_GPIO_111",
0263 "PRB_SC_GPIO_112",
0264 "UIM0_DATA",
0265 "UIM0_CLK",
0266 "UIM0_RST",
0267 "UIM0_PRESENT_ODL",
0268 "SDM_RFFE0_CLK",
0269 "SDM_RFFE0_DATA",
0270 "WF_CAM_EN",
0271
0272 "FASTBOOT_SEL_0", /* 120 */
0273 "SC_GPIO_121",
0274 "FASTBOOT_SEL_1",
0275 "SC_GPIO_123",
0276 "FASTBOOT_SEL_2",
0277 "SM_RFFE4_CLK_GRFC_8",
0278 "SM_RFFE4_DATA_GRFC_9",
0279 "WLAN_COEX_UART1_RX",
0280 "WLAN_COEX_UART1_TX",
0281 "PRB_SC_GPIO_129",
0282
0283 "LCM_ID0", /* 130 */
0284 "LCM_ID1",
0285 "",
0286 "SDR_QLINK_REQ",
0287 "SDR_QLINK_EN",
0288 "QLINK0_WMSS_RESET_N",
0289 "SMR526_QLINK1_REQ",
0290 "SMR526_QLINK1_EN",
0291 "SMR526_QLINK1_WMSS_RESET_N",
0292 "PRB_SC_GPIO_139",
0293
0294 "SAR1_IRQ_ODL", /* 140 */
0295 "SAR0_IRQ_ODL",
0296 "PRB_SC_GPIO_142",
0297 "",
0298 "WCD_SWR_TX_CLK",
0299 "WCD_SWR_TX_DATA0",
0300 "WCD_SWR_TX_DATA1",
0301 "WCD_SWR_RX_CLK",
0302 "WCD_SWR_RX_DATA0",
0303 "WCD_SWR_RX_DATA1",
0304
0305 "DMIC01_CLK", /* 150 */
0306 "DMIC01_DATA",
0307 "DMIC23_CLK",
0308 "DMIC23_DATA",
0309 "",
0310 "",
0311 "EC_IN_RW_ODL",
0312 "HUB_EN",
0313 "WCD_SWR_TX_DATA2",
0314 "",
0315
0316 "", /* 160 */
0317 "",
0318 "",
0319 "",
0320 "",
0321 "",
0322 "",
0323 "",
0324 "",
0325 "",
0326
0327 "", /* 170 */
0328 "MOS_BLE_UART_TX",
0329 "MOS_BLE_UART_RX",
0330 "",
0331 "",
0332 "";
0333 };
