0001 // SPDX-License-Identifier: GPL-2.0
0002 /dts-v1/;
0003
0004 #include <dt-bindings/input/linux-event-codes.h>
0005 #include <dt-bindings/input/gpio-keys.h>
0006
0007 #include "tegra194-p2888.dtsi"
0008
0009 / {
0010 model = "NVIDIA Jetson AGX Xavier Developer Kit";
0011 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
0012
0013 bus@0 {
0014 aconnect@2900000 {
0015 status = "okay";
0016
0017 dma-controller@2930000 {
0018 status = "okay";
0019 };
0020
0021 interrupt-controller@2a40000 {
0022 status = "okay";
0023 };
0024
0025 ahub@2900800 {
0026 status = "okay";
0027
0028 ports {
0029 #address-cells = <1>;
0030 #size-cells = <0>;
0031
0032 port@0 {
0033 reg = <0x0>;
0034
0035 xbar_admaif0_ep: endpoint {
0036 remote-endpoint = <&admaif0_ep>;
0037 };
0038 };
0039
0040 port@1 {
0041 reg = <0x1>;
0042
0043 xbar_admaif1_ep: endpoint {
0044 remote-endpoint = <&admaif1_ep>;
0045 };
0046 };
0047
0048 port@2 {
0049 reg = <0x2>;
0050
0051 xbar_admaif2_ep: endpoint {
0052 remote-endpoint = <&admaif2_ep>;
0053 };
0054 };
0055
0056 port@3 {
0057 reg = <0x3>;
0058
0059 xbar_admaif3_ep: endpoint {
0060 remote-endpoint = <&admaif3_ep>;
0061 };
0062 };
0063
0064 port@4 {
0065 reg = <0x4>;
0066
0067 xbar_admaif4_ep: endpoint {
0068 remote-endpoint = <&admaif4_ep>;
0069 };
0070 };
0071
0072 port@5 {
0073 reg = <0x5>;
0074
0075 xbar_admaif5_ep: endpoint {
0076 remote-endpoint = <&admaif5_ep>;
0077 };
0078 };
0079
0080 port@6 {
0081 reg = <0x6>;
0082
0083 xbar_admaif6_ep: endpoint {
0084 remote-endpoint = <&admaif6_ep>;
0085 };
0086 };
0087
0088 port@7 {
0089 reg = <0x7>;
0090
0091 xbar_admaif7_ep: endpoint {
0092 remote-endpoint = <&admaif7_ep>;
0093 };
0094 };
0095
0096 port@8 {
0097 reg = <0x8>;
0098
0099 xbar_admaif8_ep: endpoint {
0100 remote-endpoint = <&admaif8_ep>;
0101 };
0102 };
0103
0104 port@9 {
0105 reg = <0x9>;
0106
0107 xbar_admaif9_ep: endpoint {
0108 remote-endpoint = <&admaif9_ep>;
0109 };
0110 };
0111
0112 port@a {
0113 reg = <0xa>;
0114
0115 xbar_admaif10_ep: endpoint {
0116 remote-endpoint = <&admaif10_ep>;
0117 };
0118 };
0119
0120 port@b {
0121 reg = <0xb>;
0122
0123 xbar_admaif11_ep: endpoint {
0124 remote-endpoint = <&admaif11_ep>;
0125 };
0126 };
0127
0128 port@c {
0129 reg = <0xc>;
0130
0131 xbar_admaif12_ep: endpoint {
0132 remote-endpoint = <&admaif12_ep>;
0133 };
0134 };
0135
0136 port@d {
0137 reg = <0xd>;
0138
0139 xbar_admaif13_ep: endpoint {
0140 remote-endpoint = <&admaif13_ep>;
0141 };
0142 };
0143
0144 port@e {
0145 reg = <0xe>;
0146
0147 xbar_admaif14_ep: endpoint {
0148 remote-endpoint = <&admaif14_ep>;
0149 };
0150 };
0151
0152 port@f {
0153 reg = <0xf>;
0154
0155 xbar_admaif15_ep: endpoint {
0156 remote-endpoint = <&admaif15_ep>;
0157 };
0158 };
0159
0160 port@10 {
0161 reg = <0x10>;
0162
0163 xbar_admaif16_ep: endpoint {
0164 remote-endpoint = <&admaif16_ep>;
0165 };
0166 };
0167
0168 port@11 {
0169 reg = <0x11>;
0170
0171 xbar_admaif17_ep: endpoint {
0172 remote-endpoint = <&admaif17_ep>;
0173 };
0174 };
0175
0176 port@12 {
0177 reg = <0x12>;
0178
0179 xbar_admaif18_ep: endpoint {
0180 remote-endpoint = <&admaif18_ep>;
0181 };
0182 };
0183
0184 port@13 {
0185 reg = <0x13>;
0186
0187 xbar_admaif19_ep: endpoint {
0188 remote-endpoint = <&admaif19_ep>;
0189 };
0190 };
0191
0192 xbar_i2s1_port: port@14 {
0193 reg = <0x14>;
0194
0195 xbar_i2s1_ep: endpoint {
0196 remote-endpoint = <&i2s1_cif_ep>;
0197 };
0198 };
0199
0200 xbar_i2s2_port: port@15 {
0201 reg = <0x15>;
0202
0203 xbar_i2s2_ep: endpoint {
0204 remote-endpoint = <&i2s2_cif_ep>;
0205 };
0206 };
0207
0208 xbar_i2s4_port: port@17 {
0209 reg = <0x17>;
0210
0211 xbar_i2s4_ep: endpoint {
0212 remote-endpoint = <&i2s4_cif_ep>;
0213 };
0214 };
0215
0216 xbar_i2s6_port: port@19 {
0217 reg = <0x19>;
0218
0219 xbar_i2s6_ep: endpoint {
0220 remote-endpoint = <&i2s6_cif_ep>;
0221 };
0222 };
0223
0224 xbar_dmic3_port: port@1c {
0225 reg = <0x1c>;
0226
0227 xbar_dmic3_ep: endpoint {
0228 remote-endpoint = <&dmic3_cif_ep>;
0229 };
0230 };
0231
0232 xbar_sfc1_in_port: port@20 {
0233 reg = <0x20>;
0234
0235 xbar_sfc1_in_ep: endpoint {
0236 remote-endpoint = <&sfc1_cif_in_ep>;
0237 };
0238 };
0239
0240 port@21 {
0241 reg = <0x21>;
0242
0243 xbar_sfc1_out_ep: endpoint {
0244 remote-endpoint = <&sfc1_cif_out_ep>;
0245 };
0246 };
0247
0248 xbar_sfc2_in_port: port@22 {
0249 reg = <0x22>;
0250
0251 xbar_sfc2_in_ep: endpoint {
0252 remote-endpoint = <&sfc2_cif_in_ep>;
0253 };
0254 };
0255
0256 port@23 {
0257 reg = <0x23>;
0258
0259 xbar_sfc2_out_ep: endpoint {
0260 remote-endpoint = <&sfc2_cif_out_ep>;
0261 };
0262 };
0263
0264 xbar_sfc3_in_port: port@24 {
0265 reg = <0x24>;
0266
0267 xbar_sfc3_in_ep: endpoint {
0268 remote-endpoint = <&sfc3_cif_in_ep>;
0269 };
0270 };
0271
0272 port@25 {
0273 reg = <0x25>;
0274
0275 xbar_sfc3_out_ep: endpoint {
0276 remote-endpoint = <&sfc3_cif_out_ep>;
0277 };
0278 };
0279
0280 xbar_sfc4_in_port: port@26 {
0281 reg = <0x26>;
0282
0283 xbar_sfc4_in_ep: endpoint {
0284 remote-endpoint = <&sfc4_cif_in_ep>;
0285 };
0286 };
0287
0288 port@27 {
0289 reg = <0x27>;
0290
0291 xbar_sfc4_out_ep: endpoint {
0292 remote-endpoint = <&sfc4_cif_out_ep>;
0293 };
0294 };
0295
0296 xbar_mvc1_in_port: port@28 {
0297 reg = <0x28>;
0298
0299 xbar_mvc1_in_ep: endpoint {
0300 remote-endpoint = <&mvc1_cif_in_ep>;
0301 };
0302 };
0303
0304 port@29 {
0305 reg = <0x29>;
0306
0307 xbar_mvc1_out_ep: endpoint {
0308 remote-endpoint = <&mvc1_cif_out_ep>;
0309 };
0310 };
0311
0312 xbar_mvc2_in_port: port@2a {
0313 reg = <0x2a>;
0314
0315 xbar_mvc2_in_ep: endpoint {
0316 remote-endpoint = <&mvc2_cif_in_ep>;
0317 };
0318 };
0319
0320 port@2b {
0321 reg = <0x2b>;
0322
0323 xbar_mvc2_out_ep: endpoint {
0324 remote-endpoint = <&mvc2_cif_out_ep>;
0325 };
0326 };
0327
0328 xbar_amx1_in1_port: port@2c {
0329 reg = <0x2c>;
0330
0331 xbar_amx1_in1_ep: endpoint {
0332 remote-endpoint = <&amx1_in1_ep>;
0333 };
0334 };
0335
0336 xbar_amx1_in2_port: port@2d {
0337 reg = <0x2d>;
0338
0339 xbar_amx1_in2_ep: endpoint {
0340 remote-endpoint = <&amx1_in2_ep>;
0341 };
0342 };
0343
0344 xbar_amx1_in3_port: port@2e {
0345 reg = <0x2e>;
0346
0347 xbar_amx1_in3_ep: endpoint {
0348 remote-endpoint = <&amx1_in3_ep>;
0349 };
0350 };
0351
0352 xbar_amx1_in4_port: port@2f {
0353 reg = <0x2f>;
0354
0355 xbar_amx1_in4_ep: endpoint {
0356 remote-endpoint = <&amx1_in4_ep>;
0357 };
0358 };
0359
0360 port@30 {
0361 reg = <0x30>;
0362
0363 xbar_amx1_out_ep: endpoint {
0364 remote-endpoint = <&amx1_out_ep>;
0365 };
0366 };
0367
0368 xbar_amx2_in1_port: port@31 {
0369 reg = <0x31>;
0370
0371 xbar_amx2_in1_ep: endpoint {
0372 remote-endpoint = <&amx2_in1_ep>;
0373 };
0374 };
0375
0376 xbar_amx2_in2_port: port@32 {
0377 reg = <0x32>;
0378
0379 xbar_amx2_in2_ep: endpoint {
0380 remote-endpoint = <&amx2_in2_ep>;
0381 };
0382 };
0383
0384 xbar_amx2_in3_port: port@33 {
0385 reg = <0x33>;
0386
0387 xbar_amx2_in3_ep: endpoint {
0388 remote-endpoint = <&amx2_in3_ep>;
0389 };
0390 };
0391
0392 xbar_amx2_in4_port: port@34 {
0393 reg = <0x34>;
0394
0395 xbar_amx2_in4_ep: endpoint {
0396 remote-endpoint = <&amx2_in4_ep>;
0397 };
0398 };
0399
0400 port@35 {
0401 reg = <0x35>;
0402
0403 xbar_amx2_out_ep: endpoint {
0404 remote-endpoint = <&amx2_out_ep>;
0405 };
0406 };
0407
0408 xbar_amx3_in1_port: port@36 {
0409 reg = <0x36>;
0410
0411 xbar_amx3_in1_ep: endpoint {
0412 remote-endpoint = <&amx3_in1_ep>;
0413 };
0414 };
0415
0416 xbar_amx3_in2_port: port@37 {
0417 reg = <0x37>;
0418
0419 xbar_amx3_in2_ep: endpoint {
0420 remote-endpoint = <&amx3_in2_ep>;
0421 };
0422 };
0423
0424 xbar_amx3_in3_port: port@38 {
0425 reg = <0x38>;
0426
0427 xbar_amx3_in3_ep: endpoint {
0428 remote-endpoint = <&amx3_in3_ep>;
0429 };
0430 };
0431
0432 xbar_amx3_in4_port: port@39 {
0433 reg = <0x39>;
0434
0435 xbar_amx3_in4_ep: endpoint {
0436 remote-endpoint = <&amx3_in4_ep>;
0437 };
0438 };
0439
0440 port@3a {
0441 reg = <0x3a>;
0442
0443 xbar_amx3_out_ep: endpoint {
0444 remote-endpoint = <&amx3_out_ep>;
0445 };
0446 };
0447
0448 xbar_amx4_in1_port: port@3b {
0449 reg = <0x3b>;
0450
0451 xbar_amx4_in1_ep: endpoint {
0452 remote-endpoint = <&amx4_in1_ep>;
0453 };
0454 };
0455
0456 xbar_amx4_in2_port: port@3c {
0457 reg = <0x3c>;
0458
0459 xbar_amx4_in2_ep: endpoint {
0460 remote-endpoint = <&amx4_in2_ep>;
0461 };
0462 };
0463
0464 xbar_amx4_in3_port: port@3d {
0465 reg = <0x3d>;
0466
0467 xbar_amx4_in3_ep: endpoint {
0468 remote-endpoint = <&amx4_in3_ep>;
0469 };
0470 };
0471
0472 xbar_amx4_in4_port: port@3e {
0473 reg = <0x3e>;
0474
0475 xbar_amx4_in4_ep: endpoint {
0476 remote-endpoint = <&amx4_in4_ep>;
0477 };
0478 };
0479
0480 port@3f {
0481 reg = <0x3f>;
0482
0483 xbar_amx4_out_ep: endpoint {
0484 remote-endpoint = <&amx4_out_ep>;
0485 };
0486 };
0487
0488 xbar_adx1_in_port: port@40 {
0489 reg = <0x40>;
0490
0491 xbar_adx1_in_ep: endpoint {
0492 remote-endpoint = <&adx1_in_ep>;
0493 };
0494 };
0495
0496 port@41 {
0497 reg = <0x41>;
0498
0499 xbar_adx1_out1_ep: endpoint {
0500 remote-endpoint = <&adx1_out1_ep>;
0501 };
0502 };
0503
0504 port@42 {
0505 reg = <0x42>;
0506
0507 xbar_adx1_out2_ep: endpoint {
0508 remote-endpoint = <&adx1_out2_ep>;
0509 };
0510 };
0511
0512 port@43 {
0513 reg = <0x43>;
0514
0515 xbar_adx1_out3_ep: endpoint {
0516 remote-endpoint = <&adx1_out3_ep>;
0517 };
0518 };
0519
0520 port@44 {
0521 reg = <0x44>;
0522
0523 xbar_adx1_out4_ep: endpoint {
0524 remote-endpoint = <&adx1_out4_ep>;
0525 };
0526 };
0527
0528 xbar_adx2_in_port: port@45 {
0529 reg = <0x45>;
0530
0531 xbar_adx2_in_ep: endpoint {
0532 remote-endpoint = <&adx2_in_ep>;
0533 };
0534 };
0535
0536 port@46 {
0537 reg = <0x46>;
0538
0539 xbar_adx2_out1_ep: endpoint {
0540 remote-endpoint = <&adx2_out1_ep>;
0541 };
0542 };
0543
0544 port@47 {
0545 reg = <0x47>;
0546
0547 xbar_adx2_out2_ep: endpoint {
0548 remote-endpoint = <&adx2_out2_ep>;
0549 };
0550 };
0551
0552 port@48 {
0553 reg = <0x48>;
0554
0555 xbar_adx2_out3_ep: endpoint {
0556 remote-endpoint = <&adx2_out3_ep>;
0557 };
0558 };
0559
0560 port@49 {
0561 reg = <0x49>;
0562
0563 xbar_adx2_out4_ep: endpoint {
0564 remote-endpoint = <&adx2_out4_ep>;
0565 };
0566 };
0567
0568 xbar_adx3_in_port: port@4a {
0569 reg = <0x4a>;
0570
0571 xbar_adx3_in_ep: endpoint {
0572 remote-endpoint = <&adx3_in_ep>;
0573 };
0574 };
0575
0576 port@4b {
0577 reg = <0x4b>;
0578
0579 xbar_adx3_out1_ep: endpoint {
0580 remote-endpoint = <&adx3_out1_ep>;
0581 };
0582 };
0583
0584 port@4c {
0585 reg = <0x4c>;
0586
0587 xbar_adx3_out2_ep: endpoint {
0588 remote-endpoint = <&adx3_out2_ep>;
0589 };
0590 };
0591
0592 port@4d {
0593 reg = <0x4d>;
0594
0595 xbar_adx3_out3_ep: endpoint {
0596 remote-endpoint = <&adx3_out3_ep>;
0597 };
0598 };
0599
0600 port@4e {
0601 reg = <0x4e>;
0602
0603 xbar_adx3_out4_ep: endpoint {
0604 remote-endpoint = <&adx3_out4_ep>;
0605 };
0606 };
0607
0608 xbar_adx4_in_port: port@4f {
0609 reg = <0x4f>;
0610
0611 xbar_adx4_in_ep: endpoint {
0612 remote-endpoint = <&adx4_in_ep>;
0613 };
0614 };
0615
0616 port@50 {
0617 reg = <0x50>;
0618
0619 xbar_adx4_out1_ep: endpoint {
0620 remote-endpoint = <&adx4_out1_ep>;
0621 };
0622 };
0623
0624 port@51 {
0625 reg = <0x51>;
0626
0627 xbar_adx4_out2_ep: endpoint {
0628 remote-endpoint = <&adx4_out2_ep>;
0629 };
0630 };
0631
0632 port@52 {
0633 reg = <0x52>;
0634
0635 xbar_adx4_out3_ep: endpoint {
0636 remote-endpoint = <&adx4_out3_ep>;
0637 };
0638 };
0639
0640 port@53 {
0641 reg = <0x53>;
0642
0643 xbar_adx4_out4_ep: endpoint {
0644 remote-endpoint = <&adx4_out4_ep>;
0645 };
0646 };
0647
0648 xbar_mixer_in1_port: port@54 {
0649 reg = <0x54>;
0650
0651 xbar_mixer_in1_ep: endpoint {
0652 remote-endpoint = <&mixer_in1_ep>;
0653 };
0654 };
0655
0656 xbar_mixer_in2_port: port@55 {
0657 reg = <0x55>;
0658
0659 xbar_mixer_in2_ep: endpoint {
0660 remote-endpoint = <&mixer_in2_ep>;
0661 };
0662 };
0663
0664 xbar_mixer_in3_port: port@56 {
0665 reg = <0x56>;
0666
0667 xbar_mixer_in3_ep: endpoint {
0668 remote-endpoint = <&mixer_in3_ep>;
0669 };
0670 };
0671
0672 xbar_mixer_in4_port: port@57 {
0673 reg = <0x57>;
0674
0675 xbar_mixer_in4_ep: endpoint {
0676 remote-endpoint = <&mixer_in4_ep>;
0677 };
0678 };
0679
0680 xbar_mixer_in5_port: port@58 {
0681 reg = <0x58>;
0682
0683 xbar_mixer_in5_ep: endpoint {
0684 remote-endpoint = <&mixer_in5_ep>;
0685 };
0686 };
0687
0688 xbar_mixer_in6_port: port@59 {
0689 reg = <0x59>;
0690
0691 xbar_mixer_in6_ep: endpoint {
0692 remote-endpoint = <&mixer_in6_ep>;
0693 };
0694 };
0695
0696 xbar_mixer_in7_port: port@5a {
0697 reg = <0x5a>;
0698
0699 xbar_mixer_in7_ep: endpoint {
0700 remote-endpoint = <&mixer_in7_ep>;
0701 };
0702 };
0703
0704 xbar_mixer_in8_port: port@5b {
0705 reg = <0x5b>;
0706
0707 xbar_mixer_in8_ep: endpoint {
0708 remote-endpoint = <&mixer_in8_ep>;
0709 };
0710 };
0711
0712 xbar_mixer_in9_port: port@5c {
0713 reg = <0x5c>;
0714
0715 xbar_mixer_in9_ep: endpoint {
0716 remote-endpoint = <&mixer_in9_ep>;
0717 };
0718 };
0719
0720 xbar_mixer_in10_port: port@5d {
0721 reg = <0x5d>;
0722
0723 xbar_mixer_in10_ep: endpoint {
0724 remote-endpoint = <&mixer_in10_ep>;
0725 };
0726 };
0727
0728 port@5e {
0729 reg = <0x5e>;
0730
0731 xbar_mixer_out1_ep: endpoint {
0732 remote-endpoint = <&mixer_out1_ep>;
0733 };
0734 };
0735
0736 port@5f {
0737 reg = <0x5f>;
0738
0739 xbar_mixer_out2_ep: endpoint {
0740 remote-endpoint = <&mixer_out2_ep>;
0741 };
0742 };
0743
0744 port@60 {
0745 reg = <0x60>;
0746
0747 xbar_mixer_out3_ep: endpoint {
0748 remote-endpoint = <&mixer_out3_ep>;
0749 };
0750 };
0751
0752 port@61 {
0753 reg = <0x61>;
0754
0755 xbar_mixer_out4_ep: endpoint {
0756 remote-endpoint = <&mixer_out4_ep>;
0757 };
0758 };
0759
0760 port@62 {
0761 reg = <0x62>;
0762
0763 xbar_mixer_out5_ep: endpoint {
0764 remote-endpoint = <&mixer_out5_ep>;
0765 };
0766 };
0767
0768 xbar_asrc_in1_port: port@63 {
0769 reg = <0x63>;
0770
0771 xbar_asrc_in1_ep: endpoint {
0772 remote-endpoint = <&asrc_in1_ep>;
0773 };
0774 };
0775
0776 port@64 {
0777 reg = <0x64>;
0778
0779 xbar_asrc_out1_ep: endpoint {
0780 remote-endpoint = <&asrc_out1_ep>;
0781 };
0782 };
0783
0784 xbar_asrc_in2_port: port@65 {
0785 reg = <0x65>;
0786
0787 xbar_asrc_in2_ep: endpoint {
0788 remote-endpoint = <&asrc_in2_ep>;
0789 };
0790 };
0791
0792 port@66 {
0793 reg = <0x66>;
0794
0795 xbar_asrc_out2_ep: endpoint {
0796 remote-endpoint = <&asrc_out2_ep>;
0797 };
0798 };
0799
0800 xbar_asrc_in3_port: port@67 {
0801 reg = <0x67>;
0802
0803 xbar_asrc_in3_ep: endpoint {
0804 remote-endpoint = <&asrc_in3_ep>;
0805 };
0806 };
0807
0808 port@68 {
0809 reg = <0x68>;
0810
0811 xbar_asrc_out3_ep: endpoint {
0812 remote-endpoint = <&asrc_out3_ep>;
0813 };
0814 };
0815
0816 xbar_asrc_in4_port: port@69 {
0817 reg = <0x69>;
0818
0819 xbar_asrc_in4_ep: endpoint {
0820 remote-endpoint = <&asrc_in4_ep>;
0821 };
0822 };
0823
0824 port@6a {
0825 reg = <0x6a>;
0826
0827 xbar_asrc_out4_ep: endpoint {
0828 remote-endpoint = <&asrc_out4_ep>;
0829 };
0830 };
0831
0832 xbar_asrc_in5_port: port@6b {
0833 reg = <0x6b>;
0834
0835 xbar_asrc_in5_ep: endpoint {
0836 remote-endpoint = <&asrc_in5_ep>;
0837 };
0838 };
0839
0840 port@6c {
0841 reg = <0x6c>;
0842
0843 xbar_asrc_out5_ep: endpoint {
0844 remote-endpoint = <&asrc_out5_ep>;
0845 };
0846 };
0847
0848 xbar_asrc_in6_port: port@6d {
0849 reg = <0x6d>;
0850
0851 xbar_asrc_in6_ep: endpoint {
0852 remote-endpoint = <&asrc_in6_ep>;
0853 };
0854 };
0855
0856 port@6e {
0857 reg = <0x6e>;
0858
0859 xbar_asrc_out6_ep: endpoint {
0860 remote-endpoint = <&asrc_out6_ep>;
0861 };
0862 };
0863
0864 xbar_asrc_in7_port: port@6f {
0865 reg = <0x6f>;
0866
0867 xbar_asrc_in7_ep: endpoint {
0868 remote-endpoint = <&asrc_in7_ep>;
0869 };
0870 };
0871
0872 xbar_ope1_in_port: port@70 {
0873 reg = <0x70>;
0874
0875 xbar_ope1_in_ep: endpoint {
0876 remote-endpoint = <&ope1_cif_in_ep>;
0877 };
0878 };
0879
0880 port@71 {
0881 reg = <0x71>;
0882
0883 xbar_ope1_out_ep: endpoint {
0884 remote-endpoint = <&ope1_cif_out_ep>;
0885 };
0886 };
0887 };
0888
0889 admaif@290f000 {
0890 status = "okay";
0891
0892 ports {
0893 #address-cells = <1>;
0894 #size-cells = <0>;
0895
0896 admaif0_port: port@0 {
0897 reg = <0x0>;
0898
0899 admaif0_ep: endpoint {
0900 remote-endpoint = <&xbar_admaif0_ep>;
0901 };
0902 };
0903
0904 admaif1_port: port@1 {
0905 reg = <0x1>;
0906
0907 admaif1_ep: endpoint {
0908 remote-endpoint = <&xbar_admaif1_ep>;
0909 };
0910 };
0911
0912 admaif2_port: port@2 {
0913 reg = <0x2>;
0914
0915 admaif2_ep: endpoint {
0916 remote-endpoint = <&xbar_admaif2_ep>;
0917 };
0918 };
0919
0920 admaif3_port: port@3 {
0921 reg = <0x3>;
0922
0923 admaif3_ep: endpoint {
0924 remote-endpoint = <&xbar_admaif3_ep>;
0925 };
0926 };
0927
0928 admaif4_port: port@4 {
0929 reg = <0x4>;
0930
0931 admaif4_ep: endpoint {
0932 remote-endpoint = <&xbar_admaif4_ep>;
0933 };
0934 };
0935
0936 admaif5_port: port@5 {
0937 reg = <0x5>;
0938
0939 admaif5_ep: endpoint {
0940 remote-endpoint = <&xbar_admaif5_ep>;
0941 };
0942 };
0943
0944 admaif6_port: port@6 {
0945 reg = <0x6>;
0946
0947 admaif6_ep: endpoint {
0948 remote-endpoint = <&xbar_admaif6_ep>;
0949 };
0950 };
0951
0952 admaif7_port: port@7 {
0953 reg = <0x7>;
0954
0955 admaif7_ep: endpoint {
0956 remote-endpoint = <&xbar_admaif7_ep>;
0957 };
0958 };
0959
0960 admaif8_port: port@8 {
0961 reg = <0x8>;
0962
0963 admaif8_ep: endpoint {
0964 remote-endpoint = <&xbar_admaif8_ep>;
0965 };
0966 };
0967
0968 admaif9_port: port@9 {
0969 reg = <0x9>;
0970
0971 admaif9_ep: endpoint {
0972 remote-endpoint = <&xbar_admaif9_ep>;
0973 };
0974 };
0975
0976 admaif10_port: port@a {
0977 reg = <0xa>;
0978
0979 admaif10_ep: endpoint {
0980 remote-endpoint = <&xbar_admaif10_ep>;
0981 };
0982 };
0983
0984 admaif11_port: port@b {
0985 reg = <0xb>;
0986
0987 admaif11_ep: endpoint {
0988 remote-endpoint = <&xbar_admaif11_ep>;
0989 };
0990 };
0991
0992 admaif12_port: port@c {
0993 reg = <0xc>;
0994
0995 admaif12_ep: endpoint {
0996 remote-endpoint = <&xbar_admaif12_ep>;
0997 };
0998 };
0999
1000 admaif13_port: port@d {
1001 reg = <0xd>;
1002
1003 admaif13_ep: endpoint {
1004 remote-endpoint = <&xbar_admaif13_ep>;
1005 };
1006 };
1007
1008 admaif14_port: port@e {
1009 reg = <0xe>;
1010
1011 admaif14_ep: endpoint {
1012 remote-endpoint = <&xbar_admaif14_ep>;
1013 };
1014 };
1015
1016 admaif15_port: port@f {
1017 reg = <0xf>;
1018
1019 admaif15_ep: endpoint {
1020 remote-endpoint = <&xbar_admaif15_ep>;
1021 };
1022 };
1023
1024 admaif16_port: port@10 {
1025 reg = <0x10>;
1026
1027 admaif16_ep: endpoint {
1028 remote-endpoint = <&xbar_admaif16_ep>;
1029 };
1030 };
1031
1032 admaif17_port: port@11 {
1033 reg = <0x11>;
1034
1035 admaif17_ep: endpoint {
1036 remote-endpoint = <&xbar_admaif17_ep>;
1037 };
1038 };
1039
1040 admaif18_port: port@12 {
1041 reg = <0x12>;
1042
1043 admaif18_ep: endpoint {
1044 remote-endpoint = <&xbar_admaif18_ep>;
1045 };
1046 };
1047
1048 admaif19_port: port@13 {
1049 reg = <0x13>;
1050
1051 admaif19_ep: endpoint {
1052 remote-endpoint = <&xbar_admaif19_ep>;
1053 };
1054 };
1055 };
1056 };
1057
1058 i2s@2901000 {
1059 status = "okay";
1060
1061 ports {
1062 #address-cells = <1>;
1063 #size-cells = <0>;
1064
1065 port@0 {
1066 reg = <0>;
1067
1068 i2s1_cif_ep: endpoint {
1069 remote-endpoint = <&xbar_i2s1_ep>;
1070 };
1071 };
1072
1073 i2s1_port: port@1 {
1074 reg = <1>;
1075
1076 i2s1_dap_ep: endpoint {
1077 dai-format = "i2s";
1078 remote-endpoint = <&rt5658_ep>;
1079 };
1080 };
1081 };
1082 };
1083
1084 i2s@2901100 {
1085 status = "okay";
1086
1087 ports {
1088 #address-cells = <1>;
1089 #size-cells = <0>;
1090
1091 port@0 {
1092 reg = <0>;
1093
1094 i2s2_cif_ep: endpoint {
1095 remote-endpoint = <&xbar_i2s2_ep>;
1096 };
1097 };
1098
1099 i2s2_port: port@1 {
1100 reg = <1>;
1101
1102 i2s2_dap_ep: endpoint {
1103 dai-format = "i2s";
1104 /* Place holder for external Codec */
1105 };
1106 };
1107 };
1108 };
1109
1110 i2s@2901300 {
1111 status = "okay";
1112
1113 ports {
1114 #address-cells = <1>;
1115 #size-cells = <0>;
1116
1117 port@0 {
1118 reg = <0>;
1119
1120 i2s4_cif_ep: endpoint {
1121 remote-endpoint = <&xbar_i2s4_ep>;
1122 };
1123 };
1124
1125 i2s4_port: port@1 {
1126 reg = <1>;
1127
1128 i2s4_dap_ep: endpoint {
1129 dai-format = "i2s";
1130 /* Place holder for external Codec */
1131 };
1132 };
1133 };
1134 };
1135
1136 i2s@2901500 {
1137 status = "okay";
1138
1139 ports {
1140 #address-cells = <1>;
1141 #size-cells = <0>;
1142
1143 port@0 {
1144 reg = <0>;
1145
1146 i2s6_cif_ep: endpoint {
1147 remote-endpoint = <&xbar_i2s6_ep>;
1148 };
1149 };
1150
1151 i2s6_port: port@1 {
1152 reg = <1>;
1153
1154 i2s6_dap_ep: endpoint {
1155 dai-format = "i2s";
1156 /* Place holder for external Codec */
1157 };
1158 };
1159 };
1160 };
1161
1162 dmic@2904200 {
1163 status = "okay";
1164
1165 ports {
1166 #address-cells = <1>;
1167 #size-cells = <0>;
1168
1169 port@0 {
1170 reg = <0>;
1171
1172 dmic3_cif_ep: endpoint {
1173 remote-endpoint = <&xbar_dmic3_ep>;
1174 };
1175 };
1176
1177 dmic3_port: port@1 {
1178 reg = <1>;
1179
1180 dmic3_dap_ep: endpoint {
1181 /* Place holder for external Codec */
1182 };
1183 };
1184 };
1185 };
1186
1187 sfc@2902000 {
1188 status = "okay";
1189
1190 ports {
1191 #address-cells = <1>;
1192 #size-cells = <0>;
1193
1194 port@0 {
1195 reg = <0>;
1196
1197 sfc1_cif_in_ep: endpoint {
1198 remote-endpoint = <&xbar_sfc1_in_ep>;
1199 };
1200 };
1201
1202 sfc1_out_port: port@1 {
1203 reg = <1>;
1204
1205 sfc1_cif_out_ep: endpoint {
1206 remote-endpoint = <&xbar_sfc1_out_ep>;
1207 };
1208 };
1209 };
1210 };
1211
1212 sfc@2902200 {
1213 status = "okay";
1214
1215 ports {
1216 #address-cells = <1>;
1217 #size-cells = <0>;
1218
1219 port@0 {
1220 reg = <0>;
1221
1222 sfc2_cif_in_ep: endpoint {
1223 remote-endpoint = <&xbar_sfc2_in_ep>;
1224 };
1225 };
1226
1227 sfc2_out_port: port@1 {
1228 reg = <1>;
1229
1230 sfc2_cif_out_ep: endpoint {
1231 remote-endpoint = <&xbar_sfc2_out_ep>;
1232 };
1233 };
1234 };
1235 };
1236
1237 sfc@2902400 {
1238 status = "okay";
1239
1240 ports {
1241 #address-cells = <1>;
1242 #size-cells = <0>;
1243
1244 port@0 {
1245 reg = <0>;
1246
1247 sfc3_cif_in_ep: endpoint {
1248 remote-endpoint = <&xbar_sfc3_in_ep>;
1249 };
1250 };
1251
1252 sfc3_out_port: port@1 {
1253 reg = <1>;
1254
1255 sfc3_cif_out_ep: endpoint {
1256 remote-endpoint = <&xbar_sfc3_out_ep>;
1257 };
1258 };
1259 };
1260 };
1261
1262 sfc@2902600 {
1263 status = "okay";
1264
1265 ports {
1266 #address-cells = <1>;
1267 #size-cells = <0>;
1268
1269 port@0 {
1270 reg = <0>;
1271
1272 sfc4_cif_in_ep: endpoint {
1273 remote-endpoint = <&xbar_sfc4_in_ep>;
1274 };
1275 };
1276
1277 sfc4_out_port: port@1 {
1278 reg = <1>;
1279
1280 sfc4_cif_out_ep: endpoint {
1281 remote-endpoint = <&xbar_sfc4_out_ep>;
1282 };
1283 };
1284 };
1285 };
1286
1287 mvc@290a000 {
1288 status = "okay";
1289
1290 ports {
1291 #address-cells = <1>;
1292 #size-cells = <0>;
1293
1294 port@0 {
1295 reg = <0>;
1296
1297 mvc1_cif_in_ep: endpoint {
1298 remote-endpoint = <&xbar_mvc1_in_ep>;
1299 };
1300 };
1301
1302 mvc1_out_port: port@1 {
1303 reg = <1>;
1304
1305 mvc1_cif_out_ep: endpoint {
1306 remote-endpoint = <&xbar_mvc1_out_ep>;
1307 };
1308 };
1309 };
1310 };
1311
1312 mvc@290a200 {
1313 status = "okay";
1314
1315 ports {
1316 #address-cells = <1>;
1317 #size-cells = <0>;
1318
1319 port@0 {
1320 reg = <0>;
1321
1322 mvc2_cif_in_ep: endpoint {
1323 remote-endpoint = <&xbar_mvc2_in_ep>;
1324 };
1325 };
1326
1327 mvc2_out_port: port@1 {
1328 reg = <1>;
1329
1330 mvc2_cif_out_ep: endpoint {
1331 remote-endpoint = <&xbar_mvc2_out_ep>;
1332 };
1333 };
1334 };
1335 };
1336
1337 amx@2903000 {
1338 status = "okay";
1339
1340 ports {
1341 #address-cells = <1>;
1342 #size-cells = <0>;
1343
1344 port@0 {
1345 reg = <0>;
1346
1347 amx1_in1_ep: endpoint {
1348 remote-endpoint = <&xbar_amx1_in1_ep>;
1349 };
1350 };
1351
1352 port@1 {
1353 reg = <1>;
1354
1355 amx1_in2_ep: endpoint {
1356 remote-endpoint = <&xbar_amx1_in2_ep>;
1357 };
1358 };
1359
1360 port@2 {
1361 reg = <2>;
1362
1363 amx1_in3_ep: endpoint {
1364 remote-endpoint = <&xbar_amx1_in3_ep>;
1365 };
1366 };
1367
1368 port@3 {
1369 reg = <3>;
1370
1371 amx1_in4_ep: endpoint {
1372 remote-endpoint = <&xbar_amx1_in4_ep>;
1373 };
1374 };
1375
1376 amx1_out_port: port@4 {
1377 reg = <4>;
1378
1379 amx1_out_ep: endpoint {
1380 remote-endpoint = <&xbar_amx1_out_ep>;
1381 };
1382 };
1383 };
1384 };
1385
1386 amx@2903100 {
1387 status = "okay";
1388
1389 ports {
1390 #address-cells = <1>;
1391 #size-cells = <0>;
1392
1393 port@0 {
1394 reg = <0>;
1395
1396 amx2_in1_ep: endpoint {
1397 remote-endpoint = <&xbar_amx2_in1_ep>;
1398 };
1399 };
1400
1401 port@1 {
1402 reg = <1>;
1403
1404 amx2_in2_ep: endpoint {
1405 remote-endpoint = <&xbar_amx2_in2_ep>;
1406 };
1407 };
1408
1409 amx2_in3_port: port@2 {
1410 reg = <2>;
1411
1412 amx2_in3_ep: endpoint {
1413 remote-endpoint = <&xbar_amx2_in3_ep>;
1414 };
1415 };
1416
1417 amx2_in4_port: port@3 {
1418 reg = <3>;
1419
1420 amx2_in4_ep: endpoint {
1421 remote-endpoint = <&xbar_amx2_in4_ep>;
1422 };
1423 };
1424
1425 amx2_out_port: port@4 {
1426 reg = <4>;
1427
1428 amx2_out_ep: endpoint {
1429 remote-endpoint = <&xbar_amx2_out_ep>;
1430 };
1431 };
1432 };
1433 };
1434
1435 amx@2903200 {
1436 status = "okay";
1437
1438 ports {
1439 #address-cells = <1>;
1440 #size-cells = <0>;
1441
1442 port@0 {
1443 reg = <0>;
1444
1445 amx3_in1_ep: endpoint {
1446 remote-endpoint = <&xbar_amx3_in1_ep>;
1447 };
1448 };
1449
1450 port@1 {
1451 reg = <1>;
1452
1453 amx3_in2_ep: endpoint {
1454 remote-endpoint = <&xbar_amx3_in2_ep>;
1455 };
1456 };
1457
1458 port@2 {
1459 reg = <2>;
1460
1461 amx3_in3_ep: endpoint {
1462 remote-endpoint = <&xbar_amx3_in3_ep>;
1463 };
1464 };
1465
1466 port@3 {
1467 reg = <3>;
1468
1469 amx3_in4_ep: endpoint {
1470 remote-endpoint = <&xbar_amx3_in4_ep>;
1471 };
1472 };
1473
1474 amx3_out_port: port@4 {
1475 reg = <4>;
1476
1477 amx3_out_ep: endpoint {
1478 remote-endpoint = <&xbar_amx3_out_ep>;
1479 };
1480 };
1481 };
1482 };
1483
1484 amx@2903300 {
1485 status = "okay";
1486
1487 ports {
1488 #address-cells = <1>;
1489 #size-cells = <0>;
1490
1491 port@0 {
1492 reg = <0>;
1493
1494 amx4_in1_ep: endpoint {
1495 remote-endpoint = <&xbar_amx4_in1_ep>;
1496 };
1497 };
1498
1499 port@1 {
1500 reg = <1>;
1501
1502 amx4_in2_ep: endpoint {
1503 remote-endpoint = <&xbar_amx4_in2_ep>;
1504 };
1505 };
1506
1507 port@2 {
1508 reg = <2>;
1509
1510 amx4_in3_ep: endpoint {
1511 remote-endpoint = <&xbar_amx4_in3_ep>;
1512 };
1513 };
1514
1515 port@3 {
1516 reg = <3>;
1517
1518 amx4_in4_ep: endpoint {
1519 remote-endpoint = <&xbar_amx4_in4_ep>;
1520 };
1521 };
1522
1523 amx4_out_port: port@4 {
1524 reg = <4>;
1525
1526 amx4_out_ep: endpoint {
1527 remote-endpoint = <&xbar_amx4_out_ep>;
1528 };
1529 };
1530 };
1531 };
1532
1533 adx@2903800 {
1534 status = "okay";
1535
1536 ports {
1537 #address-cells = <1>;
1538 #size-cells = <0>;
1539
1540 port@0 {
1541 reg = <0>;
1542
1543 adx1_in_ep: endpoint {
1544 remote-endpoint = <&xbar_adx1_in_ep>;
1545 };
1546 };
1547
1548 adx1_out1_port: port@1 {
1549 reg = <1>;
1550
1551 adx1_out1_ep: endpoint {
1552 remote-endpoint = <&xbar_adx1_out1_ep>;
1553 };
1554 };
1555
1556 adx1_out2_port: port@2 {
1557 reg = <2>;
1558
1559 adx1_out2_ep: endpoint {
1560 remote-endpoint = <&xbar_adx1_out2_ep>;
1561 };
1562 };
1563
1564 adx1_out3_port: port@3 {
1565 reg = <3>;
1566
1567 adx1_out3_ep: endpoint {
1568 remote-endpoint = <&xbar_adx1_out3_ep>;
1569 };
1570 };
1571
1572 adx1_out4_port: port@4 {
1573 reg = <4>;
1574
1575 adx1_out4_ep: endpoint {
1576 remote-endpoint = <&xbar_adx1_out4_ep>;
1577 };
1578 };
1579 };
1580 };
1581
1582 adx@2903900 {
1583 status = "okay";
1584
1585 ports {
1586 #address-cells = <1>;
1587 #size-cells = <0>;
1588
1589 port@0 {
1590 reg = <0>;
1591
1592 adx2_in_ep: endpoint {
1593 remote-endpoint = <&xbar_adx2_in_ep>;
1594 };
1595 };
1596
1597 adx2_out1_port: port@1 {
1598 reg = <1>;
1599
1600 adx2_out1_ep: endpoint {
1601 remote-endpoint = <&xbar_adx2_out1_ep>;
1602 };
1603 };
1604
1605 adx2_out2_port: port@2 {
1606 reg = <2>;
1607
1608 adx2_out2_ep: endpoint {
1609 remote-endpoint = <&xbar_adx2_out2_ep>;
1610 };
1611 };
1612
1613 adx2_out3_port: port@3 {
1614 reg = <3>;
1615
1616 adx2_out3_ep: endpoint {
1617 remote-endpoint = <&xbar_adx2_out3_ep>;
1618 };
1619 };
1620
1621 adx2_out4_port: port@4 {
1622 reg = <4>;
1623
1624 adx2_out4_ep: endpoint {
1625 remote-endpoint = <&xbar_adx2_out4_ep>;
1626 };
1627 };
1628 };
1629 };
1630
1631 adx@2903a00 {
1632 status = "okay";
1633
1634 ports {
1635 #address-cells = <1>;
1636 #size-cells = <0>;
1637
1638 port@0 {
1639 reg = <0>;
1640
1641 adx3_in_ep: endpoint {
1642 remote-endpoint = <&xbar_adx3_in_ep>;
1643 };
1644 };
1645
1646 adx3_out1_port: port@1 {
1647 reg = <1>;
1648
1649 adx3_out1_ep: endpoint {
1650 remote-endpoint = <&xbar_adx3_out1_ep>;
1651 };
1652 };
1653
1654 adx3_out2_port: port@2 {
1655 reg = <2>;
1656
1657 adx3_out2_ep: endpoint {
1658 remote-endpoint = <&xbar_adx3_out2_ep>;
1659 };
1660 };
1661
1662 adx3_out3_port: port@3 {
1663 reg = <3>;
1664
1665 adx3_out3_ep: endpoint {
1666 remote-endpoint = <&xbar_adx3_out3_ep>;
1667 };
1668 };
1669
1670 adx3_out4_port: port@4 {
1671 reg = <4>;
1672
1673 adx3_out4_ep: endpoint {
1674 remote-endpoint = <&xbar_adx3_out4_ep>;
1675 };
1676 };
1677 };
1678 };
1679
1680 adx@2903b00 {
1681 status = "okay";
1682
1683 ports {
1684 #address-cells = <1>;
1685 #size-cells = <0>;
1686
1687 port@0 {
1688 reg = <0>;
1689
1690 adx4_in_ep: endpoint {
1691 remote-endpoint = <&xbar_adx4_in_ep>;
1692 };
1693 };
1694
1695 adx4_out1_port: port@1 {
1696 reg = <1>;
1697
1698 adx4_out1_ep: endpoint {
1699 remote-endpoint = <&xbar_adx4_out1_ep>;
1700 };
1701 };
1702
1703 adx4_out2_port: port@2 {
1704 reg = <2>;
1705
1706 adx4_out2_ep: endpoint {
1707 remote-endpoint = <&xbar_adx4_out2_ep>;
1708 };
1709 };
1710
1711 adx4_out3_port: port@3 {
1712 reg = <3>;
1713
1714 adx4_out3_ep: endpoint {
1715 remote-endpoint = <&xbar_adx4_out3_ep>;
1716 };
1717 };
1718
1719 adx4_out4_port: port@4 {
1720 reg = <4>;
1721
1722 adx4_out4_ep: endpoint {
1723 remote-endpoint = <&xbar_adx4_out4_ep>;
1724 };
1725 };
1726 };
1727 };
1728
1729 processing-engine@2908000 {
1730 status = "okay";
1731
1732 ports {
1733 #address-cells = <1>;
1734 #size-cells = <0>;
1735
1736 port@0 {
1737 reg = <0x0>;
1738
1739 ope1_cif_in_ep: endpoint {
1740 remote-endpoint = <&xbar_ope1_in_ep>;
1741 };
1742 };
1743
1744 ope1_out_port: port@1 {
1745 reg = <0x1>;
1746
1747 ope1_cif_out_ep: endpoint {
1748 remote-endpoint = <&xbar_ope1_out_ep>;
1749 };
1750 };
1751 };
1752 };
1753
1754 amixer@290bb00 {
1755 status = "okay";
1756
1757 ports {
1758 #address-cells = <1>;
1759 #size-cells = <0>;
1760
1761 port@0 {
1762 reg = <0x0>;
1763
1764 mixer_in1_ep: endpoint {
1765 remote-endpoint = <&xbar_mixer_in1_ep>;
1766 };
1767 };
1768
1769 port@1 {
1770 reg = <0x1>;
1771
1772 mixer_in2_ep: endpoint {
1773 remote-endpoint = <&xbar_mixer_in2_ep>;
1774 };
1775 };
1776
1777 port@2 {
1778 reg = <0x2>;
1779
1780 mixer_in3_ep: endpoint {
1781 remote-endpoint = <&xbar_mixer_in3_ep>;
1782 };
1783 };
1784
1785 port@3 {
1786 reg = <0x3>;
1787
1788 mixer_in4_ep: endpoint {
1789 remote-endpoint = <&xbar_mixer_in4_ep>;
1790 };
1791 };
1792
1793 port@4 {
1794 reg = <0x4>;
1795
1796 mixer_in5_ep: endpoint {
1797 remote-endpoint = <&xbar_mixer_in5_ep>;
1798 };
1799 };
1800
1801 port@5 {
1802 reg = <0x5>;
1803
1804 mixer_in6_ep: endpoint {
1805 remote-endpoint = <&xbar_mixer_in6_ep>;
1806 };
1807 };
1808
1809 port@6 {
1810 reg = <0x6>;
1811
1812 mixer_in7_ep: endpoint {
1813 remote-endpoint = <&xbar_mixer_in7_ep>;
1814 };
1815 };
1816
1817 port@7 {
1818 reg = <0x7>;
1819
1820 mixer_in8_ep: endpoint {
1821 remote-endpoint = <&xbar_mixer_in8_ep>;
1822 };
1823 };
1824
1825 port@8 {
1826 reg = <0x8>;
1827
1828 mixer_in9_ep: endpoint {
1829 remote-endpoint = <&xbar_mixer_in9_ep>;
1830 };
1831 };
1832
1833 port@9 {
1834 reg = <0x9>;
1835
1836 mixer_in10_ep: endpoint {
1837 remote-endpoint = <&xbar_mixer_in10_ep>;
1838 };
1839 };
1840
1841 mixer_out1_port: port@a {
1842 reg = <0xa>;
1843
1844 mixer_out1_ep: endpoint {
1845 remote-endpoint = <&xbar_mixer_out1_ep>;
1846 };
1847 };
1848
1849 mixer_out2_port: port@b {
1850 reg = <0xb>;
1851
1852 mixer_out2_ep: endpoint {
1853 remote-endpoint = <&xbar_mixer_out2_ep>;
1854 };
1855 };
1856
1857 mixer_out3_port: port@c {
1858 reg = <0xc>;
1859
1860 mixer_out3_ep: endpoint {
1861 remote-endpoint = <&xbar_mixer_out3_ep>;
1862 };
1863 };
1864
1865 mixer_out4_port: port@d {
1866 reg = <0xd>;
1867
1868 mixer_out4_ep: endpoint {
1869 remote-endpoint = <&xbar_mixer_out4_ep>;
1870 };
1871 };
1872
1873 mixer_out5_port: port@e {
1874 reg = <0xe>;
1875
1876 mixer_out5_ep: endpoint {
1877 remote-endpoint = <&xbar_mixer_out5_ep>;
1878 };
1879 };
1880 };
1881 };
1882
1883 asrc@2910000 {
1884 status = "okay";
1885
1886 ports {
1887 #address-cells = <1>;
1888 #size-cells = <0>;
1889
1890 port@0 {
1891 reg = <0x0>;
1892
1893 asrc_in1_ep: endpoint {
1894 remote-endpoint = <&xbar_asrc_in1_ep>;
1895 };
1896 };
1897
1898 port@1 {
1899 reg = <0x1>;
1900
1901 asrc_in2_ep: endpoint {
1902 remote-endpoint = <&xbar_asrc_in2_ep>;
1903 };
1904 };
1905
1906 port@2 {
1907 reg = <0x2>;
1908
1909 asrc_in3_ep: endpoint {
1910 remote-endpoint = <&xbar_asrc_in3_ep>;
1911 };
1912 };
1913
1914 port@3 {
1915 reg = <0x3>;
1916
1917 asrc_in4_ep: endpoint {
1918 remote-endpoint = <&xbar_asrc_in4_ep>;
1919 };
1920 };
1921
1922 port@4 {
1923 reg = <0x4>;
1924
1925 asrc_in5_ep: endpoint {
1926 remote-endpoint = <&xbar_asrc_in5_ep>;
1927 };
1928 };
1929
1930 port@5 {
1931 reg = <0x5>;
1932
1933 asrc_in6_ep: endpoint {
1934 remote-endpoint = <&xbar_asrc_in6_ep>;
1935 };
1936 };
1937
1938 port@6 {
1939 reg = <0x6>;
1940
1941 asrc_in7_ep: endpoint {
1942 remote-endpoint = <&xbar_asrc_in7_ep>;
1943 };
1944 };
1945
1946 asrc_out1_port: port@7 {
1947 reg = <0x7>;
1948
1949 asrc_out1_ep: endpoint {
1950 remote-endpoint = <&xbar_asrc_out1_ep>;
1951 };
1952 };
1953
1954 asrc_out2_port: port@8 {
1955 reg = <0x8>;
1956
1957 asrc_out2_ep: endpoint {
1958 remote-endpoint = <&xbar_asrc_out2_ep>;
1959 };
1960 };
1961
1962 asrc_out3_port: port@9 {
1963 reg = <0x9>;
1964
1965 asrc_out3_ep: endpoint {
1966 remote-endpoint = <&xbar_asrc_out3_ep>;
1967 };
1968 };
1969
1970 asrc_out4_port: port@a {
1971 reg = <0xa>;
1972
1973 asrc_out4_ep: endpoint {
1974 remote-endpoint = <&xbar_asrc_out4_ep>;
1975 };
1976 };
1977
1978 asrc_out5_port: port@b {
1979 reg = <0xb>;
1980
1981 asrc_out5_ep: endpoint {
1982 remote-endpoint = <&xbar_asrc_out5_ep>;
1983 };
1984 };
1985
1986 asrc_out6_port: port@c {
1987 reg = <0xc>;
1988
1989 asrc_out6_ep: endpoint {
1990 remote-endpoint = <&xbar_asrc_out6_ep>;
1991 };
1992 };
1993 };
1994 };
1995 };
1996 };
1997
1998 i2c@3160000 {
1999 eeprom@56 {
2000 compatible = "atmel,24c02";
2001 reg = <0x56>;
2002
2003 label = "system";
2004 vcc-supply = <&vdd_1v8ls>;
2005 address-width = <8>;
2006 pagesize = <8>;
2007 size = <256>;
2008 read-only;
2009 };
2010 };
2011
2012 ddc: i2c@31c0000 {
2013 status = "okay";
2014 };
2015
2016 /* SDMMC1 (SD/MMC) */
2017 mmc@3400000 {
2018 status = "okay";
2019 };
2020
2021 hda@3510000 {
2022 nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
2023 status = "okay";
2024 };
2025
2026 padctl@3520000 {
2027 status = "okay";
2028
2029 pads {
2030 usb2 {
2031 lanes {
2032 usb2-0 {
2033 status = "okay";
2034 };
2035
2036 usb2-1 {
2037 status = "okay";
2038 };
2039
2040 usb2-3 {
2041 status = "okay";
2042 };
2043 };
2044 };
2045
2046 usb3 {
2047 lanes {
2048 usb3-0 {
2049 status = "okay";
2050 };
2051
2052 usb3-2 {
2053 status = "okay";
2054 };
2055
2056 usb3-3 {
2057 status = "okay";
2058 };
2059 };
2060 };
2061 };
2062
2063 ports {
2064 usb2-0 {
2065 mode = "host";
2066 status = "okay";
2067 };
2068
2069 usb2-1 {
2070 mode = "host";
2071 status = "okay";
2072 };
2073
2074 usb2-3 {
2075 mode = "host";
2076 status = "okay";
2077 };
2078
2079 usb3-0 {
2080 nvidia,usb2-companion = <1>;
2081 status = "okay";
2082 };
2083
2084 usb3-2 {
2085 nvidia,usb2-companion = <0>;
2086 status = "okay";
2087 };
2088
2089 usb3-3 {
2090 nvidia,usb2-companion = <3>;
2091 maximum-speed = "super-speed";
2092 status = "okay";
2093 };
2094 };
2095 };
2096
2097 usb@3610000 {
2098 status = "okay";
2099
2100 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
2101 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
2102 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
2103 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
2104 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>,
2105 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
2106 phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
2107 };
2108
2109 i2c@c250000 {
2110 status = "okay";
2111
2112 rt5658: audio-codec@1a {
2113 status = "okay";
2114
2115 compatible = "realtek,rt5658";
2116 reg = <0x1a>;
2117 interrupt-parent = <&gpio>;
2118 interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;
2119 clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
2120 clock-names = "mclk";
2121 realtek,jd-src = <2>;
2122 sound-name-prefix = "CVB-RT";
2123
2124 port {
2125 rt5658_ep: endpoint {
2126 remote-endpoint = <&i2s1_dap_ep>;
2127 mclk-fs = <256>;
2128 };
2129 };
2130 };
2131 };
2132
2133 pwm@c340000 {
2134 status = "okay";
2135 };
2136
2137 host1x@13e00000 {
2138 display-hub@15200000 {
2139 status = "okay";
2140 };
2141
2142 dpaux@155c0000 {
2143 status = "okay";
2144 };
2145
2146 dpaux@155d0000 {
2147 status = "okay";
2148 };
2149
2150 dpaux@155e0000 {
2151 status = "okay";
2152 };
2153
2154 /* DP0 */
2155 sor@15b00000 {
2156 status = "okay";
2157
2158 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2159 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2160
2161 nvidia,dpaux = <&dpaux0>;
2162 };
2163
2164 /* DP1 */
2165 sor@15b40000 {
2166 status = "okay";
2167
2168 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2169 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2170
2171 nvidia,dpaux = <&dpaux1>;
2172 };
2173
2174 /* HDMI */
2175 sor@15b80000 {
2176 status = "okay";
2177
2178 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
2179 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
2180 hdmi-supply = <&vdd_hdmi>;
2181
2182 nvidia,ddc-i2c-bus = <&ddc>;
2183 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2)
2184 GPIO_ACTIVE_LOW>;
2185 };
2186 };
2187 };
2188
2189 pcie@14100000 {
2190 status = "okay";
2191
2192 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2193
2194 phys = <&p2u_hsio_0>;
2195 phy-names = "p2u-0";
2196 };
2197
2198 pcie@14140000 {
2199 status = "okay";
2200
2201 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2202
2203 phys = <&p2u_hsio_7>;
2204 phy-names = "p2u-0";
2205 };
2206
2207 pcie@14180000 {
2208 status = "okay";
2209
2210 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2211
2212 phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
2213 <&p2u_hsio_5>;
2214 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
2215 };
2216
2217 pcie@141a0000 {
2218 status = "okay";
2219
2220 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2221 vpcie3v3-supply = <&vdd_3v3_pcie>;
2222 vpcie12v-supply = <&vdd_12v_pcie>;
2223
2224 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2225 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2226 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2227
2228 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2229 "p2u-5", "p2u-6", "p2u-7";
2230 };
2231
2232 pcie-ep@141a0000 {
2233 status = "disabled";
2234
2235 vddio-pex-ctl-supply = <&vdd_1v8ao>;
2236
2237 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
2238
2239 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
2240 GPIO_ACTIVE_HIGH>;
2241
2242 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
2243 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
2244 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
2245
2246 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
2247 "p2u-5", "p2u-6", "p2u-7";
2248 };
2249
2250 fan: pwm-fan {
2251 compatible = "pwm-fan";
2252 pwms = <&pwm4 0 45334>;
2253
2254 cooling-levels = <0 64 128 255>;
2255 #cooling-cells = <2>;
2256 };
2257
2258 gpio-keys {
2259 compatible = "gpio-keys";
2260
2261 key-force-recovery {
2262 label = "Force Recovery";
2263 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
2264 GPIO_ACTIVE_LOW>;
2265 linux,input-type = <EV_KEY>;
2266 linux,code = <KEY_SLEEP>;
2267 debounce-interval = <10>;
2268 };
2269
2270 key-power {
2271 label = "Power";
2272 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
2273 GPIO_ACTIVE_LOW>;
2274 linux,input-type = <EV_KEY>;
2275 linux,code = <KEY_POWER>;
2276 debounce-interval = <10>;
2277 wakeup-event-action = <EV_ACT_ASSERTED>;
2278 wakeup-source;
2279 };
2280 };
2281
2282 sound {
2283 compatible = "nvidia,tegra186-audio-graph-card";
2284 status = "okay";
2285
2286 dais = /* ADMAIF (FE) Ports */
2287 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2288 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2289 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2290 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2291 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2292 /* XBAR Ports */
2293 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
2294 <&xbar_i2s6_port>, <&xbar_dmic3_port>,
2295 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2296 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2297 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2298 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2299 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2300 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2301 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2302 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2303 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2304 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2305 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2306 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2307 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2308 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2309 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2310 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2311 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2312 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2313 <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
2314 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
2315 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
2316 <&xbar_asrc_in7_port>,
2317 <&xbar_ope1_in_port>,
2318 /* HW accelerators */
2319 <&sfc1_out_port>, <&sfc2_out_port>,
2320 <&sfc3_out_port>, <&sfc4_out_port>,
2321 <&mvc1_out_port>, <&mvc2_out_port>,
2322 <&amx1_out_port>, <&amx2_out_port>,
2323 <&amx3_out_port>, <&amx4_out_port>,
2324 <&adx1_out1_port>, <&adx1_out2_port>,
2325 <&adx1_out3_port>, <&adx1_out4_port>,
2326 <&adx2_out1_port>, <&adx2_out2_port>,
2327 <&adx2_out3_port>, <&adx2_out4_port>,
2328 <&adx3_out1_port>, <&adx3_out2_port>,
2329 <&adx3_out3_port>, <&adx3_out4_port>,
2330 <&adx4_out1_port>, <&adx4_out2_port>,
2331 <&adx4_out3_port>, <&adx4_out4_port>,
2332 <&mixer_out1_port>, <&mixer_out2_port>, <&mixer_out3_port>,
2333 <&mixer_out4_port>, <&mixer_out5_port>,
2334 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>,
2335 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>,
2336 <&ope1_out_port>,
2337 /* BE I/O Ports */
2338 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
2339 <&dmic3_port>;
2340
2341 label = "NVIDIA Jetson AGX Xavier APE";
2342
2343 widgets =
2344 "Microphone", "CVB-RT MIC Jack",
2345 "Microphone", "CVB-RT MIC",
2346 "Headphone", "CVB-RT HP Jack",
2347 "Speaker", "CVB-RT SPK";
2348
2349 routing =
2350 /* I2S1 <-> RT5658 */
2351 "CVB-RT AIF1 Playback", "I2S1 DAP-Playback",
2352 "I2S1 DAP-Capture", "CVB-RT AIF1 Capture",
2353 /* RT5658 Codec controls */
2354 "CVB-RT HP Jack", "CVB-RT HPO L Playback",
2355 "CVB-RT HP Jack", "CVB-RT HPO R Playback",
2356 "CVB-RT IN1P", "CVB-RT MIC Jack",
2357 "CVB-RT IN2P", "CVB-RT MIC Jack",
2358 "CVB-RT SPK", "CVB-RT SPO Playback",
2359 "CVB-RT DMIC L1", "CVB-RT MIC",
2360 "CVB-RT DMIC L2", "CVB-RT MIC",
2361 "CVB-RT DMIC R1", "CVB-RT MIC",
2362 "CVB-RT DMIC R2", "CVB-RT MIC";
2363 };
2364
2365 thermal-zones {
2366 cpu-thermal {
2367 polling-delay = <0>;
2368 polling-delay-passive = <500>;
2369 status = "okay";
2370
2371 trips {
2372 cpu_trip_critical: critical {
2373 temperature = <96500>;
2374 hysteresis = <0>;
2375 type = "critical";
2376 };
2377
2378 cpu_trip_hot: hot {
2379 temperature = <70000>;
2380 hysteresis = <2000>;
2381 type = "hot";
2382 };
2383
2384 cpu_trip_active: active {
2385 temperature = <50000>;
2386 hysteresis = <2000>;
2387 type = "active";
2388 };
2389
2390 cpu_trip_passive: passive {
2391 temperature = <30000>;
2392 hysteresis = <2000>;
2393 type = "passive";
2394 };
2395 };
2396
2397 cooling-maps {
2398 cpu-critical {
2399 cooling-device = <&fan 3 3>;
2400 trip = <&cpu_trip_critical>;
2401 };
2402
2403 cpu-hot {
2404 cooling-device = <&fan 2 2>;
2405 trip = <&cpu_trip_hot>;
2406 };
2407
2408 cpu-active {
2409 cooling-device = <&fan 1 1>;
2410 trip = <&cpu_trip_active>;
2411 };
2412
2413 cpu-passive {
2414 cooling-device = <&fan 0 0>;
2415 trip = <&cpu_trip_passive>;
2416 };
2417 };
2418 };
2419
2420 gpu-thermal {
2421 polling-delay = <0>;
2422 polling-delay-passive = <500>;
2423 status = "okay";
2424
2425 trips {
2426 gpu_alert0: critical {
2427 temperature = <99000>;
2428 hysteresis = <0>;
2429 type = "critical";
2430 };
2431 };
2432 };
2433
2434 aux-thermal {
2435 polling-delay = <0>;
2436 polling-delay-passive = <500>;
2437 status = "okay";
2438
2439 trips {
2440 aux_alert0: critical {
2441 temperature = <90000>;
2442 hysteresis = <0>;
2443 type = "critical";
2444 };
2445 };
2446 };
2447 };
2448 };