0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
0004 */
0005
0006 /dts-v1/;
0007 #include "sparx5_pcb_common.dtsi"
0008
0009 / {
0010 model = "Sparx5 PCB125 Reference Board";
0011 compatible = "microchip,sparx5-pcb125", "microchip,sparx5";
0012
0013 memory@0 {
0014 device_type = "memory";
0015 reg = <0x00000000 0x00000000 0x10000000>;
0016 };
0017 };
0018
0019 &gpio {
0020 emmc_pins: emmc-pins {
0021 /* NB: No "GPIO_35", "GPIO_36", "GPIO_37"
0022 * (N/A: CARD_nDETECT, CARD_WP, CARD_LED)
0023 */
0024 pins = "GPIO_34", "GPIO_38", "GPIO_39",
0025 "GPIO_40", "GPIO_41", "GPIO_42",
0026 "GPIO_43", "GPIO_44", "GPIO_45",
0027 "GPIO_46", "GPIO_47";
0028 drive-strength = <3>;
0029 function = "emmc";
0030 };
0031 };
0032
0033 &sdhci0 {
0034 status = "okay";
0035 bus-width = <8>;
0036 non-removable;
0037 pinctrl-0 = <&emmc_pins>;
0038 max-frequency = <8000000>;
0039 microchip,clock-delay = <10>;
0040 };
0041
0042 &spi0 {
0043 status = "okay";
0044 spi@0 {
0045 compatible = "spi-mux";
0046 mux-controls = <&mux>;
0047 #address-cells = <1>;
0048 #size-cells = <0>;
0049 reg = <0>; /* CS0 */
0050 flash@9 {
0051 compatible = "jedec,spi-nor";
0052 spi-max-frequency = <8000000>;
0053 reg = <0x9>; /* SPI */
0054 };
0055 };
0056 spi@1 {
0057 compatible = "spi-mux";
0058 mux-controls = <&mux 0>;
0059 #address-cells = <1>;
0060 #size-cells = <0>;
0061 reg = <1>; /* CS1 */
0062 flash@9 {
0063 compatible = "spi-nand";
0064 pinctrl-0 = <&cs1_pins>;
0065 pinctrl-names = "default";
0066 spi-max-frequency = <8000000>;
0067 reg = <0x9>; /* SPI */
0068 };
0069 };
0070 };
0071
0072 &sgpio0 {
0073 status = "okay";
0074 microchip,sgpio-port-ranges = <0 23>;
0075 };
0076
0077 &i2c1 {
0078 status = "okay";
0079 };
