0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (C) 2021 MediaTek Inc.
0004 * Author: Seiya Wang <seiya.wang@mediatek.com>
0005 */
0006 /dts-v1/;
0007 #include "mt8195.dtsi"
0008
0009 / {
0010 model = "MediaTek MT8195 evaluation board";
0011 compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
0012
0013 aliases {
0014 serial0 = &uart0;
0015 };
0016
0017 chosen {
0018 stdout-path = "serial0:921600n8";
0019 };
0020
0021 memory@40000000 {
0022 device_type = "memory";
0023 reg = <0 0x40000000 0 0x80000000>;
0024 };
0025 };
0026
0027 &auxadc {
0028 status = "okay";
0029 };
0030
0031 &i2c0 {
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&i2c0_pin>;
0034 clock-frequency = <100000>;
0035 status = "okay";
0036 };
0037
0038 &i2c1 {
0039 pinctrl-names = "default";
0040 pinctrl-0 = <&i2c1_pin>;
0041 clock-frequency = <400000>;
0042 status = "okay";
0043 };
0044
0045 &i2c4 {
0046 pinctrl-names = "default";
0047 pinctrl-0 = <&i2c4_pin>;
0048 clock-frequency = <400000>;
0049 status = "okay";
0050 };
0051
0052 &i2c6 {
0053 pinctrl-names = "default";
0054 pinctrl-0 = <&i2c6_pin>;
0055 clock-frequency = <400000>;
0056 status = "okay";
0057 };
0058
0059 &nor_flash {
0060 status = "okay";
0061 pinctrl-names = "default";
0062 pinctrl-0 = <&nor_pins_default>;
0063
0064 flash@0 {
0065 compatible = "jedec,spi-nor";
0066 reg = <0>;
0067 spi-max-frequency = <50000000>;
0068 };
0069 };
0070
0071 &pio {
0072 i2c0_pin: i2c0-pins {
0073 pins {
0074 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
0075 <PINMUX_GPIO9__FUNC_SCL0>;
0076 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0077 mediatek,drive-strength-adv = <0>;
0078 drive-strength = <6>;
0079 };
0080 };
0081
0082 i2c1_pin: i2c1-pins {
0083 pins {
0084 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
0085 <PINMUX_GPIO11__FUNC_SCL1>;
0086 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0087 mediatek,drive-strength-adv = <0>;
0088 drive-strength = <6>;
0089 };
0090 };
0091
0092 i2c4_pin: i2c4-pins {
0093 pins {
0094 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
0095 <PINMUX_GPIO17__FUNC_SCL4>;
0096 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0097 mediatek,drive-strength-adv = <7>;
0098 };
0099 };
0100
0101 i2c6_pin: i2c6-pins {
0102 pins {
0103 pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
0104 <PINMUX_GPIO26__FUNC_SCL6>;
0105 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0106 };
0107 };
0108
0109 i2c7_pin: i2c7-pins {
0110 pins {
0111 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
0112 <PINMUX_GPIO28__FUNC_SDA7>;
0113 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0114 };
0115 };
0116
0117 nor_pins_default: nor-pins {
0118 pins0 {
0119 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
0120 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
0121 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
0122 bias-pull-down;
0123 };
0124
0125 pins1 {
0126 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>,
0127 <PINMUX_GPIO130__FUNC_SPINOR_IO2>,
0128 <PINMUX_GPIO131__FUNC_SPINOR_IO3>;
0129 bias-pull-up;
0130 };
0131 };
0132
0133 uart0_pin: uart0-pins {
0134 pins {
0135 pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
0136 <PINMUX_GPIO99__FUNC_URXD0>;
0137 };
0138 };
0139 };
0140
0141 &u3phy0 {
0142 status = "okay";
0143 };
0144
0145 &u3phy1 {
0146 status = "okay";
0147 };
0148
0149 &u3phy2 {
0150 status = "okay";
0151 };
0152
0153 &u3phy3 {
0154 status = "okay";
0155 };
0156
0157 &uart0 {
0158 pinctrl-names = "default";
0159 pinctrl-0 = <&uart0_pin>;
0160 status = "okay";
0161 };
0162
0163 &xhci0 {
0164 status = "okay";
0165 };
0166
0167 &xhci1 {
0168 status = "okay";
0169 };
0170
0171 &xhci2 {
0172 status = "okay";
0173 };
0174
0175 &xhci3 {
0176 /* This controller is connected with a BT device.
0177 * Disable usb2 lpm to prevent known issues.
0178 */
0179 usb2-lpm-disable;
0180 status = "okay";
0181 };
