0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (C) 2020 MediaTek Inc.
0004 * Author: Seiya Wang <seiya.wang@mediatek.com>
0005 */
0006 /dts-v1/;
0007 #include "mt8192.dtsi"
0008 #include "mt6359.dtsi"
0009 #include <dt-bindings/gpio/gpio.h>
0010 #include <dt-bindings/spmi/spmi.h>
0011
0012 / {
0013 aliases {
0014 serial0 = &uart0;
0015 };
0016
0017 chosen {
0018 stdout-path = "serial0:115200n8";
0019 };
0020
0021 memory@40000000 {
0022 device_type = "memory";
0023 reg = <0 0x40000000 0 0x80000000>;
0024 };
0025
0026 /* system wide LDO 1.8V power rail */
0027 pp1800_ldo_g: regulator-1v8-g {
0028 compatible = "regulator-fixed";
0029 regulator-name = "pp1800_ldo_g";
0030 regulator-always-on;
0031 regulator-boot-on;
0032 regulator-min-microvolt = <1800000>;
0033 regulator-max-microvolt = <1800000>;
0034 vin-supply = <&pp3300_g>;
0035 };
0036
0037 /* system wide switching 3.3V power rail */
0038 pp3300_g: regulator-3v3-g {
0039 compatible = "regulator-fixed";
0040 regulator-name = "pp3300_g";
0041 regulator-always-on;
0042 regulator-boot-on;
0043 regulator-min-microvolt = <3300000>;
0044 regulator-max-microvolt = <3300000>;
0045 vin-supply = <&ppvar_sys>;
0046 };
0047
0048 /* system wide LDO 3.3V power rail */
0049 pp3300_ldo_z: regulator-3v3-z {
0050 compatible = "regulator-fixed";
0051 regulator-name = "pp3300_ldo_z";
0052 regulator-always-on;
0053 regulator-boot-on;
0054 regulator-min-microvolt = <3300000>;
0055 regulator-max-microvolt = <3300000>;
0056 vin-supply = <&ppvar_sys>;
0057 };
0058
0059 /* separately switched 3.3V power rail */
0060 pp3300_u: regulator-3v3-u {
0061 compatible = "regulator-fixed";
0062 regulator-name = "pp3300_u";
0063 regulator-always-on;
0064 regulator-boot-on;
0065 regulator-min-microvolt = <3300000>;
0066 regulator-max-microvolt = <3300000>;
0067 /* enable pin wired to GPIO controlled by EC */
0068 vin-supply = <&pp3300_g>;
0069 };
0070
0071 pp3300_wlan: regulator-3v3-wlan {
0072 compatible = "regulator-fixed";
0073 regulator-name = "pp3300_wlan";
0074 regulator-always-on;
0075 regulator-boot-on;
0076 regulator-min-microvolt = <3300000>;
0077 regulator-max-microvolt = <3300000>;
0078 pinctrl-names = "default";
0079 pinctrl-0 = <&pp3300_wlan_pins>;
0080 enable-active-high;
0081 gpio = <&pio 143 GPIO_ACTIVE_HIGH>;
0082 };
0083
0084 /* system wide switching 5.0V power rail */
0085 pp5000_a: regulator-5v0-a {
0086 compatible = "regulator-fixed";
0087 regulator-name = "pp5000_a";
0088 regulator-always-on;
0089 regulator-boot-on;
0090 regulator-min-microvolt = <5000000>;
0091 regulator-max-microvolt = <5000000>;
0092 vin-supply = <&ppvar_sys>;
0093 };
0094
0095 /* system wide semi-regulated power rail from battery or USB */
0096 ppvar_sys: regulator-var-sys {
0097 compatible = "regulator-fixed";
0098 regulator-name = "ppvar_sys";
0099 regulator-always-on;
0100 regulator-boot-on;
0101 };
0102
0103 reserved_memory: reserved-memory {
0104 #address-cells = <2>;
0105 #size-cells = <2>;
0106 ranges;
0107
0108 scp_mem_reserved: scp@50000000 {
0109 compatible = "shared-dma-pool";
0110 reg = <0 0x50000000 0 0x2900000>;
0111 no-map;
0112 };
0113
0114 wifi_restricted_dma_region: wifi@c0000000 {
0115 compatible = "restricted-dma-pool";
0116 reg = <0 0xc0000000 0 0x4000000>;
0117 };
0118 };
0119 };
0120
0121 &i2c0 {
0122 status = "okay";
0123
0124 clock-frequency = <400000>;
0125 pinctrl-names = "default";
0126 pinctrl-0 = <&i2c0_pins>;
0127
0128 touchscreen: touchscreen@10 {
0129 reg = <0x10>;
0130 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
0131 pinctrl-names = "default";
0132 pinctrl-0 = <&touchscreen_pins>;
0133 };
0134 };
0135
0136 &i2c1 {
0137 status = "okay";
0138
0139 clock-frequency = <400000>;
0140 pinctrl-names = "default";
0141 pinctrl-0 = <&i2c1_pins>;
0142 };
0143
0144 &i2c2 {
0145 status = "okay";
0146
0147 clock-frequency = <400000>;
0148 clock-stretch-ns = <12600>;
0149 pinctrl-names = "default";
0150 pinctrl-0 = <&i2c2_pins>;
0151
0152 trackpad@15 {
0153 compatible = "elan,ekth3000";
0154 reg = <0x15>;
0155 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&trackpad_pins>;
0158 vcc-supply = <&pp3300_u>;
0159 wakeup-source;
0160 };
0161 };
0162
0163 &i2c3 {
0164 status = "okay";
0165
0166 clock-frequency = <400000>;
0167 pinctrl-names = "default";
0168 pinctrl-0 = <&i2c3_pins>;
0169 };
0170
0171 &i2c7 {
0172 status = "okay";
0173
0174 clock-frequency = <400000>;
0175 pinctrl-names = "default";
0176 pinctrl-0 = <&i2c7_pins>;
0177 };
0178
0179 &mmc0 {
0180 status = "okay";
0181
0182 pinctrl-names = "default", "state_uhs";
0183 pinctrl-0 = <&mmc0_default_pins>;
0184 pinctrl-1 = <&mmc0_uhs_pins>;
0185 bus-width = <8>;
0186 max-frequency = <200000000>;
0187 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
0188 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
0189 cap-mmc-highspeed;
0190 mmc-hs200-1_8v;
0191 mmc-hs400-1_8v;
0192 supports-cqe;
0193 cap-mmc-hw-reset;
0194 mmc-hs400-enhanced-strobe;
0195 hs400-ds-delay = <0x12814>;
0196 no-sdio;
0197 no-sd;
0198 non-removable;
0199 };
0200
0201 &mmc1 {
0202 status = "okay";
0203
0204 pinctrl-names = "default", "state_uhs";
0205 pinctrl-0 = <&mmc1_default_pins>;
0206 pinctrl-1 = <&mmc1_uhs_pins>;
0207 bus-width = <4>;
0208 max-frequency = <200000000>;
0209 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
0210 vmmc-supply = <&mt6360_ldo5_reg>;
0211 vqmmc-supply = <&mt6360_ldo3_reg>;
0212 cap-sd-highspeed;
0213 sd-uhs-sdr50;
0214 sd-uhs-sdr104;
0215 no-sdio;
0216 no-mmc;
0217 };
0218
0219 /* for CORE */
0220 &mt6359_vgpu11_buck_reg {
0221 regulator-always-on;
0222 };
0223
0224 &mt6359_vgpu11_sshub_buck_reg {
0225 regulator-always-on;
0226 regulator-min-microvolt = <575000>;
0227 regulator-max-microvolt = <575000>;
0228 };
0229
0230 &mt6359_vrf12_ldo_reg {
0231 regulator-always-on;
0232 };
0233
0234 &mt6359_vufs_ldo_reg {
0235 regulator-always-on;
0236 };
0237
0238 &mt6359codec {
0239 mediatek,dmic-mode = <1>; /* one-wire */
0240 mediatek,mic-type-0 = <2>; /* DMIC */
0241 mediatek,mic-type-2 = <2>; /* DMIC */
0242 };
0243
0244 &nor_flash {
0245 status = "okay";
0246
0247 pinctrl-names = "default";
0248 pinctrl-0 = <&nor_flash_pins>;
0249 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
0250 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
0251
0252 flash@0 {
0253 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
0254 reg = <0>;
0255 spi-max-frequency = <52000000>;
0256 spi-rx-bus-width = <2>;
0257 spi-tx-bus-width = <2>;
0258 };
0259 };
0260
0261 &pcie {
0262 pinctrl-names = "default";
0263 pinctrl-0 = <&pcie_pins>;
0264
0265 pcie0: pcie@0,0 {
0266 device_type = "pci";
0267 reg = <0x0000 0 0 0 0>;
0268 num-lanes = <1>;
0269 bus-range = <0x1 0x1>;
0270
0271 #address-cells = <3>;
0272 #size-cells = <2>;
0273 ranges;
0274
0275 wifi: wifi@0,0 {
0276 reg = <0x10000 0 0 0 0x100000>,
0277 <0x10000 0 0x100000 0 0x100000>;
0278 memory-region = <&wifi_restricted_dma_region>;
0279 };
0280 };
0281 };
0282
0283 &pio {
0284 /* 220 lines */
0285 gpio-line-names = "I2S_DP_LRCK",
0286 "IS_DP_BCLK",
0287 "I2S_DP_MCLK",
0288 "I2S_DP_DATAOUT",
0289 "SAR0_INT_ODL",
0290 "EC_AP_INT_ODL",
0291 "EDPBRDG_INT_ODL",
0292 "DPBRDG_INT_ODL",
0293 "DPBRDG_PWREN",
0294 "DPBRDG_RST_ODL",
0295 "I2S_HP_MCLK",
0296 "I2S_HP_BCK",
0297 "I2S_HP_LRCK",
0298 "I2S_HP_DATAIN",
0299 /*
0300 * AP_FLASH_WP_L is crossystem ABI. Schematics
0301 * call it AP_FLASH_WP_ODL.
0302 */
0303 "AP_FLASH_WP_L",
0304 "TRACKPAD_INT_ODL",
0305 "EC_AP_HPD_OD",
0306 "SD_CD_ODL",
0307 "HP_INT_ODL_ALC",
0308 "EN_PP1000_DPBRDG",
0309 "AP_GPIO20",
0310 "TOUCH_INT_L_1V8",
0311 "UART_BT_WAKE_ODL",
0312 "AP_GPIO23",
0313 "AP_SPI_FLASH_CS_L",
0314 "AP_SPI_FLASH_CLK",
0315 "EN_PP3300_DPBRDG_DX",
0316 "AP_SPI_FLASH_MOSI",
0317 "AP_SPI_FLASH_MISO",
0318 "I2S_HP_DATAOUT",
0319 "AP_GPIO30",
0320 "I2S_SPKR_MCLK",
0321 "I2S_SPKR_BCLK",
0322 "I2S_SPKR_LRCK",
0323 "I2S_SPKR_DATAIN",
0324 "I2S_SPKR_DATAOUT",
0325 "AP_SPI_H1_TPM_CLK",
0326 "AP_SPI_H1_TPM_CS_L",
0327 "AP_SPI_H1_TPM_MISO",
0328 "AP_SPI_H1_TPM_MOSI",
0329 "BL_PWM",
0330 "EDPBRDG_PWREN",
0331 "EDPBRDG_RST_ODL",
0332 "EN_PP3300_HUB",
0333 "HUB_RST_L",
0334 "",
0335 "",
0336 "",
0337 "",
0338 "",
0339 "",
0340 "SD_CLK",
0341 "SD_CMD",
0342 "SD_DATA3",
0343 "SD_DATA0",
0344 "SD_DATA2",
0345 "SD_DATA1",
0346 "",
0347 "",
0348 "",
0349 "",
0350 "",
0351 "",
0352 "PCIE_WAKE_ODL",
0353 "PCIE_RST_L",
0354 "PCIE_CLKREQ_ODL",
0355 "",
0356 "",
0357 "",
0358 "",
0359 "",
0360 "",
0361 "",
0362 "",
0363 "",
0364 "",
0365 "",
0366 "",
0367 "",
0368 "",
0369 "",
0370 "",
0371 "",
0372 "",
0373 "",
0374 "",
0375 "",
0376 "",
0377 "",
0378 "SPMI_SCL",
0379 "SPMI_SDA",
0380 "AP_GOOD",
0381 "UART_DBG_TX_AP_RX",
0382 "UART_AP_TX_DBG_RX",
0383 "UART_AP_TX_BT_RX",
0384 "UART_BT_TX_AP_RX",
0385 "MIPI_DPI_D0_R",
0386 "MIPI_DPI_D1_R",
0387 "MIPI_DPI_D2_R",
0388 "MIPI_DPI_D3_R",
0389 "MIPI_DPI_D4_R",
0390 "MIPI_DPI_D5_R",
0391 "MIPI_DPI_D6_R",
0392 "MIPI_DPI_D7_R",
0393 "MIPI_DPI_D8_R",
0394 "MIPI_DPI_D9_R",
0395 "MIPI_DPI_D10_R",
0396 "",
0397 "",
0398 "MIPI_DPI_DE_R",
0399 "MIPI_DPI_D11_R",
0400 "MIPI_DPI_VSYNC_R",
0401 "MIPI_DPI_CLK_R",
0402 "MIPI_DPI_HSYNC_R",
0403 "PCM_BT_DATAIN",
0404 "PCM_BT_SYNC",
0405 "PCM_BT_DATAOUT",
0406 "PCM_BT_CLK",
0407 "AP_I2C_AUDIO_SCL",
0408 "AP_I2C_AUDIO_SDA",
0409 "SCP_I2C_SCL",
0410 "SCP_I2C_SDA",
0411 "AP_I2C_WLAN_SCL",
0412 "AP_I2C_WLAN_SDA",
0413 "AP_I2C_DPBRDG_SCL",
0414 "AP_I2C_DPBRDG_SDA",
0415 "EN_PP1800_DPBRDG_DX",
0416 "EN_PP3300_EDP_DX",
0417 "EN_PP1800_EDPBRDG_DX",
0418 "EN_PP1000_EDPBRDG",
0419 "SCP_JTAG0_TDO",
0420 "SCP_JTAG0_TDI",
0421 "SCP_JTAG0_TMS",
0422 "SCP_JTAG0_TCK",
0423 "SCP_JTAG0_TRSTN",
0424 "EN_PP3000_VMC_PMU",
0425 "EN_PP3300_DISPLAY_DX",
0426 "TOUCH_RST_L_1V8",
0427 "TOUCH_REPORT_DISABLE",
0428 "",
0429 "",
0430 "AP_I2C_TRACKPAD_SCL_1V8",
0431 "AP_I2C_TRACKPAD_SDA_1V8",
0432 "EN_PP3300_WLAN",
0433 "BT_KILL_L",
0434 "WIFI_KILL_L",
0435 "SET_VMC_VOLT_AT_1V8",
0436 "EN_SPK",
0437 "AP_WARM_RST_REQ",
0438 "",
0439 "",
0440 "EN_PP3000_SD_S3",
0441 "AP_EDP_BKLTEN",
0442 "",
0443 "",
0444 "",
0445 "AP_SPI_EC_CLK",
0446 "AP_SPI_EC_CS_L",
0447 "AP_SPI_EC_MISO",
0448 "AP_SPI_EC_MOSI",
0449 "AP_I2C_EDPBRDG_SCL",
0450 "AP_I2C_EDPBRDG_SDA",
0451 "MT6315_PROC_INT",
0452 "MT6315_GPU_INT",
0453 "UART_SERVO_TX_SCP_RX",
0454 "UART_SCP_TX_SERVO_RX",
0455 "BT_RTS_AP_CTS",
0456 "AP_RTS_BT_CTS",
0457 "UART_AP_WAKE_BT_ODL",
0458 "WLAN_ALERT_ODL",
0459 "EC_IN_RW_ODL",
0460 "H1_AP_INT_ODL",
0461 "",
0462 "",
0463 "",
0464 "",
0465 "",
0466 "",
0467 "",
0468 "",
0469 "",
0470 "",
0471 "",
0472 "MSDC0_CMD",
0473 "MSDC0_DAT0",
0474 "MSDC0_DAT2",
0475 "MSDC0_DAT4",
0476 "MSDC0_DAT6",
0477 "MSDC0_DAT1",
0478 "MSDC0_DAT5",
0479 "MSDC0_DAT7",
0480 "MSDC0_DSL",
0481 "MSDC0_CLK",
0482 "MSDC0_DAT3",
0483 "MSDC0_RST_L",
0484 "SCP_VREQ_VAO",
0485 "AUD_DAT_MOSI2",
0486 "AUD_NLE_MOSI1",
0487 "AUD_NLE_MOSI0",
0488 "AUD_DAT_MISO2",
0489 "AP_I2C_SAR_SDA",
0490 "AP_I2C_SAR_SCL",
0491 "AP_I2C_PWR_SCL",
0492 "AP_I2C_PWR_SDA",
0493 "AP_I2C_TS_SCL_1V8",
0494 "AP_I2C_TS_SDA_1V8",
0495 "SRCLKENA0",
0496 "SRCLKENA1",
0497 "AP_EC_WATCHDOG_L",
0498 "PWRAP_SPI0_MI",
0499 "PWRAP_SPI0_CSN",
0500 "PWRAP_SPI0_MO",
0501 "PWRAP_SPI0_CK",
0502 "AP_RTC_CLK32K",
0503 "AUD_CLK_MOSI",
0504 "AUD_SYNC_MOSI",
0505 "AUD_DAT_MOSI0",
0506 "AUD_DAT_MOSI1",
0507 "AUD_DAT_MISO0",
0508 "AUD_DAT_MISO1";
0509
0510 cr50_int: cr50-irq-default-pins {
0511 pins-gsc-ap-int-odl {
0512 pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
0513 input-enable;
0514 };
0515 };
0516
0517 cros_ec_int: cros-ec-irq-default-pins {
0518 pins-ec-ap-int-odl {
0519 pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
0520 input-enable;
0521 bias-pull-up;
0522 };
0523 };
0524
0525 i2c0_pins: i2c0-default-pins {
0526 pins-bus {
0527 pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
0528 <PINMUX_GPIO205__FUNC_SDA0>;
0529 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
0530 drive-strength-microamp = <1000>;
0531 };
0532 };
0533
0534 i2c1_pins: i2c1-default-pins {
0535 pins-bus {
0536 pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
0537 <PINMUX_GPIO119__FUNC_SDA1>;
0538 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
0539 drive-strength-microamp = <1000>;
0540 };
0541 };
0542
0543 i2c2_pins: i2c2-default-pins {
0544 pins-bus {
0545 pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
0546 <PINMUX_GPIO142__FUNC_SDA2>;
0547 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
0548 };
0549 };
0550
0551 i2c3_pins: i2c3-default-pins {
0552 pins-bus {
0553 pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
0554 <PINMUX_GPIO161__FUNC_SDA3>;
0555 bias-disable;
0556 drive-strength-microamp = <1000>;
0557 };
0558 };
0559
0560 i2c7_pins: i2c7-default-pins {
0561 pins-bus {
0562 pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
0563 <PINMUX_GPIO125__FUNC_SDA7>;
0564 bias-disable;
0565 drive-strength-microamp = <1000>;
0566 };
0567 };
0568
0569 mmc0_default_pins: mmc0-default-pins {
0570 pins-cmd-dat {
0571 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
0572 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
0573 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
0574 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
0575 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
0576 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
0577 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
0578 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
0579 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
0580 input-enable;
0581 drive-strength = <8>;
0582 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0583 };
0584
0585 pins-clk {
0586 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
0587 drive-strength = <8>;
0588 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
0589 };
0590
0591 pins-rst {
0592 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
0593 drive-strength = <8>;
0594 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
0595 };
0596 };
0597
0598 mmc0_uhs_pins: mmc0-uhs-pins {
0599 pins-cmd-dat {
0600 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
0601 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
0602 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
0603 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
0604 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
0605 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
0606 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
0607 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
0608 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
0609 input-enable;
0610 drive-strength = <10>;
0611 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0612 };
0613
0614 pins-clk {
0615 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
0616 drive-strength = <10>;
0617 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
0618 };
0619
0620 pins-rst {
0621 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
0622 drive-strength = <8>;
0623 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
0624 };
0625
0626 pins-ds {
0627 pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
0628 drive-strength = <10>;
0629 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
0630 };
0631 };
0632
0633 mmc1_default_pins: mmc1-default-pins {
0634 pins-cmd-dat {
0635 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
0636 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
0637 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
0638 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
0639 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
0640 input-enable;
0641 drive-strength = <8>;
0642 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0643 };
0644
0645 pins-clk {
0646 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
0647 drive-strength = <8>;
0648 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
0649 };
0650
0651 pins-insert {
0652 pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
0653 input-enable;
0654 bias-pull-up;
0655 };
0656 };
0657
0658 mmc1_uhs_pins: mmc1-uhs-pins {
0659 pins-cmd-dat {
0660 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
0661 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
0662 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
0663 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
0664 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
0665 input-enable;
0666 drive-strength = <8>;
0667 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
0668 };
0669
0670 pins-clk {
0671 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
0672 input-enable;
0673 drive-strength = <8>;
0674 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
0675 };
0676 };
0677
0678 nor_flash_pins: nor-flash-default-pins {
0679 pins-cs-io1 {
0680 pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
0681 <PINMUX_GPIO28__FUNC_SPINOR_IO1>;
0682 input-enable;
0683 bias-pull-up;
0684 drive-strength = <10>;
0685 };
0686
0687 pins-io0 {
0688 pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
0689 bias-pull-up;
0690 drive-strength = <10>;
0691 };
0692
0693 pins-clk {
0694 pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
0695 input-enable;
0696 bias-pull-up;
0697 drive-strength = <10>;
0698 };
0699 };
0700
0701 pcie_pins: pcie-default-pins {
0702 pins-pcie-wake {
0703 pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
0704 bias-pull-up;
0705 };
0706
0707 pins-pcie-pereset {
0708 pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
0709 };
0710
0711 pins-pcie-clkreq {
0712 pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
0713 bias-pull-up;
0714 };
0715
0716 pins-wifi-kill {
0717 pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
0718 output-high;
0719 };
0720 };
0721
0722 pp3300_wlan_pins: pp3300-wlan-pins {
0723 pins-pcie-en-pp3300-wlan {
0724 pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
0725 output-high;
0726 };
0727 };
0728
0729 scp_pins: scp-pins {
0730 pins-vreq-vao {
0731 pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
0732 };
0733 };
0734
0735 spi1_pins: spi1-default-pins {
0736 pins-cs-mosi-clk {
0737 pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
0738 <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
0739 <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
0740 bias-disable;
0741 };
0742
0743 pins-miso {
0744 pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
0745 bias-pull-down;
0746 };
0747 };
0748
0749 spi5_pins: spi5-default-pins {
0750 pins-bus {
0751 pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
0752 <PINMUX_GPIO37__FUNC_GPIO37>,
0753 <PINMUX_GPIO39__FUNC_SPI5_A_MO>,
0754 <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
0755 bias-disable;
0756 };
0757 };
0758
0759 trackpad_pins: trackpad-default-pins {
0760 pins-int-n {
0761 pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
0762 input-enable;
0763 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
0764 };
0765 };
0766
0767 touchscreen_pins: touchscreen-default-pins {
0768 pins-irq {
0769 pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
0770 input-enable;
0771 bias-pull-up;
0772 };
0773
0774 pins-reset {
0775 pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
0776 output-high;
0777 };
0778
0779 pins-report-sw {
0780 pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
0781 output-low;
0782 };
0783 };
0784 };
0785
0786 &pmic {
0787 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
0788 };
0789
0790 &scp {
0791 status = "okay";
0792
0793 firmware-name = "mediatek/mt8192/scp.img";
0794 memory-region = <&scp_mem_reserved>;
0795 pinctrl-names = "default";
0796 pinctrl-0 = <&scp_pins>;
0797
0798 cros-ec {
0799 compatible = "google,cros-ec-rpmsg";
0800 mediatek,rpmsg-name = "cros-ec-rpmsg";
0801 };
0802 };
0803
0804 &spi1 {
0805 status = "okay";
0806
0807 mediatek,pad-select = <0>;
0808 pinctrl-names = "default";
0809 pinctrl-0 = <&spi1_pins>;
0810
0811 cros_ec: ec@0 {
0812 compatible = "google,cros-ec-spi";
0813 reg = <0>;
0814 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
0815 spi-max-frequency = <3000000>;
0816 pinctrl-names = "default";
0817 pinctrl-0 = <&cros_ec_int>;
0818
0819 #address-cells = <1>;
0820 #size-cells = <0>;
0821
0822 base_detection: cbas {
0823 compatible = "google,cros-cbas";
0824 };
0825
0826 cros_ec_pwm: pwm {
0827 compatible = "google,cros-ec-pwm";
0828 #pwm-cells = <1>;
0829
0830 status = "disabled";
0831 };
0832
0833 i2c_tunnel: i2c-tunnel {
0834 compatible = "google,cros-ec-i2c-tunnel";
0835 google,remote-bus = <0>;
0836 #address-cells = <1>;
0837 #size-cells = <0>;
0838 };
0839
0840 mt6360_ldo3_reg: regulator@0 {
0841 compatible = "google,cros-ec-regulator";
0842 reg = <0>;
0843 regulator-min-microvolt = <1800000>;
0844 regulator-max-microvolt = <3300000>;
0845 };
0846
0847 mt6360_ldo5_reg: regulator@1 {
0848 compatible = "google,cros-ec-regulator";
0849 reg = <1>;
0850 regulator-min-microvolt = <3300000>;
0851 regulator-max-microvolt = <3300000>;
0852 };
0853
0854 typec {
0855 compatible = "google,cros-ec-typec";
0856 #address-cells = <1>;
0857 #size-cells = <0>;
0858
0859 usb_c0: connector@0 {
0860 compatible = "usb-c-connector";
0861 reg = <0>;
0862 label = "left";
0863 power-role = "dual";
0864 data-role = "host";
0865 try-power-role = "source";
0866 };
0867
0868 usb_c1: connector@1 {
0869 compatible = "usb-c-connector";
0870 reg = <1>;
0871 label = "right";
0872 power-role = "dual";
0873 data-role = "host";
0874 try-power-role = "source";
0875 };
0876 };
0877 };
0878 };
0879
0880 &spi5 {
0881 status = "okay";
0882
0883 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
0884 mediatek,pad-select = <0>;
0885 pinctrl-names = "default";
0886 pinctrl-0 = <&spi5_pins>;
0887
0888 cr50@0 {
0889 compatible = "google,cr50";
0890 reg = <0>;
0891 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
0892 spi-max-frequency = <1000000>;
0893 pinctrl-names = "default";
0894 pinctrl-0 = <&cr50_int>;
0895 };
0896 };
0897
0898 &spmi {
0899 #address-cells = <2>;
0900 #size-cells = <0>;
0901
0902 mt6315_6: pmic@6 {
0903 compatible = "mediatek,mt6315-regulator";
0904 reg = <0x6 SPMI_USID>;
0905
0906 regulators {
0907 mt6315_6_vbuck1: vbuck1 {
0908 regulator-compatible = "vbuck1";
0909 regulator-name = "Vbcpu";
0910 regulator-min-microvolt = <300000>;
0911 regulator-max-microvolt = <1193750>;
0912 regulator-enable-ramp-delay = <256>;
0913 regulator-allowed-modes = <0 1 2>;
0914 regulator-always-on;
0915 };
0916
0917 mt6315_6_vbuck3: vbuck3 {
0918 regulator-compatible = "vbuck3";
0919 regulator-name = "Vlcpu";
0920 regulator-min-microvolt = <300000>;
0921 regulator-max-microvolt = <1193750>;
0922 regulator-enable-ramp-delay = <256>;
0923 regulator-allowed-modes = <0 1 2>;
0924 regulator-always-on;
0925 };
0926 };
0927 };
0928
0929 mt6315_7: pmic@7 {
0930 compatible = "mediatek,mt6315-regulator";
0931 reg = <0x7 SPMI_USID>;
0932
0933 regulators {
0934 mt6315_7_vbuck1: vbuck1 {
0935 regulator-compatible = "vbuck1";
0936 regulator-name = "Vgpu";
0937 regulator-min-microvolt = <606250>;
0938 regulator-max-microvolt = <1193750>;
0939 regulator-enable-ramp-delay = <256>;
0940 regulator-allowed-modes = <0 1 2>;
0941 };
0942 };
0943 };
0944 };
0945
0946 &uart0 {
0947 status = "okay";
0948 };
0949
0950 &xhci {
0951 status = "okay";
0952
0953 wakeup-source;
0954 vusb33-supply = <&pp3300_g>;
0955 vbus-supply = <&pp5000_a>;
0956 };
0957
0958 #include <arm/cros-ec-keyboard.dtsi>
0959 #include <arm/cros-ec-sbs.dtsi>
