0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright (c) 2021 BayLibre, SAS.
0004 * Author: Fabien Parent <fparent@baylibre.com>
0005 */
0006
0007 /dts-v1/;
0008
0009 #include <dt-bindings/gpio/gpio.h>
0010 #include "mt8183.dtsi"
0011 #include "mt6358.dtsi"
0012
0013 / {
0014 model = "Pumpkin MT8183";
0015 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
0016
0017 aliases {
0018 serial0 = &uart0;
0019 };
0020
0021 memory@40000000 {
0022 device_type = "memory";
0023 reg = <0 0x40000000 0 0x80000000>;
0024 };
0025
0026 chosen {
0027 stdout-path = "serial0:921600n8";
0028 };
0029
0030 reserved-memory {
0031 #address-cells = <2>;
0032 #size-cells = <2>;
0033 ranges;
0034
0035 scp_mem_reserved: scp_mem_region@50000000 {
0036 compatible = "shared-dma-pool";
0037 reg = <0 0x50000000 0 0x2900000>;
0038 no-map;
0039 };
0040 };
0041
0042 leds {
0043 compatible = "gpio-leds";
0044
0045 led-red {
0046 label = "red";
0047 gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
0048 default-state = "off";
0049 };
0050
0051 led-green {
0052 label = "green";
0053 gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
0054 default-state = "off";
0055 };
0056 };
0057
0058 thermistor {
0059 compatible = "murata,ncp03wf104";
0060 pullup-uv = <1800000>;
0061 pullup-ohm = <390000>;
0062 pulldown-ohm = <0>;
0063 io-channels = <&auxadc 0>;
0064 };
0065 };
0066
0067 &auxadc {
0068 status = "okay";
0069 };
0070
0071 &gpu {
0072 mali-supply = <&mt6358_vgpu_reg>;
0073 sram-supply = <&mt6358_vsram_gpu_reg>;
0074 };
0075
0076 &i2c0 {
0077 pinctrl-names = "default";
0078 pinctrl-0 = <&i2c_pins_0>;
0079 status = "okay";
0080 clock-frequency = <100000>;
0081 };
0082
0083 &i2c1 {
0084 pinctrl-names = "default";
0085 pinctrl-0 = <&i2c_pins_1>;
0086 status = "okay";
0087 clock-frequency = <100000>;
0088 };
0089
0090 &i2c2 {
0091 pinctrl-names = "default";
0092 pinctrl-0 = <&i2c_pins_2>;
0093 status = "okay";
0094 clock-frequency = <100000>;
0095 };
0096
0097 &i2c3 {
0098 pinctrl-names = "default";
0099 pinctrl-0 = <&i2c_pins_3>;
0100 status = "okay";
0101 clock-frequency = <100000>;
0102 };
0103
0104 &i2c4 {
0105 pinctrl-names = "default";
0106 pinctrl-0 = <&i2c_pins_4>;
0107 status = "okay";
0108 clock-frequency = <100000>;
0109 };
0110
0111 &i2c5 {
0112 pinctrl-names = "default";
0113 pinctrl-0 = <&i2c_pins_5>;
0114 status = "okay";
0115 clock-frequency = <100000>;
0116 };
0117
0118 &i2c6 {
0119 pinctrl-names = "default";
0120 pinctrl-0 = <&i2c6_pins>;
0121 status = "okay";
0122 clock-frequency = <100000>;
0123 };
0124
0125 &mmc0 {
0126 status = "okay";
0127 pinctrl-names = "default", "state_uhs";
0128 pinctrl-0 = <&mmc0_pins_default>;
0129 pinctrl-1 = <&mmc0_pins_uhs>;
0130 bus-width = <8>;
0131 max-frequency = <200000000>;
0132 cap-mmc-highspeed;
0133 mmc-hs200-1_8v;
0134 mmc-hs400-1_8v;
0135 cap-mmc-hw-reset;
0136 no-sdio;
0137 no-sd;
0138 hs400-ds-delay = <0x12814>;
0139 vmmc-supply = <&mt6358_vemc_reg>;
0140 vqmmc-supply = <&mt6358_vio18_reg>;
0141 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
0142 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
0143 non-removable;
0144 };
0145
0146 &mmc1 {
0147 status = "okay";
0148 pinctrl-names = "default", "state_uhs";
0149 pinctrl-0 = <&mmc1_pins_default>;
0150 pinctrl-1 = <&mmc1_pins_uhs>;
0151 bus-width = <4>;
0152 max-frequency = <200000000>;
0153 cap-sd-highspeed;
0154 sd-uhs-sdr50;
0155 sd-uhs-sdr104;
0156 cap-sdio-irq;
0157 no-mmc;
0158 no-sd;
0159 vmmc-supply = <&mt6358_vmch_reg>;
0160 vqmmc-supply = <&mt6358_vmc_reg>;
0161 keep-power-in-suspend;
0162 wakeup-source;
0163 non-removable;
0164 };
0165
0166 &pio {
0167 i2c_pins_0: i2c0 {
0168 pins_i2c{
0169 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
0170 <PINMUX_GPIO83__FUNC_SCL0>;
0171 mediatek,pull-up-adv = <3>;
0172 mediatek,drive-strength-adv = <00>;
0173 };
0174 };
0175
0176 i2c_pins_1: i2c1 {
0177 pins_i2c{
0178 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
0179 <PINMUX_GPIO84__FUNC_SCL1>;
0180 mediatek,pull-up-adv = <3>;
0181 mediatek,drive-strength-adv = <00>;
0182 };
0183 };
0184
0185 i2c_pins_2: i2c2 {
0186 pins_i2c{
0187 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
0188 <PINMUX_GPIO104__FUNC_SDA2>;
0189 mediatek,pull-up-adv = <3>;
0190 mediatek,drive-strength-adv = <00>;
0191 };
0192 };
0193
0194 i2c_pins_3: i2c3 {
0195 pins_i2c{
0196 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
0197 <PINMUX_GPIO51__FUNC_SDA3>;
0198 mediatek,pull-up-adv = <3>;
0199 mediatek,drive-strength-adv = <00>;
0200 };
0201 };
0202
0203 i2c_pins_4: i2c4 {
0204 pins_i2c{
0205 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
0206 <PINMUX_GPIO106__FUNC_SDA4>;
0207 mediatek,pull-up-adv = <3>;
0208 mediatek,drive-strength-adv = <00>;
0209 };
0210 };
0211
0212 i2c_pins_5: i2c5 {
0213 pins_i2c{
0214 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
0215 <PINMUX_GPIO49__FUNC_SDA5>;
0216 mediatek,pull-up-adv = <3>;
0217 mediatek,drive-strength-adv = <00>;
0218 };
0219 };
0220
0221 i2c6_pins: i2c6 {
0222 pins_cmd_dat {
0223 pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
0224 <PINMUX_GPIO114__FUNC_SDA6>;
0225 mediatek,pull-up-adv = <3>;
0226 };
0227 };
0228
0229 mmc0_pins_default: mmc0-pins-default {
0230 pins_cmd_dat {
0231 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
0232 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
0233 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
0234 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
0235 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
0236 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
0237 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
0238 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
0239 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
0240 input-enable;
0241 drive-strength = <MTK_DRIVE_14mA>;
0242 mediatek,pull-up-adv = <01>;
0243 };
0244
0245 pins_clk {
0246 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
0247 drive-strength = <MTK_DRIVE_14mA>;
0248 mediatek,pull-down-adv = <10>;
0249 };
0250
0251 pins_rst {
0252 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
0253 drive-strength = <MTK_DRIVE_14mA>;
0254 mediatek,pull-down-adv = <01>;
0255 };
0256 };
0257
0258 mmc0_pins_uhs: mmc0-pins-uhs {
0259 pins_cmd_dat {
0260 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
0261 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
0262 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
0263 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
0264 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
0265 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
0266 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
0267 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
0268 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
0269 input-enable;
0270 drive-strength = <MTK_DRIVE_14mA>;
0271 mediatek,pull-up-adv = <01>;
0272 };
0273
0274 pins_clk {
0275 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
0276 drive-strength = <MTK_DRIVE_14mA>;
0277 mediatek,pull-down-adv = <10>;
0278 };
0279
0280 pins_ds {
0281 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
0282 drive-strength = <MTK_DRIVE_14mA>;
0283 mediatek,pull-down-adv = <10>;
0284 };
0285
0286 pins_rst {
0287 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
0288 drive-strength = <MTK_DRIVE_14mA>;
0289 mediatek,pull-up-adv = <01>;
0290 };
0291 };
0292
0293 mmc1_pins_default: mmc1-pins-default {
0294 pins_cmd_dat {
0295 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
0296 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
0297 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
0298 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
0299 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
0300 input-enable;
0301 mediatek,pull-up-adv = <10>;
0302 };
0303
0304 pins_clk {
0305 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
0306 input-enable;
0307 mediatek,pull-down-adv = <10>;
0308 };
0309
0310 pins_pmu {
0311 pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
0312 output-high;
0313 };
0314 };
0315
0316 mmc1_pins_uhs: mmc1-pins-uhs {
0317 pins_cmd_dat {
0318 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
0319 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
0320 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
0321 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
0322 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
0323 drive-strength = <MTK_DRIVE_6mA>;
0324 input-enable;
0325 mediatek,pull-up-adv = <10>;
0326 };
0327
0328 pins_clk {
0329 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
0330 drive-strength = <MTK_DRIVE_8mA>;
0331 mediatek,pull-down-adv = <10>;
0332 input-enable;
0333 };
0334 };
0335 };
0336
0337 &mfg {
0338 domain-supply = <&mt6358_vgpu_reg>;
0339 };
0340
0341 &cpu0 {
0342 proc-supply = <&mt6358_vproc12_reg>;
0343 };
0344
0345 &cpu1 {
0346 proc-supply = <&mt6358_vproc12_reg>;
0347 };
0348
0349 &cpu2 {
0350 proc-supply = <&mt6358_vproc12_reg>;
0351 };
0352
0353 &cpu3 {
0354 proc-supply = <&mt6358_vproc12_reg>;
0355 };
0356
0357 &cpu4 {
0358 proc-supply = <&mt6358_vproc11_reg>;
0359 };
0360
0361 &cpu5 {
0362 proc-supply = <&mt6358_vproc11_reg>;
0363 };
0364
0365 &cpu6 {
0366 proc-supply = <&mt6358_vproc11_reg>;
0367 };
0368
0369 &cpu7 {
0370 proc-supply = <&mt6358_vproc11_reg>;
0371 };
0372
0373 &uart0 {
0374 status = "okay";
0375 };
0376
0377 &scp {
0378 status = "okay";
0379 };
0380
0381 &dsi0 {
0382 status = "disabled";
0383 };
