0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright (c) 2018 MediaTek Inc.
0004 * Author: Ben Ho <ben.ho@mediatek.com>
0005 * Erin Lo <erin.lo@mediatek.com>
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010 #include "mt8183.dtsi"
0011 #include "mt6358.dtsi"
0012
0013 / {
0014 aliases {
0015 serial0 = &uart0;
0016 mmc0 = &mmc0;
0017 mmc1 = &mmc1;
0018 };
0019
0020 chosen {
0021 stdout-path = "serial0:115200n8";
0022 };
0023
0024 backlight_lcd0: backlight_lcd0 {
0025 compatible = "pwm-backlight";
0026 pwms = <&pwm0 0 500000>;
0027 power-supply = <&bl_pp5000>;
0028 enable-gpios = <&pio 176 0>;
0029 brightness-levels = <0 1023>;
0030 num-interpolated-steps = <1023>;
0031 default-brightness-level = <576>;
0032 status = "okay";
0033 };
0034
0035 memory@40000000 {
0036 device_type = "memory";
0037 reg = <0 0x40000000 0 0x80000000>;
0038 };
0039
0040 clk32k: oscillator1 {
0041 compatible = "fixed-clock";
0042 #clock-cells = <0>;
0043 clock-frequency = <32768>;
0044 clock-output-names = "clk32k";
0045 };
0046
0047 it6505_pp18_reg: regulator0 {
0048 compatible = "regulator-fixed";
0049 regulator-name = "it6505_pp18";
0050 regulator-min-microvolt = <1800000>;
0051 regulator-max-microvolt = <1800000>;
0052 gpio = <&pio 178 0>;
0053 enable-active-high;
0054 };
0055
0056 lcd_pp3300: regulator1 {
0057 compatible = "regulator-fixed";
0058 regulator-name = "lcd_pp3300";
0059 regulator-min-microvolt = <3300000>;
0060 regulator-max-microvolt = <3300000>;
0061 regulator-always-on;
0062 regulator-boot-on;
0063 };
0064
0065 bl_pp5000: regulator2 {
0066 compatible = "regulator-fixed";
0067 regulator-name = "bl_pp5000";
0068 regulator-min-microvolt = <5000000>;
0069 regulator-max-microvolt = <5000000>;
0070 regulator-always-on;
0071 regulator-boot-on;
0072 };
0073
0074 mmc1_fixed_power: regulator3 {
0075 compatible = "regulator-fixed";
0076 regulator-name = "mmc1_power";
0077 regulator-min-microvolt = <3300000>;
0078 regulator-max-microvolt = <3300000>;
0079 };
0080
0081 mmc1_fixed_io: regulator4 {
0082 compatible = "regulator-fixed";
0083 regulator-name = "mmc1_io";
0084 regulator-min-microvolt = <1800000>;
0085 regulator-max-microvolt = <1800000>;
0086 };
0087
0088 pp1800_alw: regulator5 {
0089 compatible = "regulator-fixed";
0090 regulator-name = "pp1800_alw";
0091 regulator-always-on;
0092 regulator-boot-on;
0093 regulator-min-microvolt = <1800000>;
0094 regulator-max-microvolt = <1800000>;
0095 };
0096
0097 pp3300_alw: regulator6 {
0098 compatible = "regulator-fixed";
0099 regulator-name = "pp3300_alw";
0100 regulator-always-on;
0101 regulator-boot-on;
0102 regulator-min-microvolt = <3300000>;
0103 regulator-max-microvolt = <3300000>;
0104 };
0105
0106 reserved_memory: reserved-memory {
0107 #address-cells = <2>;
0108 #size-cells = <2>;
0109 ranges;
0110
0111 scp_mem_reserved: scp_mem_region {
0112 compatible = "shared-dma-pool";
0113 reg = <0 0x50000000 0 0x2900000>;
0114 no-map;
0115 };
0116 };
0117
0118 sound: mt8183-sound {
0119 mediatek,platform = <&afe>;
0120 pinctrl-names = "default",
0121 "aud_tdm_out_on",
0122 "aud_tdm_out_off";
0123 pinctrl-0 = <&aud_pins_default>;
0124 pinctrl-1 = <&aud_pins_tdm_out_on>;
0125 pinctrl-2 = <&aud_pins_tdm_out_off>;
0126 status = "okay";
0127 };
0128
0129 btsco: bt-sco {
0130 compatible = "linux,bt-sco";
0131 };
0132
0133 wifi_pwrseq: wifi-pwrseq {
0134 compatible = "mmc-pwrseq-simple";
0135 pinctrl-names = "default";
0136 pinctrl-0 = <&wifi_pins_pwrseq>;
0137
0138 /* Toggle WIFI_ENABLE to reset the chip. */
0139 reset-gpios = <&pio 119 1>;
0140 };
0141
0142 wifi_wakeup: wifi-wakeup {
0143 compatible = "gpio-keys";
0144 pinctrl-names = "default";
0145 pinctrl-0 = <&wifi_pins_wakeup>;
0146
0147 button-wowlan {
0148 label = "Wake on WiFi";
0149 gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
0150 linux,code = <KEY_WAKEUP>;
0151 wakeup-source;
0152 };
0153 };
0154
0155 tboard_thermistor1: thermal-sensor1 {
0156 compatible = "generic-adc-thermal";
0157 #thermal-sensor-cells = <0>;
0158 io-channels = <&auxadc 0>;
0159 io-channel-names = "sensor-channel";
0160 temperature-lookup-table = < (-5000) 1553
0161 0 1488
0162 5000 1412
0163 10000 1326
0164 15000 1232
0165 20000 1132
0166 25000 1029
0167 30000 925
0168 35000 823
0169 40000 726
0170 45000 635
0171 50000 552
0172 55000 478
0173 60000 411
0174 65000 353
0175 70000 303
0176 75000 260
0177 80000 222
0178 85000 190
0179 90000 163
0180 95000 140
0181 100000 121
0182 105000 104
0183 110000 90
0184 115000 78
0185 120000 67
0186 125000 59>;
0187 };
0188
0189 tboard_thermistor2: thermal-sensor2 {
0190 compatible = "generic-adc-thermal";
0191 #thermal-sensor-cells = <0>;
0192 io-channels = <&auxadc 1>;
0193 io-channel-names = "sensor-channel";
0194 temperature-lookup-table = < (-5000) 1553
0195 0 1488
0196 5000 1412
0197 10000 1326
0198 15000 1232
0199 20000 1132
0200 25000 1029
0201 30000 925
0202 35000 823
0203 40000 726
0204 45000 635
0205 50000 552
0206 55000 478
0207 60000 411
0208 65000 353
0209 70000 303
0210 75000 260
0211 80000 222
0212 85000 190
0213 90000 163
0214 95000 140
0215 100000 121
0216 105000 104
0217 110000 90
0218 115000 78
0219 120000 67
0220 125000 59>;
0221 };
0222 };
0223
0224 &afe {
0225 i2s3-share = "I2S2";
0226 i2s0-share = "I2S5";
0227 };
0228
0229 &auxadc {
0230 status = "okay";
0231 };
0232
0233 &cci {
0234 proc-supply = <&mt6358_vproc12_reg>;
0235 };
0236
0237 &cpu0 {
0238 proc-supply = <&mt6358_vproc12_reg>;
0239 };
0240
0241 &cpu1 {
0242 proc-supply = <&mt6358_vproc12_reg>;
0243 };
0244
0245 &cpu2 {
0246 proc-supply = <&mt6358_vproc12_reg>;
0247 };
0248
0249 &cpu3 {
0250 proc-supply = <&mt6358_vproc12_reg>;
0251 };
0252
0253 &cpu4 {
0254 proc-supply = <&mt6358_vproc11_reg>;
0255 };
0256
0257 &cpu5 {
0258 proc-supply = <&mt6358_vproc11_reg>;
0259 };
0260
0261 &cpu6 {
0262 proc-supply = <&mt6358_vproc11_reg>;
0263 };
0264
0265 &cpu7 {
0266 proc-supply = <&mt6358_vproc11_reg>;
0267 };
0268
0269 &dsi0 {
0270 status = "okay";
0271 #address-cells = <1>;
0272 #size-cells = <0>;
0273 panel: panel@0 {
0274 /* compatible will be set in board dts */
0275 reg = <0>;
0276 enable-gpios = <&pio 45 0>;
0277 pinctrl-names = "default";
0278 pinctrl-0 = <&panel_pins_default>;
0279 avdd-supply = <&ppvarn_lcd>;
0280 avee-supply = <&ppvarp_lcd>;
0281 pp1800-supply = <&pp1800_lcd>;
0282 backlight = <&backlight_lcd0>;
0283 rotation = <270>;
0284 port {
0285 panel_in: endpoint {
0286 remote-endpoint = <&dsi_out>;
0287 };
0288 };
0289 };
0290
0291 ports {
0292 port {
0293 dsi_out: endpoint {
0294 remote-endpoint = <&panel_in>;
0295 };
0296 };
0297 };
0298 };
0299
0300 &gpu {
0301 mali-supply = <&mt6358_vgpu_reg>;
0302 sram-supply = <&mt6358_vsram_gpu_reg>;
0303 };
0304
0305 &i2c0 {
0306 pinctrl-names = "default";
0307 pinctrl-0 = <&i2c0_pins>;
0308 status = "okay";
0309 clock-frequency = <400000>;
0310 #address-cells = <1>;
0311 #size-cells = <0>;
0312 };
0313
0314 &i2c1 {
0315 pinctrl-names = "default";
0316 pinctrl-0 = <&i2c1_pins>;
0317 status = "okay";
0318 clock-frequency = <100000>;
0319 };
0320
0321 &i2c3 {
0322 pinctrl-names = "default";
0323 pinctrl-0 = <&i2c3_pins>;
0324 status = "okay";
0325 clock-frequency = <100000>;
0326 #address-cells = <1>;
0327 #size-cells = <0>;
0328 };
0329
0330 &i2c5 {
0331 pinctrl-names = "default";
0332 pinctrl-0 = <&i2c5_pins>;
0333 status = "okay";
0334 clock-frequency = <100000>;
0335 #address-cells = <1>;
0336 #size-cells = <0>;
0337 };
0338
0339 &i2c6 {
0340 pinctrl-names = "default";
0341 pinctrl-0 = <&i2c6_pins>;
0342 status = "okay";
0343 clock-frequency = <100000>;
0344 };
0345
0346 &mipi_tx0 {
0347 status = "okay";
0348 };
0349
0350 &mmc0 {
0351 status = "okay";
0352 pinctrl-names = "default", "state_uhs";
0353 pinctrl-0 = <&mmc0_pins_default>;
0354 pinctrl-1 = <&mmc0_pins_uhs>;
0355 bus-width = <8>;
0356 max-frequency = <200000000>;
0357 cap-mmc-highspeed;
0358 mmc-hs200-1_8v;
0359 mmc-hs400-1_8v;
0360 cap-mmc-hw-reset;
0361 no-sdio;
0362 no-sd;
0363 hs400-ds-delay = <0x12814>;
0364 vmmc-supply = <&mt6358_vemc_reg>;
0365 vqmmc-supply = <&mt6358_vio18_reg>;
0366 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
0367 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
0368 non-removable;
0369 };
0370
0371 &mmc1 {
0372 status = "okay";
0373 pinctrl-names = "default", "state_uhs";
0374 pinctrl-0 = <&mmc1_pins_default>;
0375 pinctrl-1 = <&mmc1_pins_uhs>;
0376 vmmc-supply = <&mmc1_fixed_power>;
0377 vqmmc-supply = <&mmc1_fixed_io>;
0378 mmc-pwrseq = <&wifi_pwrseq>;
0379 bus-width = <4>;
0380 max-frequency = <200000000>;
0381 drv-type = <2>;
0382 cap-sd-highspeed;
0383 sd-uhs-sdr50;
0384 sd-uhs-sdr104;
0385 keep-power-in-suspend;
0386 wakeup-source;
0387 cap-sdio-irq;
0388 non-removable;
0389 no-mmc;
0390 no-sd;
0391 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
0392 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
0393 #address-cells = <1>;
0394 #size-cells = <0>;
0395
0396 qca_wifi: qca-wifi@1 {
0397 compatible = "qcom,ath10k";
0398 reg = <1>;
0399 };
0400 };
0401
0402 &mt6358_vdram2_reg {
0403 regulator-always-on;
0404 };
0405
0406 &mt6358codec {
0407 Avdd-supply = <&mt6358_vaud28_reg>;
0408 };
0409
0410 &mt6358_vsim1_reg {
0411 regulator-min-microvolt = <2700000>;
0412 regulator-max-microvolt = <2700000>;
0413 };
0414
0415 &mt6358_vsim2_reg {
0416 regulator-min-microvolt = <2700000>;
0417 regulator-max-microvolt = <2700000>;
0418 };
0419
0420 &pio {
0421 aud_pins_default: audiopins {
0422 pins_bus {
0423 pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
0424 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
0425 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
0426 <PINMUX_GPIO102__FUNC_I2S2_DI>,
0427 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
0428 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
0429 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
0430 <PINMUX_GPIO91__FUNC_I2S5_DO>,
0431 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
0432 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
0433 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
0434 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
0435 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
0436 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
0437 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
0438 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
0439 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
0440 };
0441 };
0442
0443 aud_pins_tdm_out_on: audiotdmouton {
0444 pins_bus {
0445 pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
0446 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
0447 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
0448 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
0449 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
0450 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
0451 drive-strength = <MTK_DRIVE_6mA>;
0452 };
0453 };
0454
0455 aud_pins_tdm_out_off: audiotdmoutoff {
0456 pins_bus {
0457 pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
0458 <PINMUX_GPIO170__FUNC_GPIO170>,
0459 <PINMUX_GPIO171__FUNC_GPIO171>,
0460 <PINMUX_GPIO172__FUNC_GPIO172>,
0461 <PINMUX_GPIO173__FUNC_GPIO173>,
0462 <PINMUX_GPIO10__FUNC_GPIO10>;
0463 input-enable;
0464 bias-pull-down;
0465 drive-strength = <MTK_DRIVE_2mA>;
0466 };
0467 };
0468
0469 bt_pins: bt-pins {
0470 pins_bt_en {
0471 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
0472 output-low;
0473 };
0474 };
0475
0476 ec_ap_int_odl: ec_ap_int_odl {
0477 pins1 {
0478 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
0479 input-enable;
0480 bias-pull-up;
0481 };
0482 };
0483
0484 h1_int_od_l: h1_int_od_l {
0485 pins1 {
0486 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
0487 input-enable;
0488 };
0489 };
0490
0491 i2c0_pins: i2c0 {
0492 pins_bus {
0493 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
0494 <PINMUX_GPIO83__FUNC_SCL0>;
0495 mediatek,pull-up-adv = <3>;
0496 mediatek,drive-strength-adv = <00>;
0497 };
0498 };
0499
0500 i2c1_pins: i2c1 {
0501 pins_bus {
0502 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
0503 <PINMUX_GPIO84__FUNC_SCL1>;
0504 mediatek,pull-up-adv = <3>;
0505 mediatek,drive-strength-adv = <00>;
0506 };
0507 };
0508
0509 i2c2_pins: i2c2 {
0510 pins_bus {
0511 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
0512 <PINMUX_GPIO104__FUNC_SDA2>;
0513 bias-disable;
0514 mediatek,drive-strength-adv = <00>;
0515 };
0516 };
0517
0518 i2c3_pins: i2c3 {
0519 pins_bus {
0520 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
0521 <PINMUX_GPIO51__FUNC_SDA3>;
0522 mediatek,pull-up-adv = <3>;
0523 mediatek,drive-strength-adv = <00>;
0524 };
0525 };
0526
0527 i2c4_pins: i2c4 {
0528 pins_bus {
0529 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
0530 <PINMUX_GPIO106__FUNC_SDA4>;
0531 bias-disable;
0532 mediatek,drive-strength-adv = <00>;
0533 };
0534 };
0535
0536 i2c5_pins: i2c5 {
0537 pins_bus {
0538 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
0539 <PINMUX_GPIO49__FUNC_SDA5>;
0540 mediatek,pull-up-adv = <3>;
0541 mediatek,drive-strength-adv = <00>;
0542 };
0543 };
0544
0545 i2c6_pins: i2c6 {
0546 pins_bus {
0547 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
0548 <PINMUX_GPIO12__FUNC_SDA6>;
0549 bias-disable;
0550 };
0551 };
0552
0553 mmc0_pins_default: mmc0-pins-default {
0554 pins_cmd_dat {
0555 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
0556 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
0557 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
0558 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
0559 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
0560 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
0561 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
0562 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
0563 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
0564 input-enable;
0565 drive-strength = <MTK_DRIVE_14mA>;
0566 mediatek,pull-up-adv = <01>;
0567 };
0568
0569 pins_clk {
0570 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
0571 drive-strength = <MTK_DRIVE_14mA>;
0572 mediatek,pull-down-adv = <10>;
0573 };
0574
0575 pins_rst {
0576 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
0577 drive-strength = <MTK_DRIVE_14mA>;
0578 mediatek,pull-down-adv = <01>;
0579 };
0580 };
0581
0582 mmc0_pins_uhs: mmc0-pins-uhs {
0583 pins_cmd_dat {
0584 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
0585 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
0586 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
0587 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
0588 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
0589 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
0590 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
0591 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
0592 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
0593 input-enable;
0594 drive-strength = <MTK_DRIVE_14mA>;
0595 mediatek,pull-up-adv = <01>;
0596 };
0597
0598 pins_clk {
0599 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
0600 drive-strength = <MTK_DRIVE_14mA>;
0601 mediatek,pull-down-adv = <10>;
0602 };
0603
0604 pins_ds {
0605 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
0606 drive-strength = <MTK_DRIVE_14mA>;
0607 mediatek,pull-down-adv = <10>;
0608 };
0609
0610 pins_rst {
0611 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
0612 drive-strength = <MTK_DRIVE_14mA>;
0613 mediatek,pull-up-adv = <01>;
0614 };
0615 };
0616
0617 mmc1_pins_default: mmc1-pins-default {
0618 pins_cmd_dat {
0619 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
0620 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
0621 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
0622 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
0623 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
0624 input-enable;
0625 mediatek,pull-up-adv = <10>;
0626 };
0627
0628 pins_clk {
0629 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
0630 input-enable;
0631 mediatek,pull-down-adv = <10>;
0632 };
0633 };
0634
0635 mmc1_pins_uhs: mmc1-pins-uhs {
0636 pins_cmd_dat {
0637 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
0638 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
0639 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
0640 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
0641 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
0642 drive-strength = <MTK_DRIVE_6mA>;
0643 input-enable;
0644 mediatek,pull-up-adv = <10>;
0645 };
0646
0647 pins_clk {
0648 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
0649 drive-strength = <MTK_DRIVE_8mA>;
0650 mediatek,pull-down-adv = <10>;
0651 input-enable;
0652 };
0653 };
0654
0655 panel_pins_default: panel_pins_default {
0656 panel_reset {
0657 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
0658 output-low;
0659 bias-pull-up;
0660 };
0661 };
0662
0663 pwm0_pin_default: pwm0_pin_default {
0664 pins1 {
0665 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
0666 output-high;
0667 bias-pull-up;
0668 };
0669 pins2 {
0670 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
0671 };
0672 };
0673
0674 scp_pins: scp {
0675 pins_scp_uart {
0676 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
0677 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
0678 };
0679 };
0680
0681 spi0_pins: spi0 {
0682 pins_spi{
0683 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
0684 <PINMUX_GPIO86__FUNC_GPIO86>,
0685 <PINMUX_GPIO87__FUNC_SPI0_MO>,
0686 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
0687 bias-disable;
0688 };
0689 };
0690
0691 spi1_pins: spi1 {
0692 pins_spi{
0693 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
0694 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
0695 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
0696 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
0697 bias-disable;
0698 };
0699 };
0700
0701 spi2_pins: spi2 {
0702 pins_spi{
0703 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
0704 <PINMUX_GPIO1__FUNC_SPI2_MO>,
0705 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
0706 bias-disable;
0707 };
0708 pins_spi_mi {
0709 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
0710 mediatek,pull-down-adv = <00>;
0711 };
0712 };
0713
0714 spi3_pins: spi3 {
0715 pins_spi{
0716 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
0717 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
0718 <PINMUX_GPIO23__FUNC_SPI3_MO>,
0719 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
0720 bias-disable;
0721 };
0722 };
0723
0724 spi4_pins: spi4 {
0725 pins_spi{
0726 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
0727 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
0728 <PINMUX_GPIO19__FUNC_SPI4_MO>,
0729 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
0730 bias-disable;
0731 };
0732 };
0733
0734 spi5_pins: spi5 {
0735 pins_spi{
0736 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
0737 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
0738 <PINMUX_GPIO15__FUNC_SPI5_MO>,
0739 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
0740 bias-disable;
0741 };
0742 };
0743
0744 uart0_pins_default: uart0-pins-default {
0745 pins_rx {
0746 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
0747 input-enable;
0748 bias-pull-up;
0749 };
0750 pins_tx {
0751 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
0752 };
0753 };
0754
0755 uart1_pins_default: uart1-pins-default {
0756 pins_rx {
0757 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
0758 input-enable;
0759 bias-pull-up;
0760 };
0761 pins_tx {
0762 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
0763 };
0764 pins_rts {
0765 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
0766 output-enable;
0767 };
0768 pins_cts {
0769 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
0770 input-enable;
0771 };
0772 };
0773
0774 uart1_pins_sleep: uart1-pins-sleep {
0775 pins_rx {
0776 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
0777 input-enable;
0778 bias-pull-up;
0779 };
0780 pins_tx {
0781 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
0782 };
0783 pins_rts {
0784 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
0785 output-enable;
0786 };
0787 pins_cts {
0788 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
0789 input-enable;
0790 };
0791 };
0792
0793 wifi_pins_pwrseq: wifi-pins-pwrseq {
0794 pins_wifi_enable {
0795 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
0796 output-low;
0797 };
0798 };
0799
0800 wifi_pins_wakeup: wifi-pins-wakeup {
0801 pins_wifi_wakeup {
0802 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
0803 input-enable;
0804 };
0805 };
0806 };
0807
0808 &pwm0 {
0809 status = "okay";
0810 pinctrl-names = "default";
0811 pinctrl-0 = <&pwm0_pin_default>;
0812 };
0813
0814 &scp {
0815 status = "okay";
0816 pinctrl-names = "default";
0817 pinctrl-0 = <&scp_pins>;
0818
0819 cros_ec {
0820 compatible = "google,cros-ec-rpmsg";
0821 mediatek,rpmsg-name = "cros-ec-rpmsg";
0822 };
0823 };
0824
0825 &mfg_async {
0826 domain-supply = <&mt6358_vsram_gpu_reg>;
0827 };
0828
0829 &mfg {
0830 domain-supply = <&mt6358_vgpu_reg>;
0831 };
0832
0833 &soc_data {
0834 status = "okay";
0835 };
0836
0837 &spi0 {
0838 pinctrl-names = "default";
0839 pinctrl-0 = <&spi0_pins>;
0840 mediatek,pad-select = <0>;
0841 status = "okay";
0842 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
0843
0844 cr50@0 {
0845 compatible = "google,cr50";
0846 reg = <0>;
0847 spi-max-frequency = <1000000>;
0848 pinctrl-names = "default";
0849 pinctrl-0 = <&h1_int_od_l>;
0850 interrupt-parent = <&pio>;
0851 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
0852 };
0853 };
0854
0855 &spi1 {
0856 pinctrl-names = "default";
0857 pinctrl-0 = <&spi1_pins>;
0858 mediatek,pad-select = <0>;
0859 status = "okay";
0860
0861 w25q64dw: flash@0 {
0862 compatible = "winbond,w25q64dw", "jedec,spi-nor";
0863 reg = <0>;
0864 spi-max-frequency = <25000000>;
0865 };
0866 };
0867
0868 &spi2 {
0869 pinctrl-names = "default";
0870 pinctrl-0 = <&spi2_pins>;
0871 mediatek,pad-select = <0>;
0872 status = "okay";
0873
0874 cros_ec: cros-ec@0 {
0875 compatible = "google,cros-ec-spi";
0876 reg = <0>;
0877 spi-max-frequency = <3000000>;
0878 interrupt-parent = <&pio>;
0879 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
0880 pinctrl-names = "default";
0881 pinctrl-0 = <&ec_ap_int_odl>;
0882
0883 i2c_tunnel: i2c-tunnel {
0884 compatible = "google,cros-ec-i2c-tunnel";
0885 google,remote-bus = <1>;
0886 #address-cells = <1>;
0887 #size-cells = <0>;
0888 };
0889
0890 usbc_extcon: extcon0 {
0891 compatible = "google,extcon-usbc-cros-ec";
0892 google,usb-port-id = <0>;
0893 };
0894
0895 cbas {
0896 compatible = "google,cros-cbas";
0897 };
0898
0899 typec {
0900 compatible = "google,cros-ec-typec";
0901 #address-cells = <1>;
0902 #size-cells = <0>;
0903
0904 usb_c0: connector@0 {
0905 compatible = "usb-c-connector";
0906 reg = <0>;
0907 power-role = "dual";
0908 data-role = "host";
0909 try-power-role = "sink";
0910 };
0911 };
0912 };
0913 };
0914
0915 &spi3 {
0916 pinctrl-names = "default";
0917 pinctrl-0 = <&spi3_pins>;
0918 mediatek,pad-select = <0>;
0919 status = "disabled";
0920 };
0921
0922 &spi4 {
0923 pinctrl-names = "default";
0924 pinctrl-0 = <&spi4_pins>;
0925 mediatek,pad-select = <0>;
0926 status = "disabled";
0927 };
0928
0929 &spi5 {
0930 pinctrl-names = "default";
0931 pinctrl-0 = <&spi5_pins>;
0932 mediatek,pad-select = <0>;
0933 status = "disabled";
0934 };
0935
0936 &ssusb {
0937 dr_mode = "host";
0938 wakeup-source;
0939 vusb33-supply = <&mt6358_vusb_reg>;
0940 status = "okay";
0941 };
0942
0943 &thermal_zones {
0944 tboard1 {
0945 polling-delay = <1000>; /* milliseconds */
0946 polling-delay-passive = <0>; /* milliseconds */
0947 thermal-sensors = <&tboard_thermistor1>;
0948 };
0949
0950 tboard2 {
0951 polling-delay = <1000>; /* milliseconds */
0952 polling-delay-passive = <0>; /* milliseconds */
0953 thermal-sensors = <&tboard_thermistor2>;
0954 };
0955 };
0956
0957 &u3phy {
0958 status = "okay";
0959 };
0960
0961 &uart0 {
0962 pinctrl-names = "default";
0963 pinctrl-0 = <&uart0_pins_default>;
0964 status = "okay";
0965 };
0966
0967 &uart1 {
0968 pinctrl-names = "default", "sleep";
0969 pinctrl-0 = <&uart1_pins_default>;
0970 pinctrl-1 = <&uart1_pins_sleep>;
0971 status = "okay";
0972 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
0973 <&pio 121 IRQ_TYPE_EDGE_FALLING>;
0974
0975 bluetooth: bluetooth {
0976 pinctrl-names = "default";
0977 pinctrl-0 = <&bt_pins>;
0978 status = "okay";
0979 compatible = "qcom,qca6174-bt";
0980 enable-gpios = <&pio 120 0>;
0981 clocks = <&clk32k>;
0982 firmware-name = "nvm_00440302_i2s.bin";
0983 };
0984 };
0985
0986 &usb_host {
0987 #address-cells = <1>;
0988 #size-cells = <0>;
0989 vusb33-supply = <&mt6358_vusb_reg>;
0990 status = "okay";
0991
0992 hub@1 {
0993 compatible = "usb5e3,610";
0994 reg = <1>;
0995 };
0996 };
0997
0998 #include <arm/cros-ec-keyboard.dtsi>
0999 #include <arm/cros-ec-sbs.dtsi>
