arm64/mediatek/mt7986a-rfb.dts

0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003  * Copyright (C) 2021 MediaTek Inc.
0004  * Author: Sam.Shih <sam.shih@mediatek.com>
0005  */
0006
0007 /dts-v1/;
0008 #include "mt7986a.dtsi"
0009
0010 / {
0011         model = "MediaTek MT7986a RFB";
0012         compatible = "mediatek,mt7986a-rfb";
0013
0014         aliases {
0015                 serial0 = &uart0;
0016         };
0017
0018         chosen {
0019                 stdout-path = "serial0:115200n8";
0020         };
0021
0022         memory@40000000 {
0023                 device_type = "memory";
0024                 reg = <0 0x40000000 0 0x40000000>;
0025         };
0026 };
0027
0028 &eth {
0029         status = "okay";
0030
0031         gmac0: mac@0 {
0032                 compatible = "mediatek,eth-mac";
0033                 reg = <0>;
0034                 phy-mode = "2500base-x";
0035
0036                 fixed-link {
0037                         speed = <2500>;
0038                         full-duplex;
0039                         pause;
0040                 };
0041         };
0042
0043         mdio: mdio-bus {
0044                 #address-cells = <1>;
0045                 #size-cells = <0>;
0046         };
0047 };
0048
0049 &mdio {
0050         switch: switch@0 {
0051                 compatible = "mediatek,mt7531";
0052                 reg = <31>;
0053                 reset-gpios = <&pio 5 0>;
0054         };
0055 };
0056
0057 &switch {
0058         ports {
0059                 #address-cells = <1>;
0060                 #size-cells = <0>;
0061
0062                 port@0 {
0063                         reg = <0>;
0064                         label = "lan0";
0065                 };
0066
0067                 port@1 {
0068                         reg = <1>;
0069                         label = "lan1";
0070                 };
0071
0072                 port@2 {
0073                         reg = <2>;
0074                         label = "lan2";
0075                 };
0076
0077                 port@3 {
0078                         reg = <3>;
0079                         label = "lan3";
0080                 };
0081
0082                 port@4 {
0083                         reg = <4>;
0084                         label = "lan4";
0085                 };
0086
0087                 port@6 {
0088                         reg = <6>;
0089                         label = "cpu";
0090                         ethernet = <&gmac0>;
0091                         phy-mode = "2500base-x";
0092
0093                         fixed-link {
0094                                 speed = <2500>;
0095                                 full-duplex;
0096                                 pause;
0097                         };
0098                 };
0099         };
0100 };
0101
0102 &uart0 {
0103         status = "okay";
0104 };
0105
0106 &uart1 {
0107         pinctrl-names = "default";
0108         pinctrl-0 = <&uart1_pins>;
0109         status = "okay";
0110 };
0111
0112 &uart2 {
0113         pinctrl-names = "default";
0114         pinctrl-0 = <&uart2_pins>;
0115         status = "okay";
0116 };
0117
0118 &pio {
0119         uart1_pins: uart1-pins {
0120                 mux {
0121                         function = "uart";
0122                         groups = "uart1";
0123                 };
0124         };
0125
0126         uart2_pins: uart2-pins {
0127                 mux {
0128                         function = "uart";
0129                         groups = "uart2";
0130                 };
0131         };
0132 };