0001 /*
0002 * Copyright (c) 2017 MediaTek Inc.
0003 * Author: YT Shen <yt.shen@mediatek.com>
0004 *
0005 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
0006 */
0007
0008 /dts-v1/;
0009 #include <dt-bindings/gpio/gpio.h>
0010 #include "mt2712e.dtsi"
0011
0012 / {
0013 model = "MediaTek MT2712 evaluation board";
0014 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
0015
0016 aliases {
0017 serial0 = &uart0;
0018 };
0019
0020 memory@40000000 {
0021 device_type = "memory";
0022 reg = <0 0x40000000 0 0x80000000>;
0023 };
0024
0025 chosen {
0026 stdout-path = "serial0:921600n8";
0027 };
0028
0029 cpus_fixed_vproc0: fixedregulator@0 {
0030 compatible = "regulator-fixed";
0031 regulator-name = "vproc_buck0";
0032 regulator-min-microvolt = <1000000>;
0033 regulator-max-microvolt = <1000000>;
0034 };
0035
0036 cpus_fixed_vproc1: fixedregulator@1 {
0037 compatible = "regulator-fixed";
0038 regulator-name = "vproc_buck1";
0039 regulator-min-microvolt = <1000000>;
0040 regulator-max-microvolt = <1000000>;
0041 };
0042
0043 extcon_usb: extcon_iddig {
0044 compatible = "linux,extcon-usb-gpio";
0045 id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
0046 };
0047
0048 extcon_usb1: extcon_iddig1 {
0049 compatible = "linux,extcon-usb-gpio";
0050 id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
0051 };
0052
0053 usb_p0_vbus: regulator@2 {
0054 compatible = "regulator-fixed";
0055 regulator-name = "p0_vbus";
0056 regulator-min-microvolt = <5000000>;
0057 regulator-max-microvolt = <5000000>;
0058 gpio = <&pio 13 GPIO_ACTIVE_HIGH>;
0059 enable-active-high;
0060 };
0061
0062 usb_p1_vbus: regulator@3 {
0063 compatible = "regulator-fixed";
0064 regulator-name = "p1_vbus";
0065 regulator-min-microvolt = <5000000>;
0066 regulator-max-microvolt = <5000000>;
0067 gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
0068 enable-active-high;
0069 };
0070
0071 usb_p2_vbus: regulator@4 {
0072 compatible = "regulator-fixed";
0073 regulator-name = "p2_vbus";
0074 regulator-min-microvolt = <5000000>;
0075 regulator-max-microvolt = <5000000>;
0076 gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
0077 enable-active-high;
0078 };
0079
0080 usb_p3_vbus: regulator@5 {
0081 compatible = "regulator-fixed";
0082 regulator-name = "p3_vbus";
0083 regulator-min-microvolt = <5000000>;
0084 regulator-max-microvolt = <5000000>;
0085 gpio = <&pio 17 GPIO_ACTIVE_HIGH>;
0086 enable-active-high;
0087 regulator-always-on;
0088 };
0089
0090 };
0091
0092 &auxadc {
0093 status = "okay";
0094 };
0095
0096 &cpu0 {
0097 proc-supply = <&cpus_fixed_vproc0>;
0098 };
0099
0100 &cpu1 {
0101 proc-supply = <&cpus_fixed_vproc0>;
0102 };
0103
0104 &cpu2 {
0105 proc-supply = <&cpus_fixed_vproc1>;
0106 };
0107
0108 ð {
0109 phy-mode = "rgmii-rxid";
0110 phy-handle = <ðernet_phy0>;
0111 mediatek,tx-delay-ps = <1530>;
0112 snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
0113 snps,reset-delays-us = <0 10000 10000>;
0114 pinctrl-names = "default", "sleep";
0115 pinctrl-0 = <ð_default>;
0116 pinctrl-1 = <ð_sleep>;
0117 status = "okay";
0118
0119 mdio {
0120 compatible = "snps,dwmac-mdio";
0121 #address-cells = <1>;
0122 #size-cells = <0>;
0123 ethernet_phy0: ethernet-phy@5 {
0124 compatible = "ethernet-phy-id0243.0d90";
0125 reg = <0x5>;
0126 };
0127 };
0128 };
0129
0130 &pio {
0131 eth_default: eth_default {
0132 tx_pins {
0133 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
0134 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
0135 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,
0136 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,
0137 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,
0138 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;
0139 drive-strength = <MTK_DRIVE_8mA>;
0140 };
0141 rx_pins {
0142 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,
0143 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,
0144 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,
0145 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,
0146 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,
0147 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;
0148 input-enable;
0149 };
0150 mdio_pins {
0151 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,
0152 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;
0153 drive-strength = <MTK_DRIVE_8mA>;
0154 input-enable;
0155 };
0156 };
0157
0158 eth_sleep: eth_sleep {
0159 tx_pins {
0160 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
0161 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
0162 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,
0163 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,
0164 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,
0165 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;
0166 };
0167 rx_pins {
0168 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,
0169 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,
0170 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,
0171 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,
0172 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,
0173 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;
0174 input-disable;
0175 };
0176 mdio_pins {
0177 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,
0178 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;
0179 input-disable;
0180 bias-disable;
0181 };
0182 };
0183
0184 usb0_id_pins_float: usb0_iddig {
0185 pins_iddig {
0186 pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
0187 bias-pull-up;
0188 };
0189 };
0190
0191 usb1_id_pins_float: usb1_iddig {
0192 pins_iddig {
0193 pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
0194 bias-pull-up;
0195 };
0196 };
0197 };
0198
0199 &ssusb {
0200 vbus-supply = <&usb_p0_vbus>;
0201 extcon = <&extcon_usb>;
0202 dr_mode = "otg";
0203 wakeup-source;
0204 mediatek,u3p-dis-msk = <0x1>;
0205 //enable-manual-drd;
0206 //maximum-speed = "full-speed";
0207 pinctrl-names = "default";
0208 pinctrl-0 = <&usb0_id_pins_float>;
0209 status = "okay";
0210 };
0211
0212 &ssusb1 {
0213 vbus-supply = <&usb_p1_vbus>;
0214 extcon = <&extcon_usb1>;
0215 dr_mode = "otg";
0216 //mediatek,u3p-dis-msk = <0x1>;
0217 enable-manual-drd;
0218 wakeup-source;
0219 //maximum-speed = "full-speed";
0220 pinctrl-names = "default";
0221 pinctrl-0 = <&usb1_id_pins_float>;
0222 status = "okay";
0223 };
0224
0225 &uart0 {
0226 status = "okay";
0227 };
0228
0229 &usb_host0 {
0230 vbus-supply = <&usb_p2_vbus>;
0231 status = "okay";
0232 };
0233
0234 &usb_host1 {
0235 status = "okay";
0236 };
