0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2017 Marvell Technology Group Ltd.
0004 *
0005 * Device Tree file for Marvell Armada AP810.
0006 */
0007
0008 #include <dt-bindings/interrupt-controller/arm-gic.h>
0009
0010 /dts-v1/;
0011
0012 / {
0013 model = "Marvell Armada AP810";
0014 compatible = "marvell,armada-ap810";
0015 #address-cells = <2>;
0016 #size-cells = <2>;
0017
0018 aliases {
0019 serial0 = &uart0_ap0;
0020 serial1 = &uart1_ap0;
0021 };
0022
0023 psci {
0024 compatible = "arm,psci-0.2";
0025 method = "smc";
0026 };
0027
0028 ap810-ap0 {
0029 #address-cells = <2>;
0030 #size-cells = <2>;
0031 compatible = "simple-bus";
0032 interrupt-parent = <&gic>;
0033 ranges;
0034
0035 config-space@e8000000 {
0036 #address-cells = <1>;
0037 #size-cells = <1>;
0038 compatible = "simple-bus";
0039 ranges = <0x0 0x0 0xe8000000 0x4000000>;
0040 interrupt-parent = <&gic>;
0041
0042 gic: interrupt-controller@3000000 {
0043 compatible = "arm,gic-v3";
0044 #interrupt-cells = <3>;
0045 #address-cells = <1>;
0046 #size-cells = <1>;
0047 interrupt-controller;
0048 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
0049 ranges;
0050
0051 reg = <0x3000000 0x10000>, /* GICD */
0052 <0x3060000 0x100000>, /* GICR */
0053 <0x00c0000 0x2000>, /* GICC */
0054 <0x00d0000 0x1000>, /* GICH */
0055 <0x00e0000 0x2000>; /* GICV */
0056
0057 gic_its_ap0: interrupt-controller@3040000 {
0058 compatible = "arm,gic-v3-its";
0059 msi-controller;
0060 #msi-cells = <1>;
0061 reg = <0x3040000 0x20000>;
0062 };
0063 };
0064
0065 timer {
0066 compatible = "arm,armv8-timer";
0067 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
0068 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
0069 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
0070 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
0071 };
0072
0073 xor@400000 {
0074 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
0075 reg = <0x400000 0x1000>,
0076 <0x410000 0x1000>;
0077 msi-parent = <&gic_its_ap0 0xa0>;
0078 dma-coherent;
0079 };
0080
0081 xor@420000 {
0082 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
0083 reg = <0x420000 0x1000>,
0084 <0x430000 0x1000>;
0085 msi-parent = <&gic_its_ap0 0xa1>;
0086 dma-coherent;
0087 };
0088
0089 xor@440000 {
0090 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
0091 reg = <0x440000 0x1000>,
0092 <0x450000 0x1000>;
0093 msi-parent = <&gic_its_ap0 0xa2>;
0094 dma-coherent;
0095 };
0096
0097 xor@460000 {
0098 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
0099 reg = <0x460000 0x1000>,
0100 <0x470000 0x1000>;
0101 msi-parent = <&gic_its_ap0 0xa3>;
0102 dma-coherent;
0103 };
0104
0105 uart0_ap0: serial@512000 {
0106 compatible = "snps,dw-apb-uart";
0107 reg = <0x512000 0x100>;
0108 reg-shift = <2>;
0109 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0110 reg-io-width = <1>;
0111 status = "disabled";
0112 };
0113
0114 uart1_ap0: serial@512100 {
0115 compatible = "snps,dw-apb-uart";
0116 reg = <0x512100 0x100>;
0117 reg-shift = <2>;
0118 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
0119 reg-io-width = <1>;
0120 status = "disabled";
0121 };
0122 };
0123 };
0124 };
