0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2017 Marvell Technology Group Ltd.
0004 *
0005 * Device Tree file for Marvell Armada AP810 OCTA cores.
0006 */
0007
0008 #include "armada-ap810-ap0.dtsi"
0009
0010 / {
0011 cpus {
0012 #address-cells = <1>;
0013 #size-cells = <0>;
0014 compatible = "marvell,armada-ap810-octa";
0015
0016 cpu0: cpu@0 {
0017 device_type = "cpu";
0018 compatible = "arm,cortex-a72";
0019 reg = <0x000>;
0020 enable-method = "psci";
0021 };
0022 cpu1: cpu@1 {
0023 device_type = "cpu";
0024 compatible = "arm,cortex-a72";
0025 reg = <0x001>;
0026 enable-method = "psci";
0027 };
0028 cpu2: cpu@100 {
0029 device_type = "cpu";
0030 compatible = "arm,cortex-a72";
0031 reg = <0x100>;
0032 enable-method = "psci";
0033 };
0034 cpu3: cpu@101 {
0035 device_type = "cpu";
0036 compatible = "arm,cortex-a72";
0037 reg = <0x101>;
0038 enable-method = "psci";
0039 };
0040 cpu4: cpu@200 {
0041 device_type = "cpu";
0042 compatible = "arm,cortex-a72";
0043 reg = <0x200>;
0044 enable-method = "psci";
0045 };
0046 cpu5: cpu@201 {
0047 device_type = "cpu";
0048 compatible = "arm,cortex-a72";
0049 reg = <0x201>;
0050 enable-method = "psci";
0051 };
0052 cpu6: cpu@300 {
0053 device_type = "cpu";
0054 compatible = "arm,cortex-a72";
0055 reg = <0x300>;
0056 enable-method = "psci";
0057 };
0058 cpu7: cpu@301 {
0059 device_type = "cpu";
0060 compatible = "arm,cortex-a72";
0061 reg = <0x301>;
0062 enable-method = "psci";
0063 };
0064 };
0065 };
