0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2016 Marvell Technology Group Ltd.
0004 * Copyright (C) 2020 Sartura Ltd.
0005 *
0006 * Device Tree file for IEI Puzzle-M801
0007 */
0008
0009 #include "armada-8040.dtsi"
0010
0011 #include <dt-bindings/gpio/gpio.h>
0012 #include <dt-bindings/leds/common.h>
0013
0014 / {
0015 model = "IEI-Puzzle-M801";
0016 compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";
0017
0018 aliases {
0019 ethernet0 = &cp0_eth0;
0020 ethernet1 = &cp1_eth0;
0021 ethernet2 = &cp0_eth1;
0022 ethernet3 = &cp0_eth2;
0023 ethernet4 = &cp1_eth1;
0024 ethernet5 = &cp1_eth2;
0025 };
0026
0027 chosen {
0028 stdout-path = "serial0:115200n8";
0029 };
0030
0031 memory@0 {
0032 device_type = "memory";
0033 reg = <0x0 0x0 0x0 0x80000000>;
0034 };
0035
0036 /* Regulator labels correspond with schematics */
0037 v_3_3: regulator-3-3v {
0038 compatible = "regulator-fixed";
0039 regulator-name = "v_3_3";
0040 regulator-min-microvolt = <3300000>;
0041 regulator-max-microvolt = <3300000>;
0042 regulator-always-on;
0043 status = "okay";
0044 };
0045
0046 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
0047 compatible = "regulator-fixed";
0048 enable-active-high;
0049 gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
0050 pinctrl-names = "default";
0051 pinctrl-0 = <&cp0_xhci_vbus_pins>;
0052 regulator-name = "v_5v0_usb3_hst_vbus";
0053 regulator-min-microvolt = <5000000>;
0054 regulator-max-microvolt = <5000000>;
0055 status = "okay";
0056 };
0057
0058 v_vddo_h: regulator-1-8v {
0059 compatible = "regulator-fixed";
0060 regulator-name = "v_vddo_h";
0061 regulator-min-microvolt = <1800000>;
0062 regulator-max-microvolt = <1800000>;
0063 regulator-always-on;
0064 status = "okay";
0065 };
0066
0067 sfp_cp0_eth0: sfp-cp0-eth0 {
0068 compatible = "sff,sfp";
0069 i2c-bus = <&sfpplus0_i2c>;
0070 los-gpios = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>;
0071 mod-def0-gpios = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>;
0072 tx-disable-gpios = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>;
0073 tx-fault-gpios = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>;
0074 maximum-power-milliwatt = <3000>;
0075 };
0076
0077 sfp_cp1_eth0: sfp-cp1-eth0 {
0078 compatible = "sff,sfp";
0079 i2c-bus = <&sfpplus1_i2c>;
0080 los-gpios = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>;
0081 mod-def0-gpios = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>;
0082 tx-disable-gpios = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>;
0083 tx-fault-gpios = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>;
0084 maximum-power-milliwatt = <3000>;
0085 };
0086
0087 leds {
0088 compatible = "gpio-leds";
0089 status = "okay";
0090 pinctrl-0 = <&cp0_sfpplus_led_pins &cp1_sfpplus_led_pins>;
0091 pinctrl-names = "default";
0092
0093 led-0 {
0094 /* SFP+ port 2: Activity */
0095 function = LED_FUNCTION_LAN;
0096 function-enumerator = <0>;
0097 gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
0098 };
0099
0100 led-1 {
0101 /* SFP+ port 1: Activity */
0102 function = LED_FUNCTION_LAN;
0103 function-enumerator = <1>;
0104 gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
0105 };
0106
0107 led-2 {
0108 /* SFP+ port 2: 10 Gbps indicator */
0109 function = LED_FUNCTION_LAN;
0110 function-enumerator = <2>;
0111 gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
0112 };
0113
0114 led-3 {
0115 /* SFP+ port 2: 1 Gbps indicator */
0116 function = LED_FUNCTION_LAN;
0117 function-enumerator = <3>;
0118 gpios = <&cp1_gpio1 8 GPIO_ACTIVE_LOW>;
0119 };
0120
0121 led-4 {
0122 /* SFP+ port 1: 10 Gbps indicator */
0123 function = LED_FUNCTION_LAN;
0124 function-enumerator = <4>;
0125 gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>;
0126 };
0127
0128 led-5 {
0129 /* SFP+ port 1: 1 Gbps indicator */
0130 function = LED_FUNCTION_LAN;
0131 function-enumerator = <5>;
0132 gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
0133 };
0134
0135 led-6 {
0136 function = LED_FUNCTION_DISK;
0137 linux,default-trigger = "disk-activity";
0138 gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>;
0139 };
0140
0141 };
0142 };
0143
0144 &ap_sdhci0 {
0145 bus-width = <8>;
0146 /*
0147 * Not stable in HS modes - phy needs "more calibration", so add
0148 * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
0149 */
0150 marvell,xenon-phy-slow-mode;
0151 no-1-8-v;
0152 no-sd;
0153 no-sdio;
0154 non-removable;
0155 status = "okay";
0156 vqmmc-supply = <&v_vddo_h>;
0157 };
0158
0159 &ap_thermal_cpu1 {
0160 trips {
0161 cpu_active: cpu-active {
0162 temperature = <44000>;
0163 hysteresis = <2000>;
0164 type = "active";
0165 };
0166 };
0167 cooling-maps {
0168 fan-map {
0169 trip = <&cpu_active>;
0170 cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>,
0171 <&chassis_fan_group1 64 THERMAL_NO_LIMIT>;
0172 };
0173 };
0174 };
0175
0176 &i2c0 {
0177 clock-frequency = <100000>;
0178 status = "okay";
0179
0180 rtc@32 {
0181 compatible = "epson,rx8010";
0182 reg = <0x32>;
0183 };
0184 };
0185
0186 &spi0 {
0187 status = "okay";
0188 flash@0 {
0189 #address-cells = <0x1>;
0190 #size-cells = <0x1>;
0191 compatible = "jedec,spi-nor";
0192 reg = <0x0>;
0193 spi-max-frequency = <20000000>;
0194 partition@u-boot {
0195 label = "u-boot";
0196 reg = <0x00000000 0x001f0000>;
0197 };
0198 partition@u-boot-env {
0199 label = "u-boot-env";
0200 reg = <0x001f0000 0x00010000>;
0201 };
0202 partition@ubi1 {
0203 label = "ubi1";
0204 reg = <0x00200000 0x03f00000>;
0205 };
0206 partition@ubi2 {
0207 label = "ubi2";
0208 reg = <0x04100000 0x03f00000>;
0209 };
0210 };
0211 };
0212
0213 &uart0 {
0214 status = "okay";
0215 pinctrl-0 = <&uart0_pins>;
0216 pinctrl-names = "default";
0217 };
0218
0219 &uart1 {
0220 status = "okay";
0221 /* IEI WT61P803 PUZZLE MCU Controller */
0222 mcu {
0223 compatible = "iei,wt61p803-puzzle";
0224 current-speed = <115200>;
0225 enable-beep;
0226
0227 leds {
0228 compatible = "iei,wt61p803-puzzle-leds";
0229 #address-cells = <1>;
0230 #size-cells = <0>;
0231
0232 led@0 {
0233 reg = <0>;
0234 function = LED_FUNCTION_POWER;
0235 color = <LED_COLOR_ID_BLUE>;
0236 };
0237 };
0238
0239 hwmon {
0240 compatible = "iei,wt61p803-puzzle-hwmon";
0241 #address-cells = <1>;
0242 #size-cells = <0>;
0243
0244 chassis_fan_group0:fan-group@0 {
0245 #cooling-cells = <2>;
0246 reg = <0x00>;
0247 cooling-levels = <64 102 170 230 250>;
0248 };
0249
0250 chassis_fan_group1:fan-group@1 {
0251 #cooling-cells = <2>;
0252 reg = <0x01>;
0253 cooling-levels = <64 102 170 230 250>;
0254 };
0255 };
0256 };
0257 };
0258
0259 &cp0_rtc {
0260 status = "disabled";
0261 };
0262
0263 &cp0_i2c0 {
0264 clock-frequency = <100000>;
0265 pinctrl-names = "default";
0266 pinctrl-0 = <&cp0_i2c0_pins>;
0267 status = "okay";
0268
0269 sfpplus_gpio: gpio@21 {
0270 compatible = "nxp,pca9555";
0271 reg = <0x21>;
0272 gpio-controller;
0273 #gpio-cells = <2>;
0274 };
0275
0276 eeprom@54 {
0277 compatible = "atmel,24c04";
0278 reg = <0x54>;
0279 };
0280 };
0281
0282 &cp0_i2c1 {
0283 clock-frequency = <100000>;
0284 pinctrl-names = "default";
0285 pinctrl-0 = <&cp0_i2c1_pins>;
0286 status = "okay";
0287
0288 i2c-switch@70 {
0289 compatible = "nxp,pca9544";
0290 #address-cells = <1>;
0291 #size-cells = <0>;
0292 reg = <0x70>;
0293
0294 sfpplus0_i2c: i2c@0 {
0295 #address-cells = <1>;
0296 #size-cells = <0>;
0297 reg = <0>;
0298 };
0299
0300 sfpplus1_i2c: i2c@1 {
0301 #address-cells = <1>;
0302 #size-cells = <0>;
0303 reg = <1>;
0304 };
0305 };
0306 };
0307
0308 &cp0_uart1 {
0309 pinctrl-names = "default";
0310 pinctrl-0 = <&cp0_uart1_pins>;
0311 status = "okay";
0312 };
0313
0314 &cp0_mdio {
0315 #address-cells = <1>;
0316 #size-cells = <0>;
0317
0318 status = "okay";
0319
0320 ge_phy2: ethernet-phy@0 {
0321 reg = <0>;
0322 };
0323
0324 ge_phy3: ethernet-phy@1 {
0325 reg = <1>;
0326 };
0327 };
0328
0329 &cp0_pcie0 {
0330 pinctrl-names = "default";
0331 pinctrl-0 = <&cp0_pcie_pins>;
0332 num-lanes = <1>;
0333 num-viewport = <8>;
0334 reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
0335 ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
0336 phys = <&cp0_comphy0 0>;
0337 phy-names = "cp0-pcie0-x1-phy";
0338 status = "okay";
0339 };
0340
0341 &cp0_pinctrl {
0342 cp0_ge_mdio_pins: ge-mdio-pins {
0343 marvell,pins = "mpp32", "mpp34";
0344 marvell,function = "ge";
0345 };
0346 cp0_i2c1_pins: i2c1-pins {
0347 marvell,pins = "mpp35", "mpp36";
0348 marvell,function = "i2c1";
0349 };
0350 cp0_i2c0_pins: i2c0-pins {
0351 marvell,pins = "mpp37", "mpp38";
0352 marvell,function = "i2c0";
0353 };
0354 cp0_uart1_pins: uart1-pins {
0355 marvell,pins = "mpp40", "mpp41";
0356 marvell,function = "uart1";
0357 };
0358 cp0_xhci_vbus_pins: xhci0-vbus-pins {
0359 marvell,pins = "mpp47";
0360 marvell,function = "gpio";
0361 };
0362 cp0_pcie_pins: pcie-pins {
0363 marvell,pins = "mpp52";
0364 marvell,function = "gpio";
0365 };
0366 cp0_sdhci_pins: sdhci-pins {
0367 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
0368 "mpp60", "mpp61";
0369 marvell,function = "sdio";
0370 };
0371 cp0_sfpplus_led_pins: sfpplus-led-pins {
0372 marvell,pins = "mpp54";
0373 marvell,function = "gpio";
0374 };
0375 };
0376
0377 &cp0_ethernet {
0378 status = "okay";
0379 };
0380
0381 &cp0_eth0 {
0382 status = "okay";
0383 phy-mode = "10gbase-r";
0384 phys = <&cp0_comphy4 0>;
0385 local-mac-address = [ae 00 00 00 ff 00];
0386 sfp = <&sfp_cp0_eth0>;
0387 managed = "in-band-status";
0388 };
0389
0390 &cp0_eth1 {
0391 status = "okay";
0392 phy = <&ge_phy2>;
0393 phy-mode = "sgmii";
0394 local-mac-address = [ae 00 00 00 ff 01];
0395 phys = <&cp0_comphy3 1>;
0396 };
0397
0398 &cp0_eth2 {
0399 status = "okay";
0400 phy-mode = "sgmii";
0401 phys = <&cp0_comphy1 2>;
0402 local-mac-address = [ae 00 00 00 ff 02];
0403 phy = <&ge_phy3>;
0404 };
0405
0406 &cp0_sata0 {
0407 status = "okay";
0408
0409 sata-port@0 {
0410 phys = <&cp0_comphy2 0>;
0411 phy-names = "cp0-sata0-0-phy";
0412 };
0413
0414 sata-port@1 {
0415 phys = <&cp0_comphy5 1>;
0416 phy-names = "cp0-sata0-1-phy";
0417 };
0418 };
0419
0420 &cp0_sdhci0 {
0421 broken-cd;
0422 bus-width = <4>;
0423 pinctrl-names = "default";
0424 pinctrl-0 = <&cp0_sdhci_pins>;
0425 status = "okay";
0426 vqmmc-supply = <&v_3_3>;
0427 };
0428
0429 &cp0_usb3_0 {
0430 status = "okay";
0431 };
0432
0433 &cp0_usb3_1 {
0434 status = "okay";
0435 };
0436
0437 &cp1_i2c0 {
0438 clock-frequency = <100000>;
0439 status = "disabled";
0440 };
0441
0442 &cp1_i2c1 {
0443 clock-frequency = <100000>;
0444 status = "disabled";
0445 };
0446
0447 &cp1_rtc {
0448 status = "disabled";
0449 };
0450
0451 &cp1_ethernet {
0452 status = "okay";
0453 };
0454
0455 &cp1_eth0 {
0456 status = "okay";
0457 phy-mode = "10gbase-r";
0458 phys = <&cp1_comphy4 0>;
0459 local-mac-address = [ae 00 00 00 ff 03];
0460 sfp = <&sfp_cp1_eth0>;
0461 managed = "in-band-status";
0462 };
0463
0464 &cp1_eth1 {
0465 status = "okay";
0466 phy = <&ge_phy4>;
0467 phy-mode = "sgmii";
0468 local-mac-address = [ae 00 00 00 ff 04];
0469 phys = <&cp1_comphy3 1>;
0470 };
0471
0472 &cp1_eth2 {
0473 status = "okay";
0474 phy-mode = "sgmii";
0475 local-mac-address = [ae 00 00 00 ff 05];
0476 phys = <&cp1_comphy5 2>;
0477 phy = <&ge_phy5>;
0478 };
0479
0480 &cp1_pinctrl {
0481 cp1_sfpplus_led_pins: sfpplus-led-pins {
0482 marvell,pins = "mpp6", "mpp7", "mpp8", "mpp10", "mpp14", "mpp31";
0483 marvell,function = "gpio";
0484 };
0485 };
0486
0487 &cp1_uart0 {
0488 status = "disabled";
0489 };
0490
0491 &cp1_comphy2 {
0492 cp1_usbh0_con: connector {
0493 compatible = "usb-a-connector";
0494 phy-supply = <&v_5v0_usb3_hst_vbus>;
0495 };
0496 };
0497
0498 &cp1_usb3_0 {
0499 phys = <&cp1_comphy2 0>;
0500 phy-names = "cp1-usb3h0-comphy";
0501 status = "okay";
0502 };
0503
0504 &cp1_mdio {
0505 #address-cells = <1>;
0506 #size-cells = <0>;
0507
0508 status = "okay";
0509
0510 ge_phy4: ethernet-phy@1 {
0511 reg = <1>;
0512 };
0513 ge_phy5: ethernet-phy@0 {
0514 reg = <0>;
0515 };
0516 };
0517
0518 &cp1_pcie0 {
0519 num-lanes = <2>;
0520 phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
0521 phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
0522 status = "okay";
0523 };
