0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2016 Marvell Technology Group Ltd.
0004 *
0005 * Device Tree file for Marvell Armada 8040 Development board platform
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include "armada-8040.dtsi"
0010
0011 / {
0012 model = "Marvell Armada 8040 DB board";
0013 compatible = "marvell,armada8040-db", "marvell,armada8040",
0014 "marvell,armada-ap806-quad", "marvell,armada-ap806";
0015
0016 chosen {
0017 stdout-path = "serial0:115200n8";
0018 };
0019
0020 memory@0 {
0021 device_type = "memory";
0022 reg = <0x0 0x0 0x0 0x80000000>;
0023 };
0024
0025 aliases {
0026 ethernet0 = &cp0_eth0;
0027 ethernet1 = &cp0_eth2;
0028 ethernet2 = &cp1_eth0;
0029 ethernet3 = &cp1_eth1;
0030 i2c1 = &cp0_i2c0;
0031 i2c2 = &cp1_i2c0;
0032 };
0033
0034 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
0035 compatible = "regulator-fixed";
0036 regulator-name = "cp0-usb3h0-vbus";
0037 regulator-min-microvolt = <5000000>;
0038 regulator-max-microvolt = <5000000>;
0039 enable-active-high;
0040 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
0041 };
0042
0043 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
0044 compatible = "regulator-fixed";
0045 regulator-name = "cp0-usb3h1-vbus";
0046 regulator-min-microvolt = <5000000>;
0047 regulator-max-microvolt = <5000000>;
0048 enable-active-high;
0049 gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
0050 };
0051
0052 cp0_usb3_0_phy: cp0-usb3-0-phy {
0053 compatible = "usb-nop-xceiv";
0054 vcc-supply = <&cp0_reg_usb3_0_vbus>;
0055 };
0056
0057 cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
0058 compatible = "regulator-fixed";
0059 regulator-name = "cp1-usb3h0-vbus";
0060 regulator-min-microvolt = <5000000>;
0061 regulator-max-microvolt = <5000000>;
0062 enable-active-high;
0063 gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
0064 };
0065
0066 cp1_usb3_0_phy: cp1-usb3-0-phy {
0067 compatible = "usb-nop-xceiv";
0068 vcc-supply = <&cp1_reg_usb3_0_vbus>;
0069 };
0070 };
0071
0072 &spi0 {
0073 status = "okay";
0074
0075 flash@0 {
0076 compatible = "jedec,spi-nor";
0077 reg = <0>;
0078 spi-max-frequency = <10000000>;
0079
0080 partitions {
0081 compatible = "fixed-partitions";
0082 #address-cells = <1>;
0083 #size-cells = <1>;
0084
0085 partition@0 {
0086 label = "U-Boot";
0087 reg = <0 0x200000>;
0088 };
0089 partition@400000 {
0090 label = "Filesystem";
0091 reg = <0x200000 0xce0000>;
0092 };
0093 };
0094 };
0095 };
0096
0097 /* Accessible over the mini-USB CON9 connector on the main board */
0098 &uart0 {
0099 status = "okay";
0100 pinctrl-0 = <&uart0_pins>;
0101 pinctrl-names = "default";
0102 };
0103
0104 /* CON6 on CP0 expansion */
0105 &cp0_pcie0 {
0106 phys = <&cp0_comphy0 0>;
0107 phy-names = "cp0-pcie0-x1-phy";
0108 status = "okay";
0109 };
0110
0111 /* CON5 on CP0 expansion */
0112 &cp0_pcie2 {
0113 phys = <&cp0_comphy5 2>;
0114 phy-names = "cp0-pcie2-x1-phy";
0115 status = "okay";
0116 };
0117
0118 &cp0_i2c0 {
0119 status = "okay";
0120 clock-frequency = <100000>;
0121
0122 /* U31 */
0123 expander0: pca9555@21 {
0124 compatible = "nxp,pca9555";
0125 pinctrl-names = "default";
0126 gpio-controller;
0127 #gpio-cells = <2>;
0128 reg = <0x21>;
0129 };
0130
0131 /* U25 */
0132 expander1: pca9555@25 {
0133 compatible = "nxp,pca9555";
0134 pinctrl-names = "default";
0135 gpio-controller;
0136 #gpio-cells = <2>;
0137 reg = <0x25>;
0138 };
0139
0140 };
0141
0142 /* CON4 on CP0 expansion */
0143 &cp0_sata0 {
0144 status = "okay";
0145
0146 sata-port@0 {
0147 phys = <&cp0_comphy1 0>;
0148 phy-names = "cp0-sata0-0-phy";
0149 };
0150 sata-port@1 {
0151 phys = <&cp0_comphy3 1>;
0152 phy-names = "cp0-sata0-1-phy";
0153 };
0154 };
0155
0156 /* CON9 on CP0 expansion */
0157 &cp0_utmi {
0158 status = "okay";
0159 };
0160
0161 &cp0_usb3_0 {
0162 usb-phy = <&cp0_usb3_0_phy>;
0163 phys = <&cp0_utmi0>;
0164 phy-names = "utmi";
0165 dr_mode = "host";
0166 status = "okay";
0167 };
0168
0169 &cp0_comphy4 {
0170 cp0_usbh1_con: connector {
0171 compatible = "usb-a-connector";
0172 phy-supply = <&cp0_reg_usb3_1_vbus>;
0173 };
0174 };
0175
0176 /* CON10 on CP0 expansion */
0177 &cp0_usb3_1 {
0178 phys = <&cp0_comphy4 1>, <&cp0_utmi1>;
0179 phy-names = "usb", "utmi";
0180 dr_mode = "host";
0181 status = "okay";
0182 };
0183
0184 &cp0_mdio {
0185 status = "okay";
0186
0187 phy1: ethernet-phy@1 {
0188 reg = <1>;
0189 };
0190 };
0191
0192 &cp0_ethernet {
0193 status = "okay";
0194 };
0195
0196 &cp0_eth0 {
0197 status = "okay";
0198 phy-mode = "10gbase-r";
0199
0200 fixed-link {
0201 speed = <10000>;
0202 full-duplex;
0203 };
0204 };
0205
0206 &cp0_eth2 {
0207 status = "okay";
0208 phy = <&phy1>;
0209 phy-mode = "rgmii-id";
0210 };
0211
0212 /* CON6 on CP1 expansion */
0213 &cp1_pcie0 {
0214 phys = <&cp1_comphy0 0>;
0215 phy-names = "cp1-pcie0-x1-phy";
0216 status = "okay";
0217 };
0218
0219 /* CON7 on CP1 expansion */
0220 &cp1_pcie1 {
0221 phys = <&cp1_comphy4 1>;
0222 phy-names = "cp1-pcie1-x1-phy";
0223 status = "okay";
0224 };
0225
0226 /* CON5 on CP1 expansion */
0227 &cp1_pcie2 {
0228 phys = <&cp1_comphy5 2>;
0229 phy-names = "cp1-pcie2-x1-phy";
0230 status = "okay";
0231 };
0232
0233 &cp1_i2c0 {
0234 status = "okay";
0235 clock-frequency = <100000>;
0236 };
0237
0238 &cp1_spi1 {
0239 status = "okay";
0240
0241 flash@0 {
0242 compatible = "jedec,spi-nor";
0243 reg = <0x0>;
0244 spi-max-frequency = <20000000>;
0245
0246 partitions {
0247 compatible = "fixed-partitions";
0248 #address-cells = <1>;
0249 #size-cells = <1>;
0250
0251 partition@0 {
0252 label = "Boot";
0253 reg = <0x0 0x200000>;
0254 };
0255 partition@200000 {
0256 label = "Filesystem";
0257 reg = <0x200000 0xd00000>;
0258 };
0259 partition@f00000 {
0260 label = "Boot_2nd";
0261 reg = <0xf00000 0x100000>;
0262 };
0263 };
0264 };
0265 };
0266
0267 /*
0268 * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
0269 * MDIO signal of CP1.
0270 */
0271 &cp1_nand_controller {
0272 pinctrl-0 = <&nand_pins>, <&nand_rb>;
0273 pinctrl-names = "default";
0274
0275 nand@0 {
0276 reg = <0>;
0277 nand-rb = <0>;
0278 nand-on-flash-bbt;
0279 nand-ecc-strength = <4>;
0280 nand-ecc-step-size = <512>;
0281
0282 partitions {
0283 compatible = "fixed-partitions";
0284 #address-cells = <1>;
0285 #size-cells = <1>;
0286
0287 partition@0 {
0288 label = "U-Boot";
0289 reg = <0 0x200000>;
0290 };
0291 partition@200000 {
0292 label = "Linux";
0293 reg = <0x200000 0xe00000>;
0294 };
0295 partition@1000000 {
0296 label = "Filesystem";
0297 reg = <0x1000000 0x3f000000>;
0298 };
0299 };
0300 };
0301 };
0302
0303 /* CON4 on CP1 expansion */
0304 &cp1_sata0 {
0305 status = "okay";
0306
0307 sata-port@0 {
0308 phys = <&cp1_comphy1 0>;
0309 phy-names = "cp1-sata0-0-phy";
0310 };
0311 sata-port@1 {
0312 phys = <&cp1_comphy3 1>;
0313 phy-names = "cp1-sata0-1-phy";
0314 };
0315 };
0316
0317 &cp1_utmi {
0318 status = "okay";
0319 };
0320
0321 /* CON9 on CP1 expansion */
0322 &cp1_usb3_0 {
0323 usb-phy = <&cp1_usb3_0_phy>;
0324 phys = <&cp1_utmi0>;
0325 phy-names = "utmi";
0326 dr_mode = "host";
0327 status = "okay";
0328 };
0329
0330 /* CON10 on CP1 expansion */
0331 &cp1_usb3_1 {
0332 phys = <&cp1_utmi1>;
0333 phy-names = "utmi";
0334 status = "okay";
0335 };
0336
0337 &cp1_mdio {
0338 status = "okay";
0339
0340 phy0: ethernet-phy@0 {
0341 reg = <0>;
0342 };
0343 };
0344
0345 &cp1_ethernet {
0346 status = "okay";
0347 };
0348
0349 &cp1_eth0 {
0350 status = "okay";
0351 phy-mode = "10gbase-r";
0352
0353 fixed-link {
0354 speed = <10000>;
0355 full-duplex;
0356 };
0357 };
0358
0359 &cp1_eth1 {
0360 status = "okay";
0361 phy = <&phy0>;
0362 phy-mode = "rgmii-id";
0363 };
0364
0365 &ap_sdhci0 {
0366 status = "okay";
0367 bus-width = <4>;
0368 non-removable;
0369 };
0370
0371 &cp0_sdhci0 {
0372 status = "okay";
0373 bus-width = <8>;
0374 non-removable;
0375 };
