0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (C) 2018 SolidRun ltd.
0004 * Based on Marvell MACCHIATOBin board
0005 *
0006 * Device Tree file for SolidRun's ClearFog GT 8K
0007 */
0008
0009 #include "armada-8040.dtsi"
0010
0011 #include <dt-bindings/input/input.h>
0012 #include <dt-bindings/gpio/gpio.h>
0013
0014 / {
0015 model = "SolidRun ClearFog GT 8K";
0016 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
0017 "marvell,armada-ap806-quad", "marvell,armada-ap806";
0018
0019 chosen {
0020 stdout-path = "serial0:115200n8";
0021 };
0022
0023 memory@0 {
0024 device_type = "memory";
0025 reg = <0x0 0x0 0x0 0x80000000>;
0026 };
0027
0028 aliases {
0029 ethernet0 = &cp1_eth1;
0030 ethernet1 = &cp0_eth0;
0031 ethernet2 = &cp1_eth2;
0032 };
0033
0034 fan: pwm {
0035 compatible = "pwm-fan";
0036 /* 20% steps */
0037 cooling-levels = <0 51 102 153 204 255>;
0038 #cooling-cells = <2>;
0039 pinctrl-names = "default";
0040 pinctrl-0 = <&cp0_fan_pwm_pins>;
0041 pwms = <&cp0_gpio2 16 40000>;
0042 };
0043
0044 v_3_3: regulator-3-3v {
0045 compatible = "regulator-fixed";
0046 regulator-name = "v_3_3";
0047 regulator-min-microvolt = <3300000>;
0048 regulator-max-microvolt = <3300000>;
0049 regulator-always-on;
0050 status = "okay";
0051 };
0052
0053 v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
0054 compatible = "regulator-fixed";
0055 gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&cp0_xhci_vbus_pins>;
0058 regulator-name = "v_5v0_usb3_hst_vbus";
0059 regulator-min-microvolt = <5000000>;
0060 regulator-max-microvolt = <5000000>;
0061 status = "okay";
0062 };
0063
0064 sfp_cp0_eth0: sfp-cp0-eth0 {
0065 compatible = "sff,sfp";
0066 i2c-bus = <&cp0_i2c1>;
0067 mod-def0-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>;
0068 tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>;
0069 pinctrl-names = "default";
0070 pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>;
0071 maximum-power-milliwatt = <2000>;
0072 };
0073
0074 leds {
0075 compatible = "gpio-leds";
0076 pinctrl-0 = <&cp0_led0_pins
0077 &cp0_led1_pins>;
0078 pinctrl-names = "default";
0079 /* No designated function for these LEDs at the moment */
0080 led0 {
0081 label = "clearfog-gt-8k:green:led0";
0082 gpios = <&cp0_gpio2 8 GPIO_ACTIVE_LOW>;
0083 default-state = "on";
0084 };
0085 led1 {
0086 label = "clearfog-gt-8k:green:led1";
0087 gpios = <&cp0_gpio2 9 GPIO_ACTIVE_LOW>;
0088 default-state = "on";
0089 };
0090 };
0091
0092 keys {
0093 compatible = "gpio-keys";
0094 pinctrl-0 = <&cp0_gpio_reset_pins &cp1_wps_button_pins>;
0095 pinctrl-names = "default";
0096
0097 button-0 {
0098 /* The rear button */
0099 label = "Rear Button";
0100 gpios = <&cp0_gpio2 7 GPIO_ACTIVE_LOW>;
0101 linux,can-disable;
0102 linux,code = <BTN_0>;
0103 };
0104
0105 button-1 {
0106 /* The wps button */
0107 label = "WPS Button";
0108 gpios = <&cp1_gpio1 30 GPIO_ACTIVE_LOW>;
0109 linux,can-disable;
0110 linux,code = <KEY_WPS_BUTTON>;
0111 };
0112 };
0113 };
0114
0115 &ap_thermal_ic {
0116 polling-delay = <1000>; /* milliseconds */
0117 trips {
0118 ap_active: trip-active {
0119 temperature = <40000>; /* millicelsius */
0120 hysteresis = <4000>; /* millicelsius */
0121 type = "active";
0122 };
0123 };
0124 cooling-maps {
0125 map0 {
0126 trip = <&ap_active>;
0127 cooling-device = <&fan THERMAL_NO_LIMIT 4>;
0128 };
0129 map1 {
0130 trip = <&ap_crit>;
0131 cooling-device = <&fan 4 5>;
0132 };
0133 };
0134 };
0135
0136 &cp0_thermal_ic {
0137 polling-delay = <1000>; /* milliseconds */
0138 trips {
0139 cp0_active0: trip-active0 {
0140 temperature = <40000>; /* millicelsius */
0141 hysteresis = <2500>; /* millicelsius */
0142 type = "active";
0143 };
0144 cp0_active1: trip-active1 {
0145 temperature = <45000>; /* millicelsius */
0146 hysteresis = <2500>; /* millicelsius */
0147 type = "active";
0148 };
0149 cp0_active2: trip-active2 {
0150 temperature = <50000>; /* millicelsius */
0151 hysteresis = <2500>; /* millicelsius */
0152 type = "active";
0153 };
0154 cp0_active3: trip-active3 {
0155 temperature = <60000>; /* millicelsius */
0156 hysteresis = <2500>; /* millicelsius */
0157 type = "active";
0158 };
0159 };
0160 cooling-maps {
0161 map0 {
0162 trip = <&cp0_active0>;
0163 cooling-device = <&fan 0 1>;
0164 };
0165 map1 {
0166 trip = <&cp0_active1>;
0167 cooling-device = <&fan 1 2>;
0168 };
0169 map2 {
0170 trip = <&cp0_active2>;
0171 cooling-device = <&fan 2 3>;
0172 };
0173 map3 {
0174 trip = <&cp0_active3>;
0175 cooling-device = <&fan 3 4>;
0176 };
0177 map4 {
0178 trip = <&cp0_crit>;
0179 cooling-device = <&fan 4 5>;
0180 };
0181 };
0182 };
0183
0184 &cp1_thermal_ic {
0185 polling-delay = <1000>; /* milliseconds */
0186 trips {
0187 cp1_active0: trip-active0 {
0188 temperature = <40000>; /* millicelsius */
0189 hysteresis = <2500>; /* millicelsius */
0190 type = "active";
0191 };
0192 cp1_active1: trip-active1 {
0193 temperature = <45000>; /* millicelsius */
0194 hysteresis = <2500>; /* millicelsius */
0195 type = "active";
0196 };
0197 cp1_active2: trip-active2 {
0198 temperature = <50000>; /* millicelsius */
0199 hysteresis = <2500>; /* millicelsius */
0200 type = "active";
0201 };
0202 cp1_active3: trip-active3 {
0203 temperature = <60000>; /* millicelsius */
0204 hysteresis = <2500>; /* millicelsius */
0205 type = "active";
0206 };
0207 };
0208 cooling-maps {
0209 map0 {
0210 trip = <&cp1_active0>;
0211 cooling-device = <&fan 0 1>;
0212 };
0213 map1 {
0214 trip = <&cp1_active1>;
0215 cooling-device = <&fan 1 2>;
0216 };
0217 map2 {
0218 trip = <&cp1_active2>;
0219 cooling-device = <&fan 2 3>;
0220 };
0221 map3 {
0222 trip = <&cp1_active3>;
0223 cooling-device = <&fan 3 4>;
0224 };
0225 map4 {
0226 trip = <&cp1_crit>;
0227 cooling-device = <&fan 4 5>;
0228 };
0229 };
0230 };
0231
0232 &uart0 {
0233 status = "okay";
0234 pinctrl-0 = <&uart0_pins>;
0235 pinctrl-names = "default";
0236 };
0237
0238 &ap_sdhci0 {
0239 bus-width = <8>;
0240 no-1-8-v;
0241 no-sd;
0242 no-sdio;
0243 non-removable;
0244 status = "okay";
0245 vqmmc-supply = <&v_3_3>;
0246 };
0247
0248 &cp0_i2c0 {
0249 clock-frequency = <100000>;
0250 pinctrl-names = "default";
0251 pinctrl-0 = <&cp0_i2c0_pins>;
0252 status = "okay";
0253 };
0254
0255 &cp0_i2c1 {
0256 clock-frequency = <100000>;
0257 pinctrl-names = "default";
0258 pinctrl-0 = <&cp0_i2c1_pins>;
0259 status = "okay";
0260 };
0261
0262 &cp0_pinctrl {
0263 /*
0264 * MPP Bus:
0265 * [0-31] = 0xff: Keep default CP0_shared_pins:
0266 * [11] CLKOUT_MPP_11 (out)
0267 * [23] LINK_RD_IN_CP2CP (in)
0268 * [25] CLKOUT_MPP_25 (out)
0269 * [29] AVS_FB_IN_CP2CP (in)
0270 * [32, 33, 34] pci0/1/2 reset
0271 * [35-38] CP0 I2C1 and I2C0
0272 * [39] GPIO reset button
0273 * [40,41] LED0 and LED1
0274 * [43] 1512 phy reset
0275 * [47] USB VBUS EN (active low)
0276 * [48] FAN PWM
0277 * [49] SFP+ present signal
0278 * [50] TPM interrupt
0279 * [51] WLAN0 disable
0280 * [52] WLAN1 disable
0281 * [53] LTE disable
0282 * [54] NFC reset
0283 * [55] Micro SD card detect
0284 * [56-61] Micro SD
0285 */
0286
0287 cp0_pci0_reset_pins: pci0-reset-pins {
0288 marvell,pins = "mpp32";
0289 marvell,function = "gpio";
0290 };
0291
0292 cp0_pci1_reset_pins: pci1-reset-pins {
0293 marvell,pins = "mpp33";
0294 marvell,function = "gpio";
0295 };
0296
0297 cp0_pci2_reset_pins: pci2-reset-pins {
0298 marvell,pins = "mpp34";
0299 marvell,function = "gpio";
0300 };
0301
0302 cp0_i2c1_pins: i2c1-pins {
0303 marvell,pins = "mpp35", "mpp36";
0304 marvell,function = "i2c1";
0305 };
0306
0307 cp0_i2c0_pins: i2c0-pins {
0308 marvell,pins = "mpp37", "mpp38";
0309 marvell,function = "i2c0";
0310 };
0311
0312 cp0_gpio_reset_pins: gpio-reset-pins {
0313 marvell,pins = "mpp39";
0314 marvell,function = "gpio";
0315 };
0316
0317 cp0_led0_pins: led0-pins {
0318 marvell,pins = "mpp40";
0319 marvell,function = "gpio";
0320 };
0321
0322 cp0_led1_pins: led1-pins {
0323 marvell,pins = "mpp41";
0324 marvell,function = "gpio";
0325 };
0326
0327 cp0_copper_eth_phy_reset: copper-eth-phy-reset {
0328 marvell,pins = "mpp43";
0329 marvell,function = "gpio";
0330 };
0331
0332 cp0_xhci_vbus_pins: xhci0-vbus-pins {
0333 marvell,pins = "mpp47";
0334 marvell,function = "gpio";
0335 };
0336
0337 cp0_fan_pwm_pins: fan-pwm-pins {
0338 marvell,pins = "mpp48";
0339 marvell,function = "gpio";
0340 };
0341
0342 cp0_sfp_present_pins: sfp-present-pins {
0343 marvell,pins = "mpp49";
0344 marvell,function = "gpio";
0345 };
0346
0347 cp0_tpm_irq_pins: tpm-irq-pins {
0348 marvell,pins = "mpp50";
0349 marvell,function = "gpio";
0350 };
0351
0352 cp0_wlan_disable_pins: wlan-disable-pins {
0353 marvell,pins = "mpp51";
0354 marvell,function = "gpio";
0355 };
0356
0357 cp0_sdhci_pins: sdhci-pins {
0358 marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
0359 "mpp60", "mpp61";
0360 marvell,function = "sdio";
0361 };
0362 };
0363
0364 &cp0_pcie0 {
0365 pinctrl-names = "default";
0366 pinctrl-0 = <&cp0_pci0_reset_pins &cp0_wlan_disable_pins>;
0367 reset-gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
0368 phys = <&cp0_comphy0 0>;
0369 phy-names = "cp0-pcie0-x1-phy";
0370 status = "okay";
0371 };
0372
0373 &cp0_gpio2 {
0374 sata_reset {
0375 gpio-hog;
0376 gpios = <1 GPIO_ACTIVE_HIGH>;
0377 output-high;
0378 };
0379
0380 lte_reset {
0381 gpio-hog;
0382 gpios = <2 GPIO_ACTIVE_LOW>;
0383 output-low;
0384 };
0385
0386 wlan_disable {
0387 gpio-hog;
0388 gpios = <19 GPIO_ACTIVE_LOW>;
0389 output-low;
0390 };
0391
0392 lte_disable {
0393 gpio-hog;
0394 gpios = <21 GPIO_ACTIVE_LOW>;
0395 output-low;
0396 };
0397 };
0398
0399 &cp0_ethernet {
0400 status = "okay";
0401 };
0402
0403 /* SFP */
0404 &cp0_eth0 {
0405 status = "okay";
0406 phy-mode = "10gbase-r";
0407 managed = "in-band-status";
0408 phys = <&cp0_comphy2 0>;
0409 sfp = <&sfp_cp0_eth0>;
0410 };
0411
0412 &cp0_sdhci0 {
0413 broken-cd;
0414 bus-width = <4>;
0415 pinctrl-names = "default";
0416 pinctrl-0 = <&cp0_sdhci_pins>;
0417 status = "okay";
0418 vqmmc-supply = <&v_3_3>;
0419 };
0420
0421 &cp0_usb3_1 {
0422 status = "okay";
0423 };
0424
0425 &cp1_pinctrl {
0426 /*
0427 * MPP Bus:
0428 * [0-5] TDM
0429 * [6] VHV Enable
0430 * [7] CP1 SPI0 CSn1 (FXS)
0431 * [8] CP1 SPI0 CSn0 (TPM)
0432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
0433 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
0434 * [14] CP1 SPI1 CS0n (64Mb SPI ROM)
0435 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
0436 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
0437 * [24] Topaz switch reset
0438 * [26] Buzzer
0439 * [27] CP1 SMI MDIO
0440 * [28] CP1 SMI MDC
0441 * [29] CP0 10G SFP TX Disable
0442 * [30] WPS button
0443 * [31] Front panel button
0444 */
0445
0446 cp1_spi1_pins: spi1-pins {
0447 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
0448 marvell,function = "spi1";
0449 };
0450
0451 cp1_switch_reset_pins: switch-reset-pins {
0452 marvell,pins = "mpp24";
0453 marvell,function = "gpio";
0454 };
0455
0456 cp1_ge_mdio_pins: ge-mdio-pins {
0457 marvell,pins = "mpp27", "mpp28";
0458 marvell,function = "ge";
0459 };
0460
0461 cp1_sfp_tx_disable_pins: sfp-tx-disable-pins {
0462 marvell,pins = "mpp29";
0463 marvell,function = "gpio";
0464 };
0465
0466 cp1_wps_button_pins: wps-button-pins {
0467 marvell,pins = "mpp30";
0468 marvell,function = "gpio";
0469 };
0470 };
0471
0472 &cp1_sata0 {
0473 pinctrl-0 = <&cp0_pci1_reset_pins>;
0474 status = "okay";
0475
0476 sata-port@1 {
0477 phys = <&cp1_comphy0 1>;
0478 phy-names = "cp1-sata0-1-phy";
0479 };
0480 };
0481
0482 &cp1_mdio {
0483 pinctrl-names = "default";
0484 pinctrl-0 = <&cp1_ge_mdio_pins>;
0485 status = "okay";
0486
0487 ge_phy: ethernet-phy@0 {
0488 /* LED0 - GB link
0489 * LED1 - on: link, blink: activity
0490 */
0491 marvell,reg-init = <3 16 0 0x1017>;
0492 reg = <0>;
0493 pinctrl-names = "default";
0494 pinctrl-0 = <&cp0_copper_eth_phy_reset>;
0495 reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
0496 reset-assert-us = <10000>;
0497 reset-deassert-us = <10000>;
0498 };
0499
0500 switch0: switch0@4 {
0501 compatible = "marvell,mv88e6085";
0502 reg = <4>;
0503 pinctrl-names = "default";
0504 pinctrl-0 = <&cp1_switch_reset_pins>;
0505 reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
0506
0507 ports {
0508 #address-cells = <1>;
0509 #size-cells = <0>;
0510
0511 port@1 {
0512 reg = <1>;
0513 label = "lan2";
0514 phy-handle = <&switch0phy0>;
0515 };
0516
0517 port@2 {
0518 reg = <2>;
0519 label = "lan1";
0520 phy-handle = <&switch0phy1>;
0521 };
0522
0523 port@3 {
0524 reg = <3>;
0525 label = "lan4";
0526 phy-handle = <&switch0phy2>;
0527 };
0528
0529 port@4 {
0530 reg = <4>;
0531 label = "lan3";
0532 phy-handle = <&switch0phy3>;
0533 };
0534
0535 port@5 {
0536 reg = <5>;
0537 label = "cpu";
0538 ethernet = <&cp1_eth2>;
0539 phy-mode = "2500base-x";
0540 managed = "in-band-status";
0541 };
0542 };
0543
0544 mdio {
0545 #address-cells = <1>;
0546 #size-cells = <0>;
0547
0548 switch0phy0: switch0phy0@11 {
0549 reg = <0x11>;
0550 };
0551
0552 switch0phy1: switch0phy1@12 {
0553 reg = <0x12>;
0554 };
0555
0556 switch0phy2: switch0phy2@13 {
0557 reg = <0x13>;
0558 };
0559
0560 switch0phy3: switch0phy3@14 {
0561 reg = <0x14>;
0562 };
0563 };
0564 };
0565 };
0566
0567 &cp1_ethernet {
0568 status = "okay";
0569 };
0570
0571 /* 1G copper */
0572 &cp1_eth1 {
0573 status = "okay";
0574 phy-mode = "sgmii";
0575 phy = <&ge_phy>;
0576 phys = <&cp1_comphy3 1>;
0577 };
0578
0579 /* Switch uplink */
0580 &cp1_eth2 {
0581 status = "okay";
0582 phy-mode = "2500base-x";
0583 phys = <&cp1_comphy5 2>;
0584 managed = "in-band-status";
0585 };
0586
0587 &cp1_spi1 {
0588 pinctrl-names = "default";
0589 pinctrl-0 = <&cp1_spi1_pins>;
0590 status = "okay";
0591
0592 flash@0 {
0593 compatible = "st,w25q32";
0594 spi-max-frequency = <50000000>;
0595 reg = <0>;
0596 };
0597 };
0598
0599 &cp1_comphy2 {
0600 cp1_usbh0_con: connector {
0601 compatible = "usb-a-connector";
0602 phy-supply = <&v_5v0_usb3_hst_vbus>;
0603 };
0604 };
0605
0606 &cp1_usb3_0 {
0607 phys = <&cp1_comphy2 0>;
0608 phy-names = "cp1-usb3h0-comphy";
0609 status = "okay";
0610 };
