0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003 * Device Tree file for Globalscale MOCHAbin
0004 * Copyright (C) 2019 Globalscale technologies, Inc.
0005 * Copyright (C) 2021 Sartura Ltd.
0006 *
0007 */
0008
0009 /dts-v1/;
0010
0011 #include <dt-bindings/gpio/gpio.h>
0012 #include "armada-7040.dtsi"
0013
0014 / {
0015 model = "Globalscale MOCHAbin";
0016 compatible = "globalscale,mochabin", "marvell,armada7040",
0017 "marvell,armada-ap806-quad", "marvell,armada-ap806";
0018
0019 chosen {
0020 stdout-path = "serial0:115200n8";
0021 };
0022
0023 aliases {
0024 ethernet0 = &cp0_eth0;
0025 ethernet1 = &cp0_eth1;
0026 ethernet2 = &cp0_eth2;
0027 ethernet3 = &swport1;
0028 ethernet4 = &swport2;
0029 ethernet5 = &swport3;
0030 ethernet6 = &swport4;
0031 };
0032
0033 /* SFP+ 10G */
0034 sfp_eth0: sfp-eth0 {
0035 compatible = "sff,sfp";
0036 i2c-bus = <&cp0_i2c1>;
0037 los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
0038 mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
0039 tx-disable-gpios = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
0040 tx-fault-gpios = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
0041 };
0042
0043 /* SFP 1G */
0044 sfp_eth2: sfp-eth2 {
0045 compatible = "sff,sfp";
0046 i2c-bus = <&cp0_i2c0>;
0047 los-gpios = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
0048 mod-def0-gpios = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
0049 tx-disable-gpios = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
0050 tx-fault-gpios = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
0051 };
0052 };
0053
0054 /* microUSB UART console */
0055 &uart0 {
0056 status = "okay";
0057
0058 pinctrl-0 = <&uart0_pins>;
0059 pinctrl-names = "default";
0060 };
0061
0062 /* eMMC */
0063 &ap_sdhci0 {
0064 status = "okay";
0065
0066 bus-width = <4>;
0067 non-removable;
0068 /delete-property/ marvell,xenon-phy-slow-mode;
0069 no-1-8-v;
0070 };
0071
0072 &cp0_pinctrl {
0073 cp0_uart0_pins: cp0-uart0-pins {
0074 marvell,pins = "mpp6", "mpp7";
0075 marvell,function = "uart0";
0076 };
0077
0078 cp0_spi0_pins: cp0-spi0-pins {
0079 marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
0080 marvell,function = "spi0";
0081 };
0082
0083 cp0_spi1_pins: cp0-spi1-pins {
0084 marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
0085 marvell,function = "spi1";
0086 };
0087
0088 cp0_i2c0_pins: cp0-i2c0-pins {
0089 marvell,pins = "mpp37", "mpp38";
0090 marvell,function = "i2c0";
0091 };
0092
0093 cp0_i2c1_pins: cp0-i2c1-pins {
0094 marvell,pins = "mpp2", "mpp3";
0095 marvell,function = "i2c1";
0096 };
0097
0098 pca9554_int_pins: pca9554-int-pins {
0099 marvell,pins = "mpp27";
0100 marvell,function = "gpio";
0101 };
0102
0103 cp0_rgmii1_pins: cp0-rgmii1-pins {
0104 marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
0105 "mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
0106 marvell,function = "ge1";
0107 };
0108
0109 is31_sdb_pins: is31-sdb-pins {
0110 marvell,pins = "mpp30";
0111 marvell,function = "gpio";
0112 };
0113
0114 cp0_pcie_reset_pins: cp0-pcie-reset-pins {
0115 marvell,pins = "mpp9";
0116 marvell,function = "gpio";
0117 };
0118
0119 cp0_pcie_clkreq_pins: cp0-pcie-clkreq-pins {
0120 marvell,pins = "mpp5";
0121 marvell,function = "pcie1";
0122 };
0123
0124 cp0_switch_pins: cp0-switch-pins {
0125 marvell,pins = "mpp0", "mpp1";
0126 marvell,function = "gpio";
0127 };
0128
0129 cp0_phy_pins: cp0-phy-pins {
0130 marvell,pins = "mpp12";
0131 marvell,function = "gpio";
0132 };
0133 };
0134
0135 /* mikroBUS UART */
0136 &cp0_uart0 {
0137 status = "okay";
0138
0139 pinctrl-names = "default";
0140 pinctrl-0 = <&cp0_uart0_pins>;
0141 };
0142
0143 /* mikroBUS SPI */
0144 &cp0_spi0 {
0145 status = "okay";
0146
0147 pinctrl-names = "default";
0148 pinctrl-0 = <&cp0_spi0_pins>;
0149 };
0150
0151 /* SPI-NOR */
0152 &cp0_spi1{
0153 status = "okay";
0154
0155 pinctrl-names = "default";
0156 pinctrl-0 = <&cp0_spi1_pins>;
0157
0158 flash@0 {
0159 #address-cells = <1>;
0160 #size-cells = <1>;
0161 compatible = "jedec,spi-nor";
0162 reg = <0>;
0163 spi-max-frequency = <20000000>;
0164
0165 partitions {
0166 compatible = "fixed-partitions";
0167 #address-cells = <1>;
0168 #size-cells = <1>;
0169
0170 partition@0 {
0171 label = "firmware";
0172 reg = <0x0 0x3e0000>;
0173 read-only;
0174 };
0175
0176 partition@3e0000 {
0177 label = "hw-info";
0178 reg = <0x3e0000 0x10000>;
0179 read-only;
0180 };
0181
0182 partition@3f0000 {
0183 label = "u-boot-env";
0184 reg = <0x3f0000 0x10000>;
0185 };
0186 };
0187 };
0188 };
0189
0190 /* mikroBUS, 1G SFP and GPIO expander */
0191 &cp0_i2c0 {
0192 status = "okay";
0193
0194 pinctrl-names = "default";
0195 pinctrl-0 = <&cp0_i2c0_pins>;
0196 clock-frequency = <100000>;
0197
0198 sfp_gpio: pca9554@39 {
0199 compatible = "nxp,pca9554";
0200 pinctrl-names = "default";
0201 pinctrl-0 = <&pca9554_int_pins>;
0202 reg = <0x39>;
0203
0204 interrupt-parent = <&cp0_gpio1>;
0205 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
0206 interrupt-controller;
0207 #interrupt-cells = <2>;
0208
0209 gpio-controller;
0210 #gpio-cells = <2>;
0211
0212 /*
0213 * IO0_0: SFP+_TX_FAULT
0214 * IO0_1: SFP+_TX_DISABLE
0215 * IO0_2: SFP+_PRSNT
0216 * IO0_3: SFP+_LOSS
0217 * IO0_4: SFP_TX_FAULT
0218 * IO0_5: SFP_TX_DISABLE
0219 * IO0_6: SFP_PRSNT
0220 * IO0_7: SFP_LOSS
0221 */
0222 };
0223 };
0224
0225 /* IS31FL3199, mini-PCIe and 10G SFP+ */
0226 &cp0_i2c1 {
0227 status = "okay";
0228
0229 pinctrl-names = "default";
0230 pinctrl-0 = <&cp0_i2c1_pins>;
0231 clock-frequency = <100000>;
0232
0233 leds@64 {
0234 compatible = "issi,is31fl3199";
0235 #address-cells = <1>;
0236 #size-cells = <0>;
0237 pinctrl-names = "default";
0238 pinctrl-0 = <&is31_sdb_pins>;
0239 shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
0240 reg = <0x64>;
0241
0242 led1_red: led@1 {
0243 label = "red:led1";
0244 reg = <1>;
0245 led-max-microamp = <20000>;
0246 };
0247
0248 led1_green: led@2 {
0249 label = "green:led1";
0250 reg = <2>;
0251 };
0252
0253 led1_blue: led@3 {
0254 label = "blue:led1";
0255 reg = <3>;
0256 };
0257
0258 led2_red: led@4 {
0259 label = "red:led2";
0260 reg = <4>;
0261 };
0262
0263 led2_green: led@5 {
0264 label = "green:led2";
0265 reg = <5>;
0266 };
0267
0268 led2_blue: led@6 {
0269 label = "blue:led2";
0270 reg = <6>;
0271 };
0272
0273 led3_red: led@7 {
0274 label = "red:led3";
0275 reg = <7>;
0276 };
0277
0278 led3_green: led@8 {
0279 label = "green:led3";
0280 reg = <8>;
0281 };
0282
0283 led3_blue: led@9 {
0284 label = "blue:led3";
0285 reg = <9>;
0286 };
0287 };
0288 };
0289
0290 &cp0_mdio {
0291 status = "okay";
0292
0293 /* 88E1512 PHY */
0294 eth2phy: ethernet-phy@1 {
0295 reg = <1>;
0296 sfp = <&sfp_eth2>;
0297
0298 pinctrl-names = "default";
0299 pinctrl-0 = <&cp0_phy_pins>;
0300 reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
0301 };
0302
0303 /* 88E6141 Topaz switch */
0304 switch: switch@3 {
0305 compatible = "marvell,mv88e6085";
0306 #address-cells = <1>;
0307 #size-cells = <0>;
0308 reg = <3>;
0309
0310 pinctrl-names = "default";
0311 pinctrl-0 = <&cp0_switch_pins>;
0312 reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
0313
0314 interrupt-parent = <&cp0_gpio1>;
0315 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
0316
0317 ports {
0318 #address-cells = <1>;
0319 #size-cells = <0>;
0320
0321 swport1: port@1 {
0322 reg = <1>;
0323 label = "lan0";
0324 phy-handle = <&swphy1>;
0325 };
0326
0327 swport2: port@2 {
0328 reg = <2>;
0329 label = "lan1";
0330 phy-handle = <&swphy2>;
0331 };
0332
0333 swport3: port@3 {
0334 reg = <3>;
0335 label = "lan2";
0336 phy-handle = <&swphy3>;
0337 };
0338
0339 swport4: port@4 {
0340 reg = <4>;
0341 label = "lan3";
0342 phy-handle = <&swphy4>;
0343 };
0344
0345 port@5 {
0346 reg = <5>;
0347 label = "cpu";
0348 ethernet = <&cp0_eth1>;
0349 phy-mode = "2500base-x";
0350 managed = "in-band-status";
0351 };
0352 };
0353
0354 mdio {
0355 #address-cells = <1>;
0356 #size-cells = <0>;
0357
0358 swphy1: swphy1@17 {
0359 reg = <17>;
0360 };
0361
0362 swphy2: swphy2@18 {
0363 reg = <18>;
0364 };
0365
0366 swphy3: swphy3@19 {
0367 reg = <19>;
0368 };
0369
0370 swphy4: swphy4@20 {
0371 reg = <20>;
0372 };
0373 };
0374 };
0375 };
0376
0377 &cp0_ethernet {
0378 status = "okay";
0379 };
0380
0381 /* 10G SFP+ */
0382 &cp0_eth0 {
0383 status = "okay";
0384
0385 phy-mode = "10gbase-r";
0386 phys = <&cp0_comphy4 0>;
0387 managed = "in-band-status";
0388 sfp = <&sfp_eth0>;
0389 };
0390
0391 /* Topaz switch uplink */
0392 &cp0_eth1 {
0393 status = "okay";
0394
0395 phy-mode = "2500base-x";
0396 phys = <&cp0_comphy0 1>;
0397
0398 fixed-link {
0399 speed = <2500>;
0400 full-duplex;
0401 };
0402 };
0403
0404 /* 1G SFP or 1G RJ45 */
0405 &cp0_eth2 {
0406 status = "okay";
0407
0408 pinctrl-names = "default";
0409 pinctrl-0 = <&cp0_rgmii1_pins>;
0410
0411 phy = <ð2phy>;
0412 phy-mode = "rgmii-id";
0413 };
0414
0415 &cp0_utmi {
0416 status = "okay";
0417 };
0418
0419 /* SMSC USB5434B hub */
0420 &cp0_usb3_0 {
0421 status = "okay";
0422
0423 phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
0424 phy-names = "cp0-usb3h0-comphy", "utmi";
0425 };
0426
0427 /* miniPCI-E USB */
0428 &cp0_usb3_1 {
0429 status = "okay";
0430 };
0431
0432 &cp0_sata0 {
0433 status = "okay";
0434
0435 /* 7 + 12 SATA connector (J24) */
0436 sata-port@0 {
0437 phys = <&cp0_comphy2 0>;
0438 phy-names = "cp0-sata0-0-phy";
0439 };
0440
0441 /* M.2-2250 B-key (J39) */
0442 sata-port@1 {
0443 phys = <&cp0_comphy3 1>;
0444 phy-names = "cp0-sata0-1-phy";
0445 };
0446 };
0447
0448 /* miniPCI-E (J5) */
0449 &cp0_pcie2 {
0450 status = "okay";
0451
0452 pinctrl-names = "default", "clkreq";
0453 pinctrl-0 = <&cp0_pcie_reset_pins>;
0454 pinctrl-1 = <&cp0_pcie_clkreq_pins>;
0455 phys = <&cp0_comphy5 2>;
0456 phy-names = "cp0-pcie2-x1-phy";
0457 reset-gpios = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
0458 };
