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0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree Include file for Marvell Armada 37xx family of SoCs.
0004 *
0005 * Copyright (C) 2016 Marvell
0006 *
0007 * Gregory CLEMENT <gregory.clement@free-electrons.com>
0008 *
0009 */
0010
0011 #include <dt-bindings/interrupt-controller/arm-gic.h>
0012
0013 / {
0014 model = "Marvell Armada 37xx SoC";
0015 compatible = "marvell,armada3700";
0016 interrupt-parent = <&gic>;
0017 #address-cells = <2>;
0018 #size-cells = <2>;
0019
0020 aliases {
0021 serial0 = &uart0;
0022 serial1 = &uart1;
0023 };
0024
0025 reserved-memory {
0026 #address-cells = <2>;
0027 #size-cells = <2>;
0028 ranges;
0029
0030 /*
0031 * The PSCI firmware region depicted below is the default one
0032 * and should be updated by the bootloader.
0033 */
0034 psci-area@4000000 {
0035 reg = <0 0x4000000 0 0x200000>;
0036 no-map;
0037 };
0038 };
0039
0040 cpus {
0041 #address-cells = <1>;
0042 #size-cells = <0>;
0043 cpu0: cpu@0 {
0044 device_type = "cpu";
0045 compatible = "arm,cortex-a53";
0046 reg = <0>;
0047 clocks = <&nb_periph_clk 16>;
0048 enable-method = "psci";
0049 };
0050 };
0051
0052 psci {
0053 compatible = "arm,psci-0.2";
0054 method = "smc";
0055 };
0056
0057 timer {
0058 compatible = "arm,armv8-timer";
0059 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
0060 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
0061 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
0062 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
0063 };
0064
0065 pmu {
0066 compatible = "arm,armv8-pmuv3";
0067 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
0068 };
0069
0070 soc {
0071 compatible = "simple-bus";
0072 #address-cells = <2>;
0073 #size-cells = <2>;
0074 ranges;
0075
0076 internal-regs@d0000000 {
0077 #address-cells = <1>;
0078 #size-cells = <1>;
0079 compatible = "simple-bus";
0080 /* 32M internal register @ 0xd000_0000 */
0081 ranges = <0x0 0x0 0xd0000000 0x2000000>;
0082
0083 wdt: watchdog@8300 {
0084 compatible = "marvell,armada-3700-wdt";
0085 reg = <0x8300 0x40>;
0086 marvell,system-controller = <&cpu_misc>;
0087 clocks = <&xtalclk>;
0088 };
0089
0090 cpu_misc: system-controller@d000 {
0091 compatible = "marvell,armada-3700-cpu-misc",
0092 "syscon";
0093 reg = <0xd000 0x1000>;
0094 };
0095
0096 spi0: spi@10600 {
0097 compatible = "marvell,armada-3700-spi";
0098 #address-cells = <1>;
0099 #size-cells = <0>;
0100 reg = <0x10600 0xA00>;
0101 clocks = <&nb_periph_clk 7>;
0102 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
0103 num-cs = <4>;
0104 status = "disabled";
0105 };
0106
0107 i2c0: i2c@11000 {
0108 compatible = "marvell,armada-3700-i2c";
0109 reg = <0x11000 0x24>;
0110 #address-cells = <1>;
0111 #size-cells = <0>;
0112 clocks = <&nb_periph_clk 10>;
0113 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
0114 mrvl,i2c-fast-mode;
0115 status = "disabled";
0116 };
0117
0118 i2c1: i2c@11080 {
0119 compatible = "marvell,armada-3700-i2c";
0120 reg = <0x11080 0x24>;
0121 #address-cells = <1>;
0122 #size-cells = <0>;
0123 clocks = <&nb_periph_clk 9>;
0124 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
0125 mrvl,i2c-fast-mode;
0126 status = "disabled";
0127 };
0128
0129 avs: avs@11500 {
0130 compatible = "marvell,armada-3700-avs",
0131 "syscon";
0132 reg = <0x11500 0x40>;
0133 };
0134
0135 uartclk: clock-controller@12010 {
0136 compatible = "marvell,armada-3700-uart-clock";
0137 reg = <0x12010 0x4>, <0x12210 0x4>;
0138 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
0139 <&tbg 3>, <&xtalclk>;
0140 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S",
0141 "TBG-B-S", "xtal";
0142 #clock-cells = <1>;
0143 };
0144
0145 uart0: serial@12000 {
0146 compatible = "marvell,armada-3700-uart";
0147 reg = <0x12000 0x18>;
0148 clocks = <&uartclk 0>;
0149 interrupts =
0150 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
0151 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0152 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
0153 interrupt-names = "uart-sum", "uart-tx", "uart-rx";
0154 status = "disabled";
0155 };
0156
0157 uart1: serial@12200 {
0158 compatible = "marvell,armada-3700-uart-ext";
0159 reg = <0x12200 0x30>;
0160 clocks = <&uartclk 1>;
0161 interrupts =
0162 <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
0163 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
0164 interrupt-names = "uart-tx", "uart-rx";
0165 status = "disabled";
0166 };
0167
0168 nb_periph_clk: nb-periph-clk@13000 {
0169 compatible = "marvell,armada-3700-periph-clock-nb",
0170 "syscon";
0171 reg = <0x13000 0x100>;
0172 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
0173 <&tbg 3>, <&xtalclk>;
0174 #clock-cells = <1>;
0175 };
0176
0177 sb_periph_clk: sb-periph-clk@18000 {
0178 compatible = "marvell,armada-3700-periph-clock-sb";
0179 reg = <0x18000 0x100>;
0180 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
0181 <&tbg 3>, <&xtalclk>;
0182 #clock-cells = <1>;
0183 };
0184
0185 tbg: tbg@13200 {
0186 compatible = "marvell,armada-3700-tbg-clock";
0187 reg = <0x13200 0x100>;
0188 clocks = <&xtalclk>;
0189 #clock-cells = <1>;
0190 };
0191
0192 pinctrl_nb: pinctrl@13800 {
0193 compatible = "marvell,armada3710-nb-pinctrl",
0194 "syscon", "simple-mfd";
0195 reg = <0x13800 0x100>, <0x13C00 0x20>;
0196 /* MPP1[19:0] */
0197 gpionb: gpio {
0198 #gpio-cells = <2>;
0199 gpio-ranges = <&pinctrl_nb 0 0 36>;
0200 gpio-controller;
0201 interrupt-controller;
0202 #interrupt-cells = <2>;
0203 interrupts =
0204 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0205 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0206 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0207 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0208 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
0209 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
0210 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
0211 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
0212 <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
0213 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
0214 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
0215 <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
0216 };
0217
0218 xtalclk: xtal-clk {
0219 compatible = "marvell,armada-3700-xtal-clock";
0220 clock-output-names = "xtal";
0221 #clock-cells = <0>;
0222 };
0223
0224 spi_quad_pins: spi-quad-pins {
0225 groups = "spi_quad";
0226 function = "spi";
0227 };
0228
0229 spi_cs1_pins: spi-cs1-pins {
0230 groups = "spi_cs1";
0231 function = "spi";
0232 };
0233
0234 i2c1_pins: i2c1-pins {
0235 groups = "i2c1";
0236 function = "i2c";
0237 };
0238
0239 i2c2_pins: i2c2-pins {
0240 groups = "i2c2";
0241 function = "i2c";
0242 };
0243
0244 uart1_pins: uart1-pins {
0245 groups = "uart1";
0246 function = "uart";
0247 };
0248
0249 uart2_pins: uart2-pins {
0250 groups = "uart2";
0251 function = "uart";
0252 };
0253
0254 mmc_pins: mmc-pins {
0255 groups = "emmc_nb";
0256 function = "emmc";
0257 };
0258 };
0259
0260 nb_pm: syscon@14000 {
0261 compatible = "marvell,armada-3700-nb-pm",
0262 "syscon";
0263 reg = <0x14000 0x60>;
0264 };
0265
0266 comphy: phy@18300 {
0267 compatible = "marvell,comphy-a3700";
0268 reg = <0x18300 0x300>,
0269 <0x1F000 0x400>,
0270 <0x5C000 0x400>,
0271 <0xe0178 0x8>;
0272 reg-names = "comphy",
0273 "lane1_pcie_gbe",
0274 "lane0_usb3_gbe",
0275 "lane2_sata_usb3";
0276 #address-cells = <1>;
0277 #size-cells = <0>;
0278 clocks = <&xtalclk>;
0279 clock-names = "xtal";
0280
0281 comphy0: phy@0 {
0282 reg = <0>;
0283 #phy-cells = <1>;
0284 };
0285
0286 comphy1: phy@1 {
0287 reg = <1>;
0288 #phy-cells = <1>;
0289 };
0290
0291 comphy2: phy@2 {
0292 reg = <2>;
0293 #phy-cells = <1>;
0294 };
0295 };
0296
0297 pinctrl_sb: pinctrl@18800 {
0298 compatible = "marvell,armada3710-sb-pinctrl",
0299 "syscon", "simple-mfd";
0300 reg = <0x18800 0x100>, <0x18C00 0x20>;
0301 /* MPP2[23:0] */
0302 gpiosb: gpio {
0303 #gpio-cells = <2>;
0304 gpio-ranges = <&pinctrl_sb 0 0 30>;
0305 gpio-controller;
0306 interrupt-controller;
0307 #interrupt-cells = <2>;
0308 interrupts =
0309 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
0310 <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
0311 <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
0312 <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
0313 <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
0314 };
0315
0316 rgmii_pins: mii-pins {
0317 groups = "rgmii";
0318 function = "mii";
0319 };
0320
0321 smi_pins: smi-pins {
0322 groups = "smi";
0323 function = "smi";
0324 };
0325
0326 sdio_pins: sdio-pins {
0327 groups = "sdio_sb";
0328 function = "sdio";
0329 };
0330
0331 pcie_reset_pins: pcie-reset-pins {
0332 groups = "pcie1"; /* this actually controls "pcie1_reset" */
0333 function = "gpio";
0334 };
0335
0336 pcie_clkreq_pins: pcie-clkreq-pins {
0337 groups = "pcie1_clkreq";
0338 function = "pcie";
0339 };
0340 };
0341
0342 eth0: ethernet@30000 {
0343 compatible = "marvell,armada-3700-neta";
0344 reg = <0x30000 0x4000>;
0345 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
0346 clocks = <&sb_periph_clk 8>;
0347 status = "disabled";
0348 };
0349
0350 mdio: mdio@32004 {
0351 #address-cells = <1>;
0352 #size-cells = <0>;
0353 compatible = "marvell,orion-mdio";
0354 reg = <0x32004 0x4>;
0355 };
0356
0357 eth1: ethernet@40000 {
0358 compatible = "marvell,armada-3700-neta";
0359 reg = <0x40000 0x4000>;
0360 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
0361 clocks = <&sb_periph_clk 7>;
0362 status = "disabled";
0363 };
0364
0365 usb3: usb@58000 {
0366 compatible = "marvell,armada3700-xhci",
0367 "generic-xhci";
0368 reg = <0x58000 0x4000>;
0369 marvell,usb-misc-reg = <&usb32_syscon>;
0370 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
0371 clocks = <&sb_periph_clk 12>;
0372 phys = <&comphy0 0>, <&usb2_utmi_otg_phy>;
0373 phy-names = "usb3-phy", "usb2-utmi-otg-phy";
0374 status = "disabled";
0375 };
0376
0377 usb2_utmi_otg_phy: phy@5d000 {
0378 compatible = "marvell,a3700-utmi-otg-phy";
0379 reg = <0x5d000 0x800>;
0380 marvell,usb-misc-reg = <&usb32_syscon>;
0381 #phy-cells = <0>;
0382 };
0383
0384 usb32_syscon: system-controller@5d800 {
0385 compatible = "marvell,armada-3700-usb2-host-device-misc",
0386 "syscon";
0387 reg = <0x5d800 0x800>;
0388 };
0389
0390 usb2: usb@5e000 {
0391 compatible = "marvell,armada-3700-ehci";
0392 reg = <0x5e000 0x1000>;
0393 marvell,usb-misc-reg = <&usb2_syscon>;
0394 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0395 phys = <&usb2_utmi_host_phy>;
0396 phy-names = "usb2-utmi-host-phy";
0397 status = "disabled";
0398 };
0399
0400 usb2_utmi_host_phy: phy@5f000 {
0401 compatible = "marvell,a3700-utmi-host-phy";
0402 reg = <0x5f000 0x800>;
0403 marvell,usb-misc-reg = <&usb2_syscon>;
0404 #phy-cells = <0>;
0405 };
0406
0407 usb2_syscon: system-controller@5f800 {
0408 compatible = "marvell,armada-3700-usb2-host-misc",
0409 "syscon";
0410 reg = <0x5f800 0x800>;
0411 };
0412
0413 xor@60900 {
0414 compatible = "marvell,armada-3700-xor";
0415 reg = <0x60900 0x100>,
0416 <0x60b00 0x100>;
0417
0418 xor10 {
0419 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
0420 };
0421 xor11 {
0422 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
0423 };
0424 };
0425
0426 crypto: crypto@90000 {
0427 compatible = "inside-secure,safexcel-eip97ies";
0428 reg = <0x90000 0x20000>;
0429 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
0430 <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
0431 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
0432 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
0433 <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
0434 <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
0435 interrupt-names = "mem", "ring0", "ring1",
0436 "ring2", "ring3", "eip";
0437 clocks = <&nb_periph_clk 15>;
0438 };
0439
0440 rwtm: mailbox@b0000 {
0441 compatible = "marvell,armada-3700-rwtm-mailbox";
0442 reg = <0xb0000 0x100>;
0443 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
0444 #mbox-cells = <1>;
0445 };
0446
0447 sdhci1: mmc@d0000 {
0448 compatible = "marvell,armada-3700-sdhci",
0449 "marvell,sdhci-xenon";
0450 reg = <0xd0000 0x300>,
0451 <0x1e808 0x4>;
0452 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
0453 clocks = <&nb_periph_clk 0>;
0454 clock-names = "core";
0455 status = "disabled";
0456 };
0457
0458 sdhci0: mmc@d8000 {
0459 compatible = "marvell,armada-3700-sdhci",
0460 "marvell,sdhci-xenon";
0461 reg = <0xd8000 0x300>,
0462 <0x17808 0x4>;
0463 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
0464 clocks = <&nb_periph_clk 0>;
0465 clock-names = "core";
0466 status = "disabled";
0467 };
0468
0469 sata: sata@e0000 {
0470 compatible = "marvell,armada-3700-ahci";
0471 reg = <0xe0000 0x178>;
0472 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
0473 clocks = <&nb_periph_clk 1>;
0474 phys = <&comphy2 0>;
0475 phy-names = "sata-phy";
0476 status = "disabled";
0477 };
0478
0479 gic: interrupt-controller@1d00000 {
0480 compatible = "arm,gic-v3";
0481 #interrupt-cells = <3>;
0482 interrupt-controller;
0483 reg = <0x1d00000 0x10000>, /* GICD */
0484 <0x1d40000 0x40000>, /* GICR */
0485 <0x1d80000 0x2000>, /* GICC */
0486 <0x1d90000 0x2000>, /* GICH */
0487 <0x1da0000 0x20000>; /* GICV */
0488 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
0489 };
0490 };
0491
0492 pcie0: pcie@d0070000 {
0493 compatible = "marvell,armada-3700-pcie";
0494 device_type = "pci";
0495 status = "disabled";
0496 reg = <0 0xd0070000 0 0x20000>;
0497 #address-cells = <3>;
0498 #size-cells = <2>;
0499 bus-range = <0x00 0xff>;
0500 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
0501 #interrupt-cells = <1>;
0502 clocks = <&sb_periph_clk 13>;
0503 msi-parent = <&pcie0>;
0504 msi-controller;
0505 /*
0506 * The 128 MiB address range [0xe8000000-0xf0000000] is
0507 * dedicated for PCIe and can be assigned to 8 windows
0508 * with size a power of two. Use one 64 KiB window for
0509 * IO at the end and the remaining seven windows
0510 * (totaling 127 MiB) for MEM.
0511 */
0512 ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x07f00000 /* Port 0 MEM */
0513 0x81000000 0 0x00000000 0 0xefff0000 0 0x00010000>; /* Port 0 IO */
0514 interrupt-map-mask = <0 0 0 7>;
0515 interrupt-map = <0 0 0 1 &pcie_intc 0>,
0516 <0 0 0 2 &pcie_intc 1>,
0517 <0 0 0 3 &pcie_intc 2>,
0518 <0 0 0 4 &pcie_intc 3>;
0519 max-link-speed = <2>;
0520 phys = <&comphy1 0>;
0521 pcie_intc: interrupt-controller {
0522 interrupt-controller;
0523 #interrupt-cells = <1>;
0524 };
0525 };
0526 };
0527
0528 firmware {
0529 armada-3700-rwtm {
0530 compatible = "marvell,armada-3700-rwtm-firmware";
0531 mboxes = <&rwtm 0>;
0532 status = "okay";
0533 };
0534 };
0535 };
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