0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright (C) 2019, Intel Corporation
0004 */
0005 #include "socfpga_agilex.dtsi"
0006
0007 / {
0008 model = "SoCFPGA Agilex SoCDK";
0009 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
0010
0011 aliases {
0012 serial0 = &uart0;
0013 ethernet0 = &gmac0;
0014 ethernet1 = &gmac1;
0015 ethernet2 = &gmac2;
0016 };
0017
0018 chosen {
0019 stdout-path = "serial0:115200n8";
0020 };
0021
0022 leds {
0023 compatible = "gpio-leds";
0024 led0 {
0025 label = "hps_led0";
0026 gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
0027 };
0028
0029 led1 {
0030 label = "hps_led1";
0031 gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
0032 };
0033
0034 led2 {
0035 label = "hps_led2";
0036 gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
0037 };
0038 };
0039
0040 memory {
0041 device_type = "memory";
0042 /* We expect the bootloader to fill in the reg */
0043 reg = <0 0 0 0>;
0044 };
0045 };
0046
0047 &gpio1 {
0048 status = "okay";
0049 };
0050
0051 &gmac0 {
0052 status = "okay";
0053 phy-mode = "rgmii";
0054 phy-handle = <&phy0>;
0055
0056 max-frame-size = <9000>;
0057
0058 mdio0 {
0059 #address-cells = <1>;
0060 #size-cells = <0>;
0061 compatible = "snps,dwmac-mdio";
0062 phy0: ethernet-phy@0 {
0063 reg = <4>;
0064
0065 txd0-skew-ps = <0>; /* -420ps */
0066 txd1-skew-ps = <0>; /* -420ps */
0067 txd2-skew-ps = <0>; /* -420ps */
0068 txd3-skew-ps = <0>; /* -420ps */
0069 rxd0-skew-ps = <420>; /* 0ps */
0070 rxd1-skew-ps = <420>; /* 0ps */
0071 rxd2-skew-ps = <420>; /* 0ps */
0072 rxd3-skew-ps = <420>; /* 0ps */
0073 txen-skew-ps = <0>; /* -420ps */
0074 txc-skew-ps = <900>; /* 0ps */
0075 rxdv-skew-ps = <420>; /* 0ps */
0076 rxc-skew-ps = <1680>; /* 780ps */
0077 };
0078 };
0079 };
0080
0081 &mmc {
0082 status = "okay";
0083 cap-sd-highspeed;
0084 broken-cd;
0085 bus-width = <4>;
0086 };
0087
0088 &osc1 {
0089 clock-frequency = <25000000>;
0090 };
0091
0092 &uart0 {
0093 status = "okay";
0094 };
0095
0096 &usb0 {
0097 status = "okay";
0098 disable-over-current;
0099 };
0100
0101 &watchdog0 {
0102 status = "okay";
0103 };
0104
0105 &qspi {
0106 status = "okay";
0107 flash@0 {
0108 #address-cells = <1>;
0109 #size-cells = <1>;
0110 compatible = "micron,mt25qu02g", "jedec,spi-nor";
0111 reg = <0>;
0112 spi-max-frequency = <100000000>;
0113
0114 m25p,fast-read;
0115 cdns,page-size = <256>;
0116 cdns,block-size = <16>;
0117 cdns,read-delay = <2>;
0118 cdns,tshsl-ns = <50>;
0119 cdns,tsd2d-ns = <50>;
0120 cdns,tchsh-ns = <4>;
0121 cdns,tslch-ns = <4>;
0122
0123 partitions {
0124 compatible = "fixed-partitions";
0125 #address-cells = <1>;
0126 #size-cells = <1>;
0127
0128 qspi_boot: partition@0 {
0129 label = "Boot and fpga data";
0130 reg = <0x0 0x03FE0000>;
0131 };
0132
0133 qspi_rootfs: partition@3FE0000 {
0134 label = "Root Filesystem - JFFS2";
0135 reg = <0x03FE0000 0x0C020000>;
0136 };
0137 };
0138 };
0139 };
