0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003 * Copyright 2018 Einfochips
0004 * Copyright 2019 Linaro Ltd.
0005 */
0006
0007 /dts-v1/;
0008
0009 #include "imx8qxp.dtsi"
0010
0011 / {
0012 model = "Einfochips i.MX8QXP AI_ML";
0013 compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
0014
0015 aliases {
0016 serial1 = &lpuart1;
0017 serial2 = &lpuart2;
0018 serial3 = &lpuart3;
0019 };
0020
0021 chosen {
0022 stdout-path = &lpuart2;
0023 };
0024
0025 memory@80000000 {
0026 device_type = "memory";
0027 reg = <0x00000000 0x80000000 0 0x80000000>;
0028 };
0029
0030 leds {
0031 compatible = "gpio-leds";
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&pinctrl_leds>;
0034
0035 user-led1 {
0036 label = "green:user1";
0037 gpios = <&lsio_gpio4 16 GPIO_ACTIVE_HIGH>;
0038 linux,default-trigger = "heartbeat";
0039 };
0040
0041 user-led2 {
0042 label = "green:user2";
0043 gpios = <&lsio_gpio0 6 GPIO_ACTIVE_HIGH>;
0044 linux,default-trigger = "none";
0045 };
0046
0047 user-led3 {
0048 label = "green:user3";
0049 gpios = <&lsio_gpio0 7 GPIO_ACTIVE_HIGH>;
0050 linux,default-trigger = "mmc1";
0051 default-state = "off";
0052 };
0053
0054 user-led4 {
0055 label = "green:user4";
0056 gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
0057 panic-indicator;
0058 linux,default-trigger = "none";
0059 };
0060
0061 wlan-active-led {
0062 label = "yellow:wlan";
0063 gpios = <&lsio_gpio4 17 GPIO_ACTIVE_HIGH>;
0064 linux,default-trigger = "phy0tx";
0065 default-state = "off";
0066 };
0067
0068 bt-active-led {
0069 label = "blue:bt";
0070 gpios = <&lsio_gpio4 18 GPIO_ACTIVE_HIGH>;
0071 linux,default-trigger = "hci0-power";
0072 default-state = "off";
0073 };
0074 };
0075
0076 sdio_pwrseq: sdio-pwrseq {
0077 compatible = "mmc-pwrseq-simple";
0078 pinctrl-names = "default";
0079 pinctrl-0 = <&pinctrl_wifi_reg_on>;
0080 reset-gpios = <&lsio_gpio3 24 GPIO_ACTIVE_LOW>;
0081 };
0082 };
0083
0084 /* BT */
0085 &lpuart0 {
0086 pinctrl-names = "default";
0087 pinctrl-0 = <&pinctrl_lpuart0>;
0088 uart-has-rtscts;
0089 status = "okay";
0090 };
0091
0092 /* LS-UART0 */
0093 &lpuart1 {
0094 pinctrl-names = "default";
0095 pinctrl-0 = <&pinctrl_lpuart1>;
0096 status = "okay";
0097 };
0098
0099 /* Debug */
0100 &lpuart2 {
0101 pinctrl-names = "default";
0102 pinctrl-0 = <&pinctrl_lpuart2>;
0103 status = "okay";
0104 };
0105
0106 /* PCI-E UART */
0107 &lpuart3 {
0108 pinctrl-names = "default";
0109 pinctrl-0 = <&pinctrl_lpuart3>;
0110 status = "okay";
0111 };
0112
0113 &fec1 {
0114 pinctrl-names = "default";
0115 pinctrl-0 = <&pinctrl_fec1>;
0116 phy-mode = "rgmii-id";
0117 phy-handle = <ðphy0>;
0118 fsl,magic-packet;
0119 status = "okay";
0120
0121 mdio {
0122 #address-cells = <1>;
0123 #size-cells = <0>;
0124
0125 ethphy0: ethernet-phy@0 {
0126 compatible = "ethernet-phy-ieee802.3-c22";
0127 reg = <0>;
0128 };
0129 };
0130 };
0131
0132 /* WiFi */
0133 &usdhc1 {
0134 #address-cells = <1>;
0135 #size-cells = <0>;
0136 assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>;
0137 assigned-clock-rates = <200000000>;
0138 pinctrl-names = "default";
0139 pinctrl-0 = <&pinctrl_usdhc1>;
0140 bus-width = <4>;
0141 no-sd;
0142 non-removable;
0143 mmc-pwrseq = <&sdio_pwrseq>;
0144 status = "okay";
0145
0146 brcmf: wifi@1 {
0147 reg = <1>;
0148 compatible = "brcm,bcm4329-fmac";
0149 };
0150 };
0151
0152 /* SD */
0153 &usdhc2 {
0154 assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>;
0155 assigned-clock-rates = <200000000>;
0156 pinctrl-names = "default";
0157 pinctrl-0 = <&pinctrl_usdhc2>;
0158 bus-width = <4>;
0159 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
0160 status = "okay";
0161 };
0162
0163 &iomuxc {
0164 pinctrl_fec1: fec1grp {
0165 fsl,pins = <
0166 IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020
0167 IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
0168 IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020
0169 IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020
0170 IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020
0171 IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020
0172 IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020
0173 IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020
0174 IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020
0175 IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020
0176 IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020
0177 IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020
0178 IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020
0179 IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020
0180 >;
0181 };
0182
0183 pinctrl_leds: ledsgrp{
0184 fsl,pins = <
0185 IMX8QXP_ESAI0_TX2_RX3_LSIO_GPIO0_IO06 0x00000021
0186 IMX8QXP_ESAI0_TX3_RX2_LSIO_GPIO0_IO07 0x00000021
0187 IMX8QXP_EMMC0_DATA7_LSIO_GPIO4_IO16 0x00000021
0188 IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x00000021
0189 IMX8QXP_EMMC0_STROBE_LSIO_GPIO4_IO17 0x00000021
0190 IMX8QXP_EMMC0_RESET_B_LSIO_GPIO4_IO18 0x00000021
0191 >;
0192 };
0193
0194 pinctrl_lpuart0: lpuart0grp {
0195 fsl,pins = <
0196 IMX8QXP_UART0_RX_ADMA_UART0_RX 0X06000020
0197 IMX8QXP_UART0_TX_ADMA_UART0_TX 0X06000020
0198 IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020
0199 IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020
0200 >;
0201 };
0202
0203 pinctrl_lpuart1: lpuart1grp {
0204 fsl,pins = <
0205 IMX8QXP_UART1_RX_ADMA_UART1_RX 0X06000020
0206 IMX8QXP_UART1_TX_ADMA_UART1_TX 0X06000020
0207 >;
0208 };
0209
0210 pinctrl_lpuart2: lpuart2grp {
0211 fsl,pins = <
0212 IMX8QXP_UART2_RX_ADMA_UART2_RX 0X06000020
0213 IMX8QXP_UART2_TX_ADMA_UART2_TX 0X06000020
0214 >;
0215 };
0216
0217 pinctrl_lpuart3: lpuart3grp {
0218 fsl,pins = <
0219 IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0X06000020
0220 IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0X06000020
0221 >;
0222 };
0223
0224 pinctrl_usdhc1: usdhc1grp {
0225 fsl,pins = <
0226 IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
0227 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021
0228 IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021
0229 IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021
0230 IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021
0231 IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021
0232 >;
0233 };
0234
0235 pinctrl_usdhc2: usdhc2grp {
0236 fsl,pins = <
0237 IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041
0238 IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021
0239 IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021
0240 IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021
0241 IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021
0242 IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021
0243 IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021
0244 IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000021
0245 >;
0246 };
0247
0248 pinctrl_wifi_reg_on: wifiregongrp {
0249 fsl,pins = <
0250 IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x00000021
0251 >;
0252 };
0253 };
