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0001 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
0002 /*
0003  * Copyright 2020-2021 TQ-Systems GmbH
0004  */
0005 
0006 /dts-v1/;
0007 
0008 #include "imx8mn-tqma8mqnl.dtsi"
0009 #include "mba8mx.dtsi"
0010 
0011 / {
0012         model = "TQ-Systems GmbH i.MX8MN TQMa8MxNL on MBa8Mx";
0013         compatible = "tq,imx8mn-tqma8mqnl-mba8mx", "tq,imx8mn-tqma8mqnl", "fsl,imx8mn";
0014 
0015         aliases {
0016                 eeprom0 = &eeprom3;
0017                 mmc0 = &usdhc3;
0018                 mmc1 = &usdhc2;
0019                 mmc2 = &usdhc1;
0020                 rtc0 = &pcf85063;
0021                 rtc1 = &snvs_rtc;
0022         };
0023 
0024         reg_usdhc2_vmmc: regulator-vmmc {
0025                 compatible = "regulator-fixed";
0026                 pinctrl-names = "default";
0027                 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
0028                 regulator-name = "VSD_3V3";
0029                 regulator-min-microvolt = <3300000>;
0030                 regulator-max-microvolt = <3300000>;
0031                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
0032                 enable-active-high;
0033                 startup-delay-us = <100>;
0034                 off-on-delay-us = <12000>;
0035         };
0036 };
0037 
0038 /* Located on TQMa8MxML-ADAP */
0039 &gpio2 {
0040         pinctrl-names = "default";
0041         pinctrl-0 = <&pinctrl_usb0hub_sel>;
0042 
0043         sel-usb-hub-hog {
0044                 gpio-hog;
0045                 gpios = <1 GPIO_ACTIVE_HIGH>;
0046                 output-high;
0047         };
0048 };
0049 
0050 &i2c1 {
0051         expander2: gpio@27 {
0052                 compatible = "nxp,pca9555";
0053                 reg = <0x27>;
0054                 gpio-controller;
0055                 #gpio-cells = <2>;
0056                 vcc-supply = <&reg_vcc_3v3>;
0057                 pinctrl-names = "default";
0058                 pinctrl-0 = <&pinctrl_expander2>;
0059                 interrupt-parent = <&gpio1>;
0060                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
0061                 interrupt-controller;
0062                 #interrupt-cells = <2>;
0063         };
0064 };
0065 
0066 &sai3 {
0067         assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
0068         assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
0069         clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
0070         clocks = <&clk IMX8MN_CLK_SAI3_IPG>, <&clk IMX8MN_CLK_DUMMY>,
0071                  <&clk IMX8MN_CLK_SAI3_ROOT>, <&clk IMX8MN_CLK_DUMMY>,
0072                  <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_AUDIO_PLL1_OUT>,
0073                  <&clk IMX8MN_AUDIO_PLL2_OUT>;
0074 };
0075 
0076 &tlv320aic3x04 {
0077         clock-names = "mclk";
0078         clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
0079 };
0080 
0081 &usbotg1 {
0082         dr_mode = "host";
0083         disable-over-current;
0084         power-active-high;
0085         status = "okay";
0086 };
0087 
0088 &iomuxc {
0089         pinctrl_ecspi1: ecspi1grp {
0090                 fsl,pins = <MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK        0x00000146>,
0091                            <MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI        0x00000146>,
0092                            <MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO        0x00000146>,
0093                            <MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9           0x00000146>;
0094         };
0095 
0096         pinctrl_ecspi2: ecspi2grp {
0097                 fsl,pins = <MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK        0x00000146>,
0098                            <MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI        0x00000146>,
0099                            <MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO        0x00000146>,
0100                            <MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13          0x00000146>;
0101         };
0102 
0103         pinctrl_expander2: expander2grp {
0104                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9           0x94>;
0105         };
0106 
0107         pinctrl_fec1: fec1grp {
0108                 fsl,pins = <MX8MN_IOMUXC_ENET_MDC_ENET1_MDC             0x40000002>,
0109                            <MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO           0x40000002>,
0110                            <MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3       0x14>,
0111                            <MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2       0x14>,
0112                            <MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1       0x14>,
0113                            <MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0       0x14>,
0114                            <MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3       0x90>,
0115                            <MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2       0x90>,
0116                            <MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1       0x90>,
0117                            <MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0       0x90>,
0118                            <MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC       0x14>,
0119                            <MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC       0x90>,
0120                            <MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90>,
0121                            <MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x14>;
0122         };
0123 
0124         pinctrl_gpiobutton: gpiobuttongrp {
0125                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5           0x84>,
0126                            <MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7           0x84>,
0127                            <MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0              0x84>;
0128         };
0129 
0130         pinctrl_gpioled: gpioledgrp {
0131                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0           0x84>,
0132                            <MX8MN_IOMUXC_NAND_DQS_GPIO3_IO14            0x84>;
0133         };
0134 
0135         pinctrl_i2c2: i2c2grp {
0136                 fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL              0x400001C4>,
0137                            <MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA              0x400001C4>;
0138         };
0139 
0140         pinctrl_i2c2_gpio: i2c2gpiogrp {
0141                 fsl,pins = <MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16            0x400001C4>,
0142                            <MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17            0x400001C4>;
0143         };
0144 
0145         pinctrl_i2c3: i2c3grp {
0146                 fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL              0x400001C4>,
0147                            <MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA              0x400001C4>;
0148         };
0149 
0150         pinctrl_i2c3_gpio: i2c3gpiogrp {
0151                 fsl,pins = <MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18            0x400001C4>,
0152                            <MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19            0x400001C4>;
0153         };
0154 
0155         pinctrl_pwm3: pwm3grp {
0156                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO14_PWM3_OUT            0x14>;
0157         };
0158 
0159         pinctrl_pwm4: pwm4grp {
0160                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO15_PWM4_OUT            0x14>;
0161         };
0162 
0163         pinctrl_sai3: sai3grp {
0164                 fsl,pins = <MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK            0x94>,
0165                            <MX8MN_IOMUXC_SAI3_RXC_SAI3_RX_BCLK          0x94>,
0166                            <MX8MN_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC         0x94>,
0167                            <MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0         0x94>,
0168                            <MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC         0x94>,
0169                            <MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0         0x94>,
0170                            <MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK          0x94>;
0171         };
0172 
0173         pinctrl_uart1: uart1grp {
0174                 fsl,pins = <MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX         0x16>,
0175                            <MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX         0x16>;
0176         };
0177 
0178         pinctrl_uart2: uart2grp {
0179                 fsl,pins = <MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX         0x16>,
0180                            <MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX         0x16>;
0181         };
0182 
0183         pinctrl_uart3: uart3grp {
0184                 fsl,pins = <MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX         0x16>,
0185                            <MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX         0x16>;
0186         };
0187 
0188         pinctrl_uart4: uart4grp {
0189                 fsl,pins = <MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX         0x16>,
0190                            <MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX         0x16>;
0191         };
0192 
0193         pinctrl_usb0hub_sel: usb0hub-selgrp {
0194                 /* SEL_USB_HUB_B */
0195                 fsl,pins = <MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1              0x84>;
0196         };
0197 
0198         pinctrl_usbotg: usbotggrp {
0199                 fsl,pins = <MX8MN_IOMUXC_GPIO1_IO12_USB1_OTG_PWR        0x84>,
0200                            <MX8MN_IOMUXC_GPIO1_IO13_USB1_OTG_OC         0x84>,
0201                            <MX8MN_IOMUXC_GPIO1_IO10_USB1_OTG_ID         0x1C4>;
0202         };
0203 
0204         pinctrl_usdhc2: usdhc2grp {
0205                 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK             0x1d4>,
0206                            <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD             0x1d4>,
0207                            <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0         0x1d4>,
0208                            <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1         0x1d4>,
0209                            <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2         0x1d4>,
0210                            <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3         0x1d4>,
0211                            <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT      0x84>;
0212         };
0213 
0214         pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
0215                 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK             0x1d4>,
0216                            <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD             0x1d4>,
0217                            <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0         0x1d4>,
0218                            <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1         0x1d4>,
0219                            <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2         0x1d4>,
0220                            <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3         0x1d4>,
0221                            <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT      0x84>;
0222         };
0223 
0224         pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
0225                 fsl,pins = <MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK             0x1d4>,
0226                            <MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD             0x1d4>,
0227                            <MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0         0x1d4>,
0228                            <MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1         0x1d4>,
0229                            <MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2         0x1d4>,
0230                            <MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3         0x1d4>,
0231                            <MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT      0x84>;
0232         };
0233 
0234         pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
0235                 fsl,pins = <MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12            0x84>;
0236         };
0237 };