0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Copyright 2020 Compass Electronics Group, LLC
0004 */
0005
0006 / {
0007 leds {
0008 compatible = "gpio-leds";
0009
0010 led-0 {
0011 label = "gen_led0";
0012 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
0013 default-state = "off";
0014 };
0015
0016 led-1 {
0017 label = "gen_led1";
0018 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
0019 default-state = "off";
0020 };
0021
0022 led-2 {
0023 label = "gen_led2";
0024 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
0025 default-state = "off";
0026 };
0027
0028 led-3 {
0029 pinctrl-names = "default";
0030 pinctrl-0 = <&pinctrl_led3>;
0031 label = "heartbeat";
0032 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
0033 linux,default-trigger = "heartbeat";
0034 };
0035 };
0036
0037 reg_audio: regulator-audio {
0038 compatible = "regulator-fixed";
0039 regulator-name = "3v3_aud";
0040 regulator-min-microvolt = <3300000>;
0041 regulator-max-microvolt = <3300000>;
0042 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
0043 enable-active-high;
0044 };
0045
0046 reg_usdhc2_vmmc: regulator-usdhc2 {
0047 compatible = "regulator-fixed";
0048 regulator-name = "vsd_3v3";
0049 regulator-min-microvolt = <3300000>;
0050 regulator-max-microvolt = <3300000>;
0051 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
0052 enable-active-high;
0053 };
0054
0055 reg_usb_otg_vbus: regulator-usb {
0056 compatible = "regulator-fixed";
0057 pinctrl-names = "default";
0058 pinctrl-0 = <&pinctrl_reg_usb_otg>;
0059 regulator-name = "usb_otg_vbus";
0060 regulator-min-microvolt = <5000000>;
0061 regulator-max-microvolt = <5000000>;
0062 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
0063 enable-active-high;
0064 };
0065
0066 sound {
0067 compatible = "fsl,imx-audio-wm8962";
0068 model = "wm8962-audio";
0069 audio-cpu = <&sai3>;
0070 audio-codec = <&wm8962>;
0071 audio-routing =
0072 "Headphone Jack", "HPOUTL",
0073 "Headphone Jack", "HPOUTR",
0074 "Ext Spk", "SPKOUTL",
0075 "Ext Spk", "SPKOUTR",
0076 "AMIC", "MICBIAS",
0077 "IN3R", "AMIC";
0078 };
0079 };
0080
0081 &ecspi2 {
0082 pinctrl-names = "default";
0083 pinctrl-0 = <&pinctrl_espi2>;
0084 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
0085 status = "okay";
0086
0087 eeprom@0 {
0088 compatible = "microchip,at25160bn", "atmel,at25";
0089 reg = <0>;
0090 spi-max-frequency = <5000000>;
0091 spi-cpha;
0092 spi-cpol;
0093 pagesize = <32>;
0094 size = <2048>;
0095 address-width = <16>;
0096 };
0097 };
0098
0099 &i2c4 {
0100 clock-frequency = <400000>;
0101 pinctrl-names = "default";
0102 pinctrl-0 = <&pinctrl_i2c4>;
0103 status = "okay";
0104
0105 pca6416_0: gpio@20 {
0106 compatible = "nxp,pcal6416";
0107 reg = <0x20>;
0108 pinctrl-names = "default";
0109 pinctrl-0 = <&pinctrl_pcal6414>;
0110 gpio-controller;
0111 #gpio-cells = <2>;
0112 interrupt-parent = <&gpio4>;
0113 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
0114 };
0115
0116 pca6416_1: gpio@21 {
0117 compatible = "nxp,pcal6416";
0118 reg = <0x21>;
0119 gpio-controller;
0120 #gpio-cells = <2>;
0121 interrupt-parent = <&gpio4>;
0122 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
0123 };
0124
0125 wm8962: audio-codec@1a {
0126 compatible = "wlf,wm8962";
0127 reg = <0x1a>;
0128 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
0129 DCVDD-supply = <®_audio>;
0130 DBVDD-supply = <®_audio>;
0131 AVDD-supply = <®_audio>;
0132 CPVDD-supply = <®_audio>;
0133 MICVDD-supply = <®_audio>;
0134 PLLVDD-supply = <®_audio>;
0135 SPKVDD1-supply = <®_audio>;
0136 SPKVDD2-supply = <®_audio>;
0137 gpio-cfg = <
0138 0x0000 /* 0:Default */
0139 0x0000 /* 1:Default */
0140 0x0000 /* 2:FN_DMICCLK */
0141 0x0000 /* 3:Default */
0142 0x0000 /* 4:FN_DMICCDAT */
0143 0x0000 /* 5:Default */
0144 >;
0145 };
0146 };
0147
0148 &easrc {
0149 fsl,asrc-rate = <48000>;
0150 status = "okay";
0151 };
0152
0153 &sai3 {
0154 pinctrl-names = "default";
0155 pinctrl-0 = <&pinctrl_sai3>;
0156 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
0157 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
0158 assigned-clock-rates = <24576000>;
0159 fsl,sai-mclk-direction-output;
0160 status = "okay";
0161 };
0162
0163 &snvs_pwrkey {
0164 status = "okay";
0165 };
0166
0167 &uart2 { /* console */
0168 pinctrl-names = "default";
0169 pinctrl-0 = <&pinctrl_uart2>;
0170 status = "okay";
0171 };
0172
0173 &uart3 {
0174 pinctrl-names = "default";
0175 pinctrl-0 = <&pinctrl_uart3>;
0176 assigned-clocks = <&clk IMX8MN_CLK_UART3>;
0177 assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
0178 uart-has-rtscts;
0179 status = "okay";
0180 };
0181
0182 &usbotg1 {
0183 vbus-supply = <®_usb_otg_vbus>;
0184 disable-over-current;
0185 dr_mode = "otg";
0186 status = "okay";
0187 };
0188
0189 &usdhc2 {
0190 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0191 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
0192 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0193 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0194 bus-width = <4>;
0195 vmmc-supply = <®_usdhc2_vmmc>;
0196 status = "okay";
0197 };
0198
0199 &iomuxc {
0200 pinctrl_espi2: espi2grp {
0201 fsl,pins = <
0202 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
0203 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
0204 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
0205 MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
0206 >;
0207 };
0208
0209 pinctrl_i2c2: i2c2grp {
0210 fsl,pins = <
0211 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
0212 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
0213 >;
0214 };
0215
0216 pinctrl_i2c4: i2c4grp {
0217 fsl,pins = <
0218 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
0219 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
0220 >;
0221 };
0222
0223 pinctrl_led3: led3grp {
0224 fsl,pins = <
0225 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
0226 >;
0227 };
0228
0229 pinctrl_pcal6414: pcal6414-gpiogrp {
0230 fsl,pins = <
0231 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
0232 >;
0233 };
0234
0235 pinctrl_reg_usb_otg: reg-otggrp {
0236 fsl,pins = <
0237 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
0238 >;
0239 };
0240
0241 pinctrl_sai3: sai3grp {
0242 fsl,pins = <
0243 MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
0244 MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
0245 MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
0246 MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
0247 MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
0248 >;
0249 };
0250
0251 pinctrl_uart2: uart2grp {
0252 fsl,pins = <
0253 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
0254 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
0255 >;
0256 };
0257
0258 pinctrl_uart3: uart3grp {
0259 fsl,pins = <
0260 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
0261 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
0262 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
0263 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
0264 >;
0265 };
0266
0267 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
0268 fsl,pins = <
0269 MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
0270 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
0271 >;
0272 };
0273
0274 pinctrl_usdhc2: usdhc2grp {
0275 fsl,pins = <
0276 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
0277 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
0278 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
0279 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
0280 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
0281 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
0282 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0283 >;
0284 };
0285
0286 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
0287 fsl,pins = <
0288 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
0289 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
0290 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
0291 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
0292 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
0293 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
0294 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0295 >;
0296 };
0297
0298 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
0299 fsl,pins = <
0300 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
0301 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
0302 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
0303 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
0304 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
0305 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
0306 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0307 >;
0308 };
0309 };
