0001 // SPDX-License-Identifier: GPL-2.0+ OR MIT
0002 /*
0003 * Copyright (C) 2019 Kontron Electronics GmbH
0004 */
0005
0006 /dts-v1/;
0007
0008 #include "imx8mm-kontron-n801x-som.dtsi"
0009
0010 / {
0011 model = "Kontron i.MX8MM N801X S";
0012 compatible = "kontron,imx8mm-n801x-s", "kontron,imx8mm-n801x-som", "fsl,imx8mm";
0013
0014 aliases {
0015 ethernet1 = &usbnet;
0016 };
0017
0018 /* fixed crystal dedicated to mcp2515 */
0019 osc_can: clock-osc-can {
0020 compatible = "fixed-clock";
0021 #clock-cells = <0>;
0022 clock-frequency = <16000000>;
0023 clock-output-names = "osc-can";
0024 };
0025
0026 leds {
0027 compatible = "gpio-leds";
0028 pinctrl-names = "default";
0029 pinctrl-0 = <&pinctrl_gpio_led>;
0030
0031 led1 {
0032 label = "led1";
0033 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
0034 linux,default-trigger = "heartbeat";
0035 };
0036
0037 led2 {
0038 label = "led2";
0039 gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
0040 };
0041
0042 led3 {
0043 label = "led3";
0044 gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
0045 };
0046
0047 led4 {
0048 label = "led4";
0049 gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
0050 };
0051
0052 led5 {
0053 label = "led5";
0054 gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
0055 };
0056
0057 led6 {
0058 label = "led6";
0059 gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
0060 };
0061 };
0062
0063 pwm-beeper {
0064 compatible = "pwm-beeper";
0065 pwms = <&pwm2 0 5000 0>;
0066 };
0067
0068 reg_rst_eth2: regulator-rst-eth2 {
0069 compatible = "regulator-fixed";
0070 regulator-name = "rst-usb-eth2";
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&pinctrl_usb_eth2>;
0073 gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
0074 enable-active-high;
0075 regulator-always-on;
0076 };
0077
0078 reg_vdd_5v: regulator-5v {
0079 compatible = "regulator-fixed";
0080 regulator-name = "vdd-5v";
0081 regulator-min-microvolt = <5000000>;
0082 regulator-max-microvolt = <5000000>;
0083 };
0084 };
0085
0086 &ecspi2 {
0087 pinctrl-names = "default";
0088 pinctrl-0 = <&pinctrl_ecspi2>;
0089 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
0090 status = "okay";
0091
0092 can0: can@0 {
0093 compatible = "microchip,mcp2515";
0094 reg = <0>;
0095 pinctrl-names = "default";
0096 pinctrl-0 = <&pinctrl_can>;
0097 clocks = <&osc_can>;
0098 interrupt-parent = <&gpio4>;
0099 interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
0100 spi-max-frequency = <10000000>;
0101 vdd-supply = <®_vdd_3v3>;
0102 xceiver-supply = <®_vdd_5v>;
0103 };
0104 };
0105
0106 &ecspi3 {
0107 pinctrl-names = "default";
0108 pinctrl-0 = <&pinctrl_ecspi3>;
0109 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
0110 status = "okay";
0111 };
0112
0113 &fec1 {
0114 pinctrl-names = "default";
0115 pinctrl-0 = <&pinctrl_enet>;
0116 phy-connection-type = "rgmii-rxid";
0117 phy-handle = <ðphy>;
0118 status = "okay";
0119
0120 mdio {
0121 #address-cells = <1>;
0122 #size-cells = <0>;
0123
0124 ethphy: ethernet-phy@0 {
0125 reg = <0>;
0126 reset-assert-us = <1>;
0127 reset-deassert-us = <15000>;
0128 reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
0129 };
0130 };
0131 };
0132
0133 &i2c4 {
0134 clock-frequency = <100000>;
0135 pinctrl-names = "default";
0136 pinctrl-0 = <&pinctrl_i2c4>;
0137 status = "okay";
0138
0139 rtc@32 {
0140 compatible = "epson,rx8900";
0141 reg = <0x32>;
0142 };
0143 };
0144
0145 &pwm2 {
0146 pinctrl-names = "default";
0147 pinctrl-0 = <&pinctrl_pwm2>;
0148 status = "okay";
0149 };
0150
0151 &uart1 {
0152 pinctrl-names = "default";
0153 pinctrl-0 = <&pinctrl_uart1>;
0154 uart-has-rtscts;
0155 status = "okay";
0156 };
0157
0158 &uart2 {
0159 pinctrl-names = "default";
0160 pinctrl-0 = <&pinctrl_uart2>;
0161 linux,rs485-enabled-at-boot-time;
0162 uart-has-rtscts;
0163 status = "okay";
0164 };
0165
0166 &usbotg1 {
0167 dr_mode = "otg";
0168 over-current-active-low;
0169 status = "okay";
0170 };
0171
0172 &usbotg2 {
0173 dr_mode = "host";
0174 disable-over-current;
0175 #address-cells = <1>;
0176 #size-cells = <0>;
0177 status = "okay";
0178
0179 usb1@1 {
0180 compatible = "usb424,9514";
0181 reg = <1>;
0182 #address-cells = <1>;
0183 #size-cells = <0>;
0184
0185 usbnet: ethernet@1 {
0186 compatible = "usb424,ec00";
0187 reg = <1>;
0188 local-mac-address = [ 00 00 00 00 00 00 ];
0189 };
0190 };
0191 };
0192
0193 &usdhc2 {
0194 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0195 pinctrl-0 = <&pinctrl_usdhc2>;
0196 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0197 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0198 vmmc-supply = <®_vdd_3v3>;
0199 vqmmc-supply = <®_nvcc_sd>;
0200 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
0201 status = "okay";
0202 };
0203
0204 &iomuxc {
0205 pinctrl-names = "default";
0206 pinctrl-0 = <&pinctrl_gpio>;
0207
0208 pinctrl_can: cangrp {
0209 fsl,pins = <
0210 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
0211 >;
0212 };
0213
0214 pinctrl_ecspi2: ecspi2grp {
0215 fsl,pins = <
0216 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
0217 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
0218 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
0219 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19
0220 >;
0221 };
0222
0223 pinctrl_ecspi3: ecspi3grp {
0224 fsl,pins = <
0225 MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82
0226 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82
0227 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82
0228 MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19
0229 >;
0230 };
0231
0232 pinctrl_enet: enetgrp {
0233 fsl,pins = <
0234 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
0235 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
0236 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
0237 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
0238 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
0239 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
0240 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
0241 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
0242 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
0243 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
0244 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
0245 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
0246 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
0247 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
0248 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */
0249 MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */
0250 >;
0251 };
0252
0253 pinctrl_gpio_led: gpioledgrp {
0254 fsl,pins = <
0255 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
0256 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19
0257 MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19
0258 MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19
0259 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
0260 MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19
0261 MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19
0262 >;
0263 };
0264
0265 pinctrl_gpio: gpiogrp {
0266 fsl,pins = <
0267 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
0268 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
0269 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
0270 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19
0271 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
0272 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
0273 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
0274 MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
0275 >;
0276 };
0277
0278 pinctrl_i2c4: i2c4grp {
0279 fsl,pins = <
0280 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
0281 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
0282 >;
0283 };
0284
0285 pinctrl_pwm2: pwm2grp {
0286 fsl,pins = <
0287 MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19
0288 >;
0289 };
0290
0291 pinctrl_uart1: uart1grp {
0292 fsl,pins = <
0293 MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140
0294 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140
0295 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140
0296 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140
0297 >;
0298 };
0299
0300 pinctrl_uart2: uart2grp {
0301 fsl,pins = <
0302 MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140
0303 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140
0304 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140
0305 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140
0306 >;
0307 };
0308
0309 pinctrl_usb_eth2: usbeth2grp {
0310 fsl,pins = <
0311 MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19
0312 >;
0313 };
0314
0315 pinctrl_usdhc2: usdhc2grp {
0316 fsl,pins = <
0317 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
0318 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
0319 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
0320 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
0321 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
0322 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
0323 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
0324 >;
0325 };
0326
0327 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
0328 fsl,pins = <
0329 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
0330 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
0331 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
0332 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
0333 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
0334 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
0335 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
0336 >;
0337 };
0338
0339 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
0340 fsl,pins = <
0341 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
0342 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
0343 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
0344 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
0345 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
0346 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
0347 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
0348 >;
0349 };
0350 };
