0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright 2020 NXP
0004 */
0005
0006 /dts-v1/;
0007
0008 #include <dt-bindings/phy/phy-imx8-pcie.h>
0009 #include <dt-bindings/usb/pd.h>
0010 #include "imx8mm.dtsi"
0011
0012 / {
0013 chosen {
0014 stdout-path = &uart2;
0015 };
0016
0017 memory@40000000 {
0018 device_type = "memory";
0019 reg = <0x0 0x40000000 0 0x80000000>;
0020 };
0021
0022 leds {
0023 compatible = "gpio-leds";
0024 pinctrl-names = "default";
0025 pinctrl-0 = <&pinctrl_gpio_led>;
0026
0027 status {
0028 label = "status";
0029 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
0030 default-state = "on";
0031 };
0032 };
0033
0034 pcie0_refclk: pcie0-refclk {
0035 compatible = "fixed-clock";
0036 #clock-cells = <0>;
0037 clock-frequency = <100000000>;
0038 };
0039
0040 reg_pcie0: regulator-pcie {
0041 compatible = "regulator-fixed";
0042 pinctrl-names = "default";
0043 pinctrl-0 = <&pinctrl_pcie0_reg>;
0044 regulator-name = "MPCIE_3V3";
0045 regulator-min-microvolt = <3300000>;
0046 regulator-max-microvolt = <3300000>;
0047 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0048 enable-active-high;
0049 };
0050
0051 reg_usdhc2_vmmc: regulator-usdhc2 {
0052 compatible = "regulator-fixed";
0053 pinctrl-names = "default";
0054 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
0055 regulator-name = "VSD_3V3";
0056 regulator-min-microvolt = <3300000>;
0057 regulator-max-microvolt = <3300000>;
0058 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
0059 enable-active-high;
0060 };
0061
0062 backlight: backlight {
0063 compatible = "pwm-backlight";
0064 pwms = <&pwm1 0 5000000 0>;
0065 brightness-levels = <0 255>;
0066 num-interpolated-steps = <255>;
0067 default-brightness-level = <250>;
0068 };
0069
0070 ir-receiver {
0071 compatible = "gpio-ir-receiver";
0072 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
0073 pinctrl-names = "default";
0074 pinctrl-0 = <&pinctrl_ir>;
0075 linux,autosuspend-period = <125>;
0076 };
0077
0078 audio_codec_bt_sco: audio-codec-bt-sco {
0079 compatible = "linux,bt-sco";
0080 #sound-dai-cells = <1>;
0081 };
0082
0083 wm8524: audio-codec {
0084 #sound-dai-cells = <0>;
0085 compatible = "wlf,wm8524";
0086 pinctrl-names = "default";
0087 pinctrl-0 = <&pinctrl_gpio_wlf>;
0088 wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
0089 };
0090
0091 sound-bt-sco {
0092 compatible = "simple-audio-card";
0093 simple-audio-card,name = "bt-sco-audio";
0094 simple-audio-card,format = "dsp_a";
0095 simple-audio-card,bitclock-inversion;
0096 simple-audio-card,frame-master = <&btcpu>;
0097 simple-audio-card,bitclock-master = <&btcpu>;
0098
0099 btcpu: simple-audio-card,cpu {
0100 sound-dai = <&sai2>;
0101 dai-tdm-slot-num = <2>;
0102 dai-tdm-slot-width = <16>;
0103 };
0104
0105 simple-audio-card,codec {
0106 sound-dai = <&audio_codec_bt_sco 1>;
0107 };
0108 };
0109
0110 sound-wm8524 {
0111 compatible = "simple-audio-card";
0112 simple-audio-card,name = "wm8524-audio";
0113 simple-audio-card,format = "i2s";
0114 simple-audio-card,frame-master = <&cpudai>;
0115 simple-audio-card,bitclock-master = <&cpudai>;
0116 simple-audio-card,widgets =
0117 "Line", "Left Line Out Jack",
0118 "Line", "Right Line Out Jack";
0119 simple-audio-card,routing =
0120 "Left Line Out Jack", "LINEVOUTL",
0121 "Right Line Out Jack", "LINEVOUTR";
0122
0123 cpudai: simple-audio-card,cpu {
0124 sound-dai = <&sai3>;
0125 dai-tdm-slot-num = <2>;
0126 dai-tdm-slot-width = <32>;
0127 };
0128
0129 simple-audio-card,codec {
0130 sound-dai = <&wm8524>;
0131 clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
0132 };
0133 };
0134 };
0135
0136 &A53_0 {
0137 cpu-supply = <&buck2_reg>;
0138 };
0139
0140 &A53_1 {
0141 cpu-supply = <&buck2_reg>;
0142 };
0143
0144 &A53_2 {
0145 cpu-supply = <&buck2_reg>;
0146 };
0147
0148 &A53_3 {
0149 cpu-supply = <&buck2_reg>;
0150 };
0151
0152 &fec1 {
0153 pinctrl-names = "default";
0154 pinctrl-0 = <&pinctrl_fec1>;
0155 phy-mode = "rgmii-id";
0156 phy-handle = <ðphy0>;
0157 fsl,magic-packet;
0158 status = "okay";
0159
0160 mdio {
0161 #address-cells = <1>;
0162 #size-cells = <0>;
0163
0164 ethphy0: ethernet-phy@0 {
0165 compatible = "ethernet-phy-ieee802.3-c22";
0166 reg = <0>;
0167 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
0168 reset-assert-us = <10000>;
0169 qca,disable-smarteee;
0170 vddio-supply = <&vddio>;
0171
0172 vddio: vddio-regulator {
0173 regulator-min-microvolt = <1800000>;
0174 regulator-max-microvolt = <1800000>;
0175 };
0176 };
0177 };
0178 };
0179
0180 &i2c1 {
0181 clock-frequency = <400000>;
0182 pinctrl-names = "default";
0183 pinctrl-0 = <&pinctrl_i2c1>;
0184 status = "okay";
0185
0186 pmic@4b {
0187 compatible = "rohm,bd71847";
0188 reg = <0x4b>;
0189 pinctrl-names = "default";
0190 pinctrl-0 = <&pinctrl_pmic>;
0191 interrupt-parent = <&gpio1>;
0192 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
0193 rohm,reset-snvs-powered;
0194
0195 #clock-cells = <0>;
0196 clocks = <&osc_32k 0>;
0197 clock-output-names = "clk-32k-out";
0198
0199 regulators {
0200 buck1_reg: BUCK1 {
0201 regulator-name = "buck1";
0202 regulator-min-microvolt = <700000>;
0203 regulator-max-microvolt = <1300000>;
0204 regulator-boot-on;
0205 regulator-always-on;
0206 regulator-ramp-delay = <1250>;
0207 };
0208
0209 buck2_reg: BUCK2 {
0210 regulator-name = "buck2";
0211 regulator-min-microvolt = <700000>;
0212 regulator-max-microvolt = <1300000>;
0213 regulator-boot-on;
0214 regulator-always-on;
0215 regulator-ramp-delay = <1250>;
0216 rohm,dvs-run-voltage = <1000000>;
0217 rohm,dvs-idle-voltage = <900000>;
0218 };
0219
0220 buck3_reg: BUCK3 {
0221 // BUCK5 in datasheet
0222 regulator-name = "buck3";
0223 regulator-min-microvolt = <700000>;
0224 regulator-max-microvolt = <1350000>;
0225 regulator-boot-on;
0226 regulator-always-on;
0227 };
0228
0229 buck4_reg: BUCK4 {
0230 // BUCK6 in datasheet
0231 regulator-name = "buck4";
0232 regulator-min-microvolt = <3000000>;
0233 regulator-max-microvolt = <3300000>;
0234 regulator-boot-on;
0235 regulator-always-on;
0236 };
0237
0238 buck5_reg: BUCK5 {
0239 // BUCK7 in datasheet
0240 regulator-name = "buck5";
0241 regulator-min-microvolt = <1605000>;
0242 regulator-max-microvolt = <1995000>;
0243 regulator-boot-on;
0244 regulator-always-on;
0245 };
0246
0247 buck6_reg: BUCK6 {
0248 // BUCK8 in datasheet
0249 regulator-name = "buck6";
0250 regulator-min-microvolt = <800000>;
0251 regulator-max-microvolt = <1400000>;
0252 regulator-boot-on;
0253 regulator-always-on;
0254 };
0255
0256 ldo1_reg: LDO1 {
0257 regulator-name = "ldo1";
0258 regulator-min-microvolt = <1600000>;
0259 regulator-max-microvolt = <3300000>;
0260 regulator-boot-on;
0261 regulator-always-on;
0262 };
0263
0264 ldo2_reg: LDO2 {
0265 regulator-name = "ldo2";
0266 regulator-min-microvolt = <800000>;
0267 regulator-max-microvolt = <900000>;
0268 regulator-boot-on;
0269 regulator-always-on;
0270 };
0271
0272 ldo3_reg: LDO3 {
0273 regulator-name = "ldo3";
0274 regulator-min-microvolt = <1800000>;
0275 regulator-max-microvolt = <3300000>;
0276 regulator-boot-on;
0277 regulator-always-on;
0278 };
0279
0280 ldo4_reg: LDO4 {
0281 regulator-name = "ldo4";
0282 regulator-min-microvolt = <900000>;
0283 regulator-max-microvolt = <1800000>;
0284 regulator-boot-on;
0285 regulator-always-on;
0286 };
0287
0288 ldo6_reg: LDO6 {
0289 regulator-name = "ldo6";
0290 regulator-min-microvolt = <900000>;
0291 regulator-max-microvolt = <1800000>;
0292 regulator-boot-on;
0293 regulator-always-on;
0294 };
0295 };
0296 };
0297 };
0298
0299 &i2c2 {
0300 clock-frequency = <400000>;
0301 pinctrl-names = "default";
0302 pinctrl-0 = <&pinctrl_i2c2>;
0303 status = "okay";
0304
0305 ptn5110: tcpc@50 {
0306 compatible = "nxp,ptn5110";
0307 pinctrl-names = "default";
0308 pinctrl-0 = <&pinctrl_typec1>;
0309 reg = <0x50>;
0310 interrupt-parent = <&gpio2>;
0311 interrupts = <11 8>;
0312 status = "okay";
0313
0314 port {
0315 typec1_dr_sw: endpoint {
0316 remote-endpoint = <&usb1_drd_sw>;
0317 };
0318 };
0319
0320 typec1_con: connector {
0321 compatible = "usb-c-connector";
0322 label = "USB-C";
0323 power-role = "dual";
0324 data-role = "dual";
0325 try-power-role = "sink";
0326 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
0327 sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
0328 PDO_VAR(5000, 20000, 3000)>;
0329 op-sink-microwatt = <15000000>;
0330 self-powered;
0331 };
0332 };
0333 };
0334
0335 &i2c3 {
0336 clock-frequency = <400000>;
0337 pinctrl-names = "default";
0338 pinctrl-0 = <&pinctrl_i2c3>;
0339 status = "okay";
0340
0341 pca6416: gpio@20 {
0342 compatible = "ti,tca6416";
0343 reg = <0x20>;
0344 gpio-controller;
0345 #gpio-cells = <2>;
0346 };
0347 };
0348
0349 &pcie_phy {
0350 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
0351 fsl,tx-deemph-gen1 = <0x2d>;
0352 fsl,tx-deemph-gen2 = <0xf>;
0353 clocks = <&pcie0_refclk>;
0354 status = "okay";
0355 };
0356
0357 &pcie0 {
0358 pinctrl-names = "default";
0359 pinctrl-0 = <&pinctrl_pcie0>;
0360 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
0361 clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
0362 <&pcie0_refclk>;
0363 clock-names = "pcie", "pcie_aux", "pcie_bus";
0364 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
0365 <&clk IMX8MM_CLK_PCIE1_CTRL>;
0366 assigned-clock-rates = <10000000>, <250000000>;
0367 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
0368 <&clk IMX8MM_SYS_PLL2_250M>;
0369 vpcie-supply = <®_pcie0>;
0370 status = "okay";
0371 };
0372
0373 &sai2 {
0374 #sound-dai-cells = <0>;
0375 pinctrl-names = "default";
0376 pinctrl-0 = <&pinctrl_sai2>;
0377 assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
0378 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
0379 assigned-clock-rates = <24576000>;
0380 status = "okay";
0381 };
0382
0383 &sai3 {
0384 pinctrl-names = "default";
0385 pinctrl-0 = <&pinctrl_sai3>;
0386 assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
0387 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
0388 assigned-clock-rates = <24576000>;
0389 status = "okay";
0390 };
0391
0392 &snvs_pwrkey {
0393 status = "okay";
0394 };
0395
0396 &uart2 { /* console */
0397 pinctrl-names = "default";
0398 pinctrl-0 = <&pinctrl_uart2>;
0399 status = "okay";
0400 };
0401
0402 &usbotg1 {
0403 dr_mode = "otg";
0404 hnp-disable;
0405 srp-disable;
0406 adp-disable;
0407 usb-role-switch;
0408 disable-over-current;
0409 samsung,picophy-pre-emp-curr-control = <3>;
0410 samsung,picophy-dc-vol-level-adjust = <7>;
0411 status = "okay";
0412
0413 port {
0414 usb1_drd_sw: endpoint {
0415 remote-endpoint = <&typec1_dr_sw>;
0416 };
0417 };
0418 };
0419
0420 &usdhc2 {
0421 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
0422 assigned-clock-rates = <200000000>;
0423 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0424 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
0425 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
0426 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
0427 cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
0428 bus-width = <4>;
0429 vmmc-supply = <®_usdhc2_vmmc>;
0430 status = "okay";
0431 };
0432
0433 &wdog1 {
0434 pinctrl-names = "default";
0435 pinctrl-0 = <&pinctrl_wdog>;
0436 fsl,ext-reset-output;
0437 status = "okay";
0438 };
0439
0440 &pwm1 {
0441 pinctrl-names = "default";
0442 pinctrl-0 = <&pinctrl_backlight>;
0443 status = "okay";
0444 };
0445
0446 &iomuxc {
0447 pinctrl_fec1: fec1grp {
0448 fsl,pins = <
0449 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
0450 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
0451 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
0452 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
0453 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
0454 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
0455 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
0456 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
0457 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
0458 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
0459 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
0460 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
0461 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
0462 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
0463 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
0464 >;
0465 };
0466
0467 pinctrl_gpio_led: gpioledgrp {
0468 fsl,pins = <
0469 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
0470 >;
0471 };
0472
0473 pinctrl_ir: irgrp {
0474 fsl,pins = <
0475 MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
0476 >;
0477 };
0478
0479 pinctrl_gpio_wlf: gpiowlfgrp {
0480 fsl,pins = <
0481 MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
0482 >;
0483 };
0484
0485 pinctrl_i2c1: i2c1grp {
0486 fsl,pins = <
0487 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
0488 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
0489 >;
0490 };
0491
0492 pinctrl_i2c2: i2c2grp {
0493 fsl,pins = <
0494 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
0495 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
0496 >;
0497 };
0498
0499 pinctrl_i2c3: i2c3grp {
0500 fsl,pins = <
0501 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
0502 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
0503 >;
0504 };
0505
0506 pinctrl_pcie0: pcie0grp {
0507 fsl,pins = <
0508 MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x61
0509 MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x41
0510 >;
0511 };
0512
0513 pinctrl_pcie0_reg: pcie0reggrp {
0514 fsl,pins = <
0515 MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
0516 >;
0517 };
0518
0519 pinctrl_pmic: pmicirqgrp {
0520 fsl,pins = <
0521 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
0522 >;
0523 };
0524
0525 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
0526 fsl,pins = <
0527 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
0528 >;
0529 };
0530
0531 pinctrl_sai2: sai2grp {
0532 fsl,pins = <
0533 MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
0534 MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
0535 MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
0536 MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
0537 >;
0538 };
0539
0540 pinctrl_sai3: sai3grp {
0541 fsl,pins = <
0542 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
0543 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
0544 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
0545 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
0546 >;
0547 };
0548
0549 pinctrl_typec1: typec1grp {
0550 fsl,pins = <
0551 MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
0552 >;
0553 };
0554
0555 pinctrl_uart2: uart2grp {
0556 fsl,pins = <
0557 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
0558 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
0559 >;
0560 };
0561
0562 pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
0563 fsl,pins = <
0564 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
0565 >;
0566 };
0567
0568 pinctrl_usdhc2: usdhc2grp {
0569 fsl,pins = <
0570 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
0571 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
0572 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
0573 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
0574 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
0575 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
0576 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0577 >;
0578 };
0579
0580 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
0581 fsl,pins = <
0582 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
0583 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
0584 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
0585 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
0586 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
0587 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
0588 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0589 >;
0590 };
0591
0592 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
0593 fsl,pins = <
0594 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
0595 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
0596 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
0597 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
0598 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
0599 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
0600 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
0601 >;
0602 };
0603
0604 pinctrl_wdog: wdoggrp {
0605 fsl,pins = <
0606 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
0607 >;
0608 };
0609
0610 pinctrl_backlight: backlightgrp {
0611 fsl,pins = <
0612 MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06
0613 >;
0614 };
0615 };
