0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 //
0003 // Device Tree file for LX2160A BLUEBOX3
0004 //
0005 // Copyright 2020-2021 NXP
0006
0007 /dts-v1/;
0008
0009 #include "fsl-lx2160a.dtsi"
0010
0011 / {
0012 model = "NXP Layerscape LX2160ABLUEBOX3";
0013 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
0014
0015 aliases {
0016 crypto = &crypto;
0017 mmc0 = &esdhc0;
0018 mmc1 = &esdhc1;
0019 serial0 = &uart0;
0020 };
0021
0022 chosen {
0023 stdout-path = "serial0:115200n8";
0024 };
0025
0026 sb_3v3: regulator-sb3v3 {
0027 compatible = "regulator-fixed";
0028 regulator-name = "MC34717-3.3VSB";
0029 regulator-min-microvolt = <3300000>;
0030 regulator-max-microvolt = <3300000>;
0031 regulator-boot-on;
0032 regulator-always-on;
0033 };
0034 };
0035
0036 &can0 {
0037 status = "okay";
0038
0039 can-transceiver {
0040 max-bitrate = <5000000>;
0041 };
0042 };
0043
0044 &can1 {
0045 status = "okay";
0046
0047 can-transceiver {
0048 max-bitrate = <5000000>;
0049 };
0050 };
0051
0052 &crypto {
0053 status = "okay";
0054 };
0055
0056 &dpmac5 {
0057 phy-handle = <&aqr113c_phy1>;
0058 phy-mode = "usxgmii";
0059 managed = "in-band-status";
0060 };
0061
0062 &dpmac6 {
0063 phy-handle = <&aqr113c_phy2>;
0064 phy-mode = "usxgmii";
0065 managed = "in-band-status";
0066 };
0067
0068 &dpmac9 {
0069 phy-handle = <&aqr113c_phy3>;
0070 phy-mode = "usxgmii";
0071 managed = "in-band-status";
0072 };
0073
0074 &dpmac10 {
0075 phy-handle = <&aqr113c_phy4>;
0076 phy-mode = "usxgmii";
0077 managed = "in-band-status";
0078 };
0079
0080 &dpmac17 {
0081 phy-mode = "rgmii";
0082 status = "okay";
0083
0084 fixed-link {
0085 speed = <1000>;
0086 full-duplex;
0087 };
0088 };
0089
0090 &dpmac18 {
0091 phy-mode = "rgmii";
0092 status = "okay";
0093
0094 fixed-link {
0095 speed = <1000>;
0096 full-duplex;
0097 };
0098 };
0099
0100 &emdio1 {
0101 status = "okay";
0102
0103 aqr113c_phy2: ethernet-phy@0 {
0104 compatible = "ethernet-phy-ieee802.3-c45";
0105 reg = <0x0>;
0106 /* IRQ_10G_PHY2 */
0107 interrupts-extended = <&extirq 3 IRQ_TYPE_LEVEL_LOW>;
0108 };
0109
0110 aqr113c_phy1: ethernet-phy@8 {
0111 compatible = "ethernet-phy-ieee802.3-c45";
0112 reg = <0x8>;
0113 /* IRQ_10G_PHY1 */
0114 interrupts-extended = <&extirq 2 IRQ_TYPE_LEVEL_LOW>;
0115 };
0116
0117 sw1_mii3_phy: ethernet-phy@5 {
0118 /* AR8035 */
0119 compatible = "ethernet-phy-id004d.d072";
0120 reg = <0x5>;
0121 interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
0122 };
0123
0124 sw2_mii3_phy: ethernet-phy@6 {
0125 /* AR8035 */
0126 compatible = "ethernet-phy-id004d.d072";
0127 reg = <0x6>;
0128 interrupts-extended = <&extirq 7 IRQ_TYPE_LEVEL_LOW>;
0129 };
0130 };
0131
0132 &emdio2 {
0133 status = "okay";
0134
0135 aqr113c_phy4: ethernet-phy@0 {
0136 compatible = "ethernet-phy-ieee802.3-c45";
0137 reg = <0x0>;
0138 /* IRQ_10G_PHY4 */
0139 interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
0140 };
0141
0142 aqr113c_phy3: ethernet-phy@8 {
0143 compatible = "ethernet-phy-ieee802.3-c45";
0144 reg = <0x8>;
0145 /* IRQ_10G_PHY3 */
0146 interrupts-extended = <&extirq 4 IRQ_TYPE_LEVEL_LOW>;
0147 };
0148 };
0149
0150 &esdhc0 {
0151 sd-uhs-sdr104;
0152 sd-uhs-sdr50;
0153 sd-uhs-sdr25;
0154 sd-uhs-sdr12;
0155 status = "okay";
0156 };
0157
0158 &esdhc1 {
0159 mmc-hs200-1_8v;
0160 mmc-hs400-1_8v;
0161 bus-width = <8>;
0162 status = "okay";
0163 };
0164
0165 &fspi {
0166 status = "okay";
0167
0168 mt35xu512aba0: flash@0 {
0169 compatible = "jedec,spi-nor";
0170 #address-cells = <1>;
0171 #size-cells = <1>;
0172 reg = <0>;
0173 m25p,fast-read;
0174 spi-max-frequency = <50000000>;
0175 spi-rx-bus-width = <8>;
0176 spi-tx-bus-width = <8>;
0177 };
0178
0179 mt35xu512aba1: flash@1 {
0180 compatible = "jedec,spi-nor";
0181 #address-cells = <1>;
0182 #size-cells = <1>;
0183 reg = <1>;
0184 m25p,fast-read;
0185 spi-max-frequency = <50000000>;
0186 spi-rx-bus-width = <8>;
0187 spi-tx-bus-width = <8>;
0188 };
0189 };
0190
0191 &i2c0 {
0192 status = "okay";
0193
0194 i2c-mux@77 {
0195 compatible = "nxp,pca9547";
0196 reg = <0x77>;
0197 #address-cells = <1>;
0198 #size-cells = <0>;
0199
0200 i2c@2 {
0201 #address-cells = <1>;
0202 #size-cells = <0>;
0203 reg = <0x2>;
0204
0205 power-monitor@40 {
0206 compatible = "ti,ina220";
0207 reg = <0x40>;
0208 shunt-resistor = <500>;
0209 };
0210 };
0211
0212 i2c@3 {
0213 #address-cells = <1>;
0214 #size-cells = <0>;
0215 reg = <0x3>;
0216
0217 temp2: temperature-sensor@48 {
0218 compatible = "nxp,sa56004";
0219 reg = <0x48>;
0220 vcc-supply = <&sb_3v3>;
0221 #thermal-sensor-cells = <1>;
0222 };
0223
0224 temp1: temperature-sensor@4c {
0225 compatible = "nxp,sa56004";
0226 reg = <0x4c>;
0227 vcc-supply = <&sb_3v3>;
0228 #thermal-sensor-cells = <1>;
0229 };
0230 };
0231
0232 i2c@4 {
0233 #address-cells = <1>;
0234 #size-cells = <0>;
0235 reg = <0x4>;
0236
0237 rtc@51 {
0238 compatible = "nxp,pcf2129";
0239 reg = <0x51>;
0240 interrupts-extended = <&extirq 11 IRQ_TYPE_LEVEL_LOW>;
0241 };
0242 };
0243
0244 i2c@7 {
0245 #address-cells = <1>;
0246 #size-cells = <0>;
0247 reg = <0x7>;
0248
0249 i2c-mux@75 {
0250 compatible = "nxp,pca9547";
0251 reg = <0x75>;
0252 #address-cells = <1>;
0253 #size-cells = <0>;
0254
0255 i2c@0 {
0256 #address-cells = <1>;
0257 #size-cells = <0>;
0258 reg = <0x0>;
0259
0260 spi_bridge: spi@28 {
0261 compatible = "nxp,sc18is602b";
0262 reg = <0x28>;
0263 #address-cells = <1>;
0264 #size-cells = <0>;
0265 };
0266 };
0267 };
0268 };
0269 };
0270 };
0271
0272 &i2c5 {
0273 status = "okay";
0274
0275 i2c-mux@77 {
0276 compatible = "nxp,pca9846";
0277 reg = <0x77>;
0278 #address-cells = <1>;
0279 #size-cells = <0>;
0280
0281 i2c@1 {
0282 #address-cells = <1>;
0283 #size-cells = <0>;
0284 reg = <0x1>;
0285
0286 /* The I2C multiplexer and temperature sensors are on
0287 * the T6 riser card.
0288 */
0289 i2c-mux@70 {
0290 compatible = "nxp,pca9548";
0291 reg = <0x70>;
0292 #address-cells = <1>;
0293 #size-cells = <0>;
0294
0295 i2c@6 {
0296 #address-cells = <1>;
0297 #size-cells = <0>;
0298 reg = <0x6>;
0299
0300 q12: temperature-sensor@4c {
0301 compatible = "nxp,sa56004";
0302 reg = <0x4c>;
0303 vcc-supply = <&sb_3v3>;
0304 #thermal-sensor-cells = <1>;
0305 };
0306 };
0307
0308 i2c@7 {
0309 #address-cells = <1>;
0310 #size-cells = <0>;
0311 reg = <0x7>;
0312
0313 q11: temperature-sensor@4c {
0314 compatible = "nxp,sa56004";
0315 reg = <0x4c>;
0316 vcc-supply = <&sb_3v3>;
0317 #thermal-sensor-cells = <1>;
0318 };
0319
0320 q13: temperature-sensor@48 {
0321 compatible = "nxp,sa56004";
0322 reg = <0x48>;
0323 vcc-supply = <&sb_3v3>;
0324 #thermal-sensor-cells = <1>;
0325 };
0326
0327 q14: temperature-sensor@4a {
0328 compatible = "nxp,sa56004";
0329 reg = <0x4a>;
0330 vcc-supply = <&sb_3v3>;
0331 #thermal-sensor-cells = <1>;
0332 };
0333 };
0334 };
0335 };
0336 };
0337 };
0338
0339 &pcs_mdio5 {
0340 status = "okay";
0341 };
0342
0343 &pcs_mdio6 {
0344 status = "okay";
0345 };
0346
0347 &pcs_mdio9 {
0348 status = "okay";
0349 };
0350
0351 &pcs_mdio10 {
0352 status = "okay";
0353 };
0354
0355 &spi_bridge {
0356 sw1: ethernet-switch@0 {
0357 compatible = "nxp,sja1110a";
0358 reg = <0>;
0359 spi-max-frequency = <4000000>;
0360 spi-cpol;
0361 dsa,member = <0 0>;
0362
0363 ethernet-ports {
0364 #address-cells = <1>;
0365 #size-cells = <0>;
0366
0367 /* Microcontroller port */
0368 port@0 {
0369 reg = <0>;
0370 status = "disabled";
0371 };
0372
0373 /* SW1_P1 */
0374 port@1 {
0375 reg = <1>;
0376 label = "con_2x20";
0377 phy-mode = "sgmii";
0378
0379 fixed-link {
0380 speed = <1000>;
0381 full-duplex;
0382 };
0383 };
0384
0385 port@2 {
0386 reg = <2>;
0387 ethernet = <&dpmac17>;
0388 phy-mode = "rgmii-id";
0389 rx-internal-delay-ps = <2000>;
0390 tx-internal-delay-ps = <2000>;
0391
0392 fixed-link {
0393 speed = <1000>;
0394 full-duplex;
0395 };
0396 };
0397
0398 port@3 {
0399 reg = <3>;
0400 label = "1ge_p1";
0401 phy-mode = "rgmii-id";
0402 phy-handle = <&sw1_mii3_phy>;
0403 };
0404
0405 sw1p4: port@4 {
0406 reg = <4>;
0407 link = <&sw2p1>;
0408 phy-mode = "sgmii";
0409
0410 fixed-link {
0411 speed = <1000>;
0412 full-duplex;
0413 };
0414 };
0415
0416 port@5 {
0417 reg = <5>;
0418 label = "trx1";
0419 phy-mode = "internal";
0420 phy-handle = <&sw1_port5_base_t1_phy>;
0421 };
0422
0423 port@6 {
0424 reg = <6>;
0425 label = "trx2";
0426 phy-mode = "internal";
0427 phy-handle = <&sw1_port6_base_t1_phy>;
0428 };
0429
0430 port@7 {
0431 reg = <7>;
0432 label = "trx3";
0433 phy-mode = "internal";
0434 phy-handle = <&sw1_port7_base_t1_phy>;
0435 };
0436
0437 port@8 {
0438 reg = <8>;
0439 label = "trx4";
0440 phy-mode = "internal";
0441 phy-handle = <&sw1_port8_base_t1_phy>;
0442 };
0443
0444 port@9 {
0445 reg = <9>;
0446 label = "trx5";
0447 phy-mode = "internal";
0448 phy-handle = <&sw1_port9_base_t1_phy>;
0449 };
0450
0451 port@a {
0452 reg = <10>;
0453 label = "trx6";
0454 phy-mode = "internal";
0455 phy-handle = <&sw1_port10_base_t1_phy>;
0456 };
0457 };
0458
0459 mdios {
0460 #address-cells = <1>;
0461 #size-cells = <0>;
0462
0463 mdio@0 {
0464 compatible = "nxp,sja1110-base-t1-mdio";
0465 #address-cells = <1>;
0466 #size-cells = <0>;
0467 reg = <0>;
0468
0469 sw1_port5_base_t1_phy: ethernet-phy@1 {
0470 compatible = "ethernet-phy-ieee802.3-c45";
0471 reg = <0x1>;
0472 };
0473
0474 sw1_port6_base_t1_phy: ethernet-phy@2 {
0475 compatible = "ethernet-phy-ieee802.3-c45";
0476 reg = <0x2>;
0477 };
0478
0479 sw1_port7_base_t1_phy: ethernet-phy@3 {
0480 compatible = "ethernet-phy-ieee802.3-c45";
0481 reg = <0x3>;
0482 };
0483
0484 sw1_port8_base_t1_phy: ethernet-phy@4 {
0485 compatible = "ethernet-phy-ieee802.3-c45";
0486 reg = <0x4>;
0487 };
0488
0489 sw1_port9_base_t1_phy: ethernet-phy@5 {
0490 compatible = "ethernet-phy-ieee802.3-c45";
0491 reg = <0x5>;
0492 };
0493
0494 sw1_port10_base_t1_phy: ethernet-phy@6 {
0495 compatible = "ethernet-phy-ieee802.3-c45";
0496 reg = <0x6>;
0497 };
0498 };
0499 };
0500 };
0501
0502 sw2: ethernet-switch@2 {
0503 compatible = "nxp,sja1110a";
0504 reg = <2>;
0505 spi-max-frequency = <4000000>;
0506 spi-cpol;
0507 dsa,member = <0 1>;
0508
0509 ethernet-ports {
0510 #address-cells = <1>;
0511 #size-cells = <0>;
0512
0513 /* Microcontroller port */
0514 port@0 {
0515 reg = <0>;
0516 status = "disabled";
0517 };
0518
0519 sw2p1: port@1 {
0520 reg = <1>;
0521 link = <&sw1p4>;
0522 phy-mode = "sgmii";
0523
0524 fixed-link {
0525 speed = <1000>;
0526 full-duplex;
0527 };
0528 };
0529
0530 port@2 {
0531 reg = <2>;
0532 ethernet = <&dpmac18>;
0533 phy-mode = "rgmii-id";
0534 rx-internal-delay-ps = <2000>;
0535 tx-internal-delay-ps = <2000>;
0536
0537 fixed-link {
0538 speed = <1000>;
0539 full-duplex;
0540 };
0541 };
0542
0543 port@3 {
0544 reg = <3>;
0545 label = "1ge_p2";
0546 phy-mode = "rgmii-id";
0547 phy-handle = <&sw2_mii3_phy>;
0548 };
0549
0550 port@4 {
0551 reg = <4>;
0552 label = "to_sw3";
0553 phy-mode = "2500base-x";
0554
0555 fixed-link {
0556 speed = <2500>;
0557 full-duplex;
0558 };
0559 };
0560
0561 port@5 {
0562 reg = <5>;
0563 label = "trx7";
0564 phy-mode = "internal";
0565 phy-handle = <&sw2_port5_base_t1_phy>;
0566 };
0567
0568 port@6 {
0569 reg = <6>;
0570 label = "trx8";
0571 phy-mode = "internal";
0572 phy-handle = <&sw2_port6_base_t1_phy>;
0573 };
0574
0575 port@7 {
0576 reg = <7>;
0577 label = "trx9";
0578 phy-mode = "internal";
0579 phy-handle = <&sw2_port7_base_t1_phy>;
0580 };
0581
0582 port@8 {
0583 reg = <8>;
0584 label = "trx10";
0585 phy-mode = "internal";
0586 phy-handle = <&sw2_port8_base_t1_phy>;
0587 };
0588
0589 port@9 {
0590 reg = <9>;
0591 label = "trx11";
0592 phy-mode = "internal";
0593 phy-handle = <&sw2_port9_base_t1_phy>;
0594 };
0595
0596 port@a {
0597 reg = <10>;
0598 label = "trx12";
0599 phy-mode = "internal";
0600 phy-handle = <&sw2_port10_base_t1_phy>;
0601 };
0602 };
0603
0604 mdios {
0605 #address-cells = <1>;
0606 #size-cells = <0>;
0607
0608 mdio@0 {
0609 compatible = "nxp,sja1110-base-t1-mdio";
0610 #address-cells = <1>;
0611 #size-cells = <0>;
0612 reg = <0>;
0613
0614 sw2_port5_base_t1_phy: ethernet-phy@1 {
0615 compatible = "ethernet-phy-ieee802.3-c45";
0616 reg = <0x1>;
0617 };
0618
0619 sw2_port6_base_t1_phy: ethernet-phy@2 {
0620 compatible = "ethernet-phy-ieee802.3-c45";
0621 reg = <0x2>;
0622 };
0623
0624 sw2_port7_base_t1_phy: ethernet-phy@3 {
0625 compatible = "ethernet-phy-ieee802.3-c45";
0626 reg = <0x3>;
0627 };
0628
0629 sw2_port8_base_t1_phy: ethernet-phy@4 {
0630 compatible = "ethernet-phy-ieee802.3-c45";
0631 reg = <0x4>;
0632 };
0633
0634 sw2_port9_base_t1_phy: ethernet-phy@5 {
0635 compatible = "ethernet-phy-ieee802.3-c45";
0636 reg = <0x5>;
0637 };
0638
0639 sw2_port10_base_t1_phy: ethernet-phy@6 {
0640 compatible = "ethernet-phy-ieee802.3-c45";
0641 reg = <0x6>;
0642 };
0643 };
0644 };
0645 };
0646 };
0647
0648 &uart0 {
0649 status = "okay";
0650 };
0651
0652 &uart1 {
0653 status = "okay";
0654 };
0655
0656 &usb0 {
0657 status = "okay";
0658 };
0659
0660 &usb1 {
0661 status = "okay";
0662 };
