0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree file for Freescale LS2080A RDB Board.
0004 *
0005 * Copyright 2016 Freescale Semiconductor, Inc.
0006 * Copyright 2017-2020 NXP
0007 *
0008 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
0009 *
0010 */
0011
0012 &esdhc {
0013 status = "okay";
0014 };
0015
0016 &ifc {
0017 status = "okay";
0018 #address-cells = <2>;
0019 #size-cells = <1>;
0020 ranges = <0x0 0x0 0x5 0x80000000 0x08000000
0021 0x2 0x0 0x5 0x30000000 0x00010000
0022 0x3 0x0 0x5 0x20000000 0x00010000>;
0023
0024 nor@0,0 {
0025 #address-cells = <1>;
0026 #size-cells = <1>;
0027 compatible = "cfi-flash";
0028 reg = <0x0 0x0 0x8000000>;
0029 bank-width = <2>;
0030 device-width = <1>;
0031 };
0032
0033 nand@2,0 {
0034 compatible = "fsl,ifc-nand";
0035 reg = <0x2 0x0 0x10000>;
0036 };
0037
0038 cpld@3,0 {
0039 reg = <0x3 0x0 0x10000>;
0040 compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
0041 };
0042
0043 };
0044
0045 &i2c0 {
0046 status = "okay";
0047 pca9547@75 {
0048 compatible = "nxp,pca9547";
0049 reg = <0x75>;
0050 #address-cells = <1>;
0051 #size-cells = <0>;
0052 i2c@1 {
0053 #address-cells = <1>;
0054 #size-cells = <0>;
0055 reg = <0x01>;
0056 rtc@68 {
0057 compatible = "dallas,ds3232";
0058 reg = <0x68>;
0059 /* IRQ_RTC_B -> IRQ06, active low */
0060 interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>;
0061 };
0062 };
0063
0064 i2c@2 {
0065 #address-cells = <1>;
0066 #size-cells = <0>;
0067 reg = <0x02>;
0068
0069 ina220@40 {
0070 compatible = "ti,ina220";
0071 reg = <0x40>;
0072 shunt-resistor = <500>;
0073 };
0074 };
0075
0076 i2c@3 {
0077 #address-cells = <1>;
0078 #size-cells = <0>;
0079 reg = <0x3>;
0080
0081 adt7481@4c {
0082 compatible = "adi,adt7461";
0083 reg = <0x4c>;
0084 };
0085 };
0086 };
0087 };
0088
0089 &i2c1 {
0090 status = "disabled";
0091 };
0092
0093 &i2c2 {
0094 status = "disabled";
0095 };
0096
0097 &i2c3 {
0098 status = "disabled";
0099 };
0100
0101 &dspi {
0102 status = "okay";
0103 dflash0: flash@0 {
0104 #address-cells = <1>;
0105 #size-cells = <1>;
0106 compatible = "st,m25p80";
0107 spi-max-frequency = <3000000>;
0108 reg = <0>;
0109 };
0110 };
0111
0112 &qspi {
0113 status = "okay";
0114
0115 s25fs512s0: flash@0 {
0116 #address-cells = <1>;
0117 #size-cells = <1>;
0118 compatible = "jedec,spi-nor";
0119 spi-max-frequency = <50000000>;
0120 reg = <0>;
0121 };
0122 };
0123
0124 &sata0 {
0125 status = "okay";
0126 };
0127
0128 &sata1 {
0129 status = "okay";
0130 };
0131
0132 &usb0 {
0133 status = "okay";
0134 };
0135
0136 &usb1 {
0137 status = "okay";
0138 };