0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree file for Freescale LS2080A QDS Board.
0004 *
0005 * Copyright 2016 Freescale Semiconductor, Inc.
0006 * Copyright 2017 NXP
0007 *
0008 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
0009 *
0010 */
0011
0012 &esdhc {
0013 mmc-hs200-1_8v;
0014 status = "okay";
0015 };
0016
0017 &ifc {
0018 status = "okay";
0019 #address-cells = <2>;
0020 #size-cells = <1>;
0021 ranges = <0x0 0x0 0x5 0x80000000 0x08000000
0022 0x2 0x0 0x5 0x30000000 0x00010000
0023 0x3 0x0 0x5 0x20000000 0x00010000>;
0024
0025 nor@0,0 {
0026 #address-cells = <1>;
0027 #size-cells = <1>;
0028 compatible = "cfi-flash";
0029 reg = <0x0 0x0 0x8000000>;
0030 bank-width = <2>;
0031 device-width = <1>;
0032 };
0033
0034 nand@2,0 {
0035 compatible = "fsl,ifc-nand";
0036 reg = <0x2 0x0 0x10000>;
0037 };
0038
0039 cpld@3,0 {
0040 reg = <0x3 0x0 0x10000>;
0041 compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
0042 };
0043 };
0044
0045 &i2c0 {
0046 status = "okay";
0047 pca9547@77 {
0048 compatible = "nxp,pca9547";
0049 reg = <0x77>;
0050 #address-cells = <1>;
0051 #size-cells = <0>;
0052 i2c@0 {
0053 #address-cells = <1>;
0054 #size-cells = <0>;
0055 reg = <0x00>;
0056 rtc@68 {
0057 compatible = "dallas,ds3232";
0058 reg = <0x68>;
0059 };
0060 };
0061
0062 i2c@2 {
0063 #address-cells = <1>;
0064 #size-cells = <0>;
0065 reg = <0x02>;
0066
0067 ina220@40 {
0068 compatible = "ti,ina220";
0069 reg = <0x40>;
0070 shunt-resistor = <500>;
0071 };
0072
0073 ina220@41 {
0074 compatible = "ti,ina220";
0075 reg = <0x41>;
0076 shunt-resistor = <1000>;
0077 };
0078 };
0079
0080 i2c@3 {
0081 #address-cells = <1>;
0082 #size-cells = <0>;
0083 reg = <0x3>;
0084
0085 adt7481@4c {
0086 compatible = "adi,adt7461";
0087 reg = <0x4c>;
0088 };
0089 };
0090 };
0091 };
0092
0093 &i2c1 {
0094 status = "disabled";
0095 };
0096
0097 &i2c2 {
0098 status = "disabled";
0099 };
0100
0101 &i2c3 {
0102 status = "disabled";
0103 };
0104
0105 &dspi {
0106 status = "okay";
0107 dflash0: flash@0 {
0108 #address-cells = <1>;
0109 #size-cells = <1>;
0110 compatible = "st,m25p80";
0111 spi-max-frequency = <3000000>;
0112 reg = <0>;
0113 };
0114 dflash1: flash@1 {
0115 #address-cells = <1>;
0116 #size-cells = <1>;
0117 compatible = "st,m25p80";
0118 spi-max-frequency = <3000000>;
0119 reg = <1>;
0120 };
0121 dflash2: flash@2 {
0122 #address-cells = <1>;
0123 #size-cells = <1>;
0124 compatible = "st,m25p80";
0125 spi-max-frequency = <3000000>;
0126 reg = <2>;
0127 };
0128 };
0129
0130 &qspi {
0131 status = "okay";
0132 flash0: flash@0 {
0133 #address-cells = <1>;
0134 #size-cells = <1>;
0135 compatible = "st,m25p80";
0136 spi-max-frequency = <20000000>;
0137 spi-rx-bus-width = <4>;
0138 spi-tx-bus-width = <4>;
0139 reg = <0>;
0140 };
0141 flash2: flash@2 {
0142 #address-cells = <1>;
0143 #size-cells = <1>;
0144 compatible = "st,m25p80";
0145 spi-max-frequency = <20000000>;
0146 spi-rx-bus-width = <4>;
0147 spi-tx-bus-width = <4>;
0148 reg = <2>;
0149 };
0150 };
0151
0152 &sata0 {
0153 status = "okay";
0154 };
0155
0156 &sata1 {
0157 status = "okay";
0158 };
0159
0160 &usb0 {
0161 status = "okay";
0162 };
0163
0164 &usb1 {
0165 status = "okay";
0166 };
