0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree file for NXP LS1088A QDS Board.
0004 *
0005 * Copyright 2017 NXP
0006 *
0007 * Harninder Rai <harninder.rai@nxp.com>
0008 *
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "fsl-ls1088a.dtsi"
0014
0015 / {
0016 model = "LS1088A QDS Board";
0017 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
0018 };
0019
0020 &dspi {
0021 bus-num = <0>;
0022 status = "okay";
0023
0024 flash@0 {
0025 #address-cells = <1>;
0026 #size-cells = <1>;
0027 compatible = "jedec,spi-nor";
0028 reg = <0>;
0029 spi-max-frequency = <1000000>;
0030 };
0031
0032 flash@1 {
0033 #address-cells = <1>;
0034 #size-cells = <1>;
0035 compatible = "jedec,spi-nor";
0036 spi-cpol;
0037 spi-cpha;
0038 spi-max-frequency = <3500000>;
0039 reg = <1>;
0040 };
0041
0042 flash@2 {
0043 #address-cells = <1>;
0044 #size-cells = <1>;
0045 compatible = "jedec,spi-nor";
0046 spi-cpol;
0047 spi-cpha;
0048 spi-max-frequency = <3500000>;
0049 reg = <2>;
0050 };
0051 };
0052
0053 &i2c0 {
0054 status = "okay";
0055
0056 i2c-switch@77 {
0057 compatible = "nxp,pca9547";
0058 reg = <0x77>;
0059 #address-cells = <1>;
0060 #size-cells = <0>;
0061
0062 i2c@2 {
0063 #address-cells = <1>;
0064 #size-cells = <0>;
0065 reg = <0x2>;
0066
0067 ina220@40 {
0068 compatible = "ti,ina220";
0069 reg = <0x40>;
0070 shunt-resistor = <1000>;
0071 };
0072
0073 ina220@41 {
0074 compatible = "ti,ina220";
0075 reg = <0x41>;
0076 shunt-resistor = <1000>;
0077 };
0078 };
0079
0080 i2c@3 {
0081 #address-cells = <1>;
0082 #size-cells = <0>;
0083 reg = <0x3>;
0084
0085 temp-sensor@4c {
0086 compatible = "adi,adt7461a";
0087 reg = <0x4c>;
0088 };
0089
0090 rtc@51 {
0091 compatible = "nxp,pcf2129";
0092 reg = <0x51>;
0093 /* IRQ10_B */
0094 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
0095 };
0096
0097 eeprom@56 {
0098 compatible = "atmel,24c512";
0099 reg = <0x56>;
0100 };
0101
0102 eeprom@57 {
0103 compatible = "atmel,24c512";
0104 reg = <0x57>;
0105 };
0106 };
0107 };
0108 };
0109
0110 &ifc {
0111 ranges = <0 0 0x5 0x80000000 0x08000000
0112 2 0 0x5 0x30000000 0x00010000
0113 3 0 0x5 0x20000000 0x00010000>;
0114 status = "okay";
0115
0116 nor@0,0 {
0117 compatible = "cfi-flash";
0118 reg = <0x0 0x0 0x8000000>;
0119 bank-width = <2>;
0120 device-width = <1>;
0121 };
0122
0123 nand@2,0 {
0124 compatible = "fsl,ifc-nand";
0125 reg = <0x2 0x0 0x10000>;
0126 };
0127
0128 fpga: board-control@3,0 {
0129 compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
0130 reg = <0x3 0x0 0x0000100>;
0131 };
0132 };
0133
0134 &duart0 {
0135 status = "okay";
0136 };
0137
0138 &duart1 {
0139 status = "okay";
0140 };
0141
0142 &esdhc {
0143 status = "okay";
0144 };
0145
0146 &qspi {
0147 status = "okay";
0148
0149 s25fs512s0: flash@0 {
0150 compatible = "jedec,spi-nor";
0151 #address-cells = <1>;
0152 #size-cells = <1>;
0153 spi-max-frequency = <50000000>;
0154 spi-rx-bus-width = <4>;
0155 spi-tx-bus-width = <1>;
0156 reg = <0>;
0157 };
0158
0159 s25fs512s1: flash@1 {
0160 compatible = "jedec,spi-nor";
0161 #address-cells = <1>;
0162 #size-cells = <1>;
0163 spi-max-frequency = <50000000>;
0164 spi-rx-bus-width = <4>;
0165 spi-tx-bus-width = <1>;
0166 reg = <1>;
0167 };
0168 };
0169
0170 &sata {
0171 status = "okay";
0172 };
