0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
0004 *
0005 * Copyright 2016 Freescale Semiconductor, Inc.
0006 * Copyright 2019-2020 NXP
0007 *
0008 * Mingkai Hu <mingkai.hu@nxp.com>
0009 */
0010
0011 /dts-v1/;
0012
0013 #include "fsl-ls1046a.dtsi"
0014
0015 / {
0016 model = "LS1046A RDB Board";
0017 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
0018
0019 aliases {
0020 serial0 = &duart0;
0021 serial1 = &duart1;
0022 serial2 = &duart2;
0023 serial3 = &duart3;
0024 };
0025
0026 chosen {
0027 stdout-path = "serial0:115200n8";
0028 };
0029 };
0030
0031 &duart0 {
0032 status = "okay";
0033 };
0034
0035 &duart1 {
0036 status = "okay";
0037 };
0038
0039 &esdhc {
0040 mmc-hs200-1_8v;
0041 sd-uhs-sdr104;
0042 sd-uhs-sdr50;
0043 sd-uhs-sdr25;
0044 sd-uhs-sdr12;
0045 };
0046
0047 &i2c0 {
0048 status = "okay";
0049
0050 ina220@40 {
0051 compatible = "ti,ina220";
0052 reg = <0x40>;
0053 shunt-resistor = <1000>;
0054 };
0055
0056 temp-sensor@4c {
0057 compatible = "adi,adt7461";
0058 reg = <0x4c>;
0059 };
0060
0061 eeprom@52 {
0062 compatible = "onnn,cat24c05", "atmel,24c04";
0063 reg = <0x52>;
0064 };
0065 };
0066
0067 &i2c3 {
0068 status = "okay";
0069
0070 rtc@51 {
0071 compatible = "nxp,pcf2129";
0072 reg = <0x51>;
0073 /* IRQ_RTC_B -> IRQ05, active low */
0074 interrupts-extended = <&extirq 5 IRQ_TYPE_LEVEL_LOW>;
0075 };
0076 };
0077
0078 &ifc {
0079 #address-cells = <2>;
0080 #size-cells = <1>;
0081 /* NAND Flashe and CPLD on board */
0082 ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
0083 0x2 0x0 0x0 0x7fb00000 0x00000100>;
0084 status = "okay";
0085
0086 nand@0,0 {
0087 compatible = "fsl,ifc-nand";
0088 #address-cells = <1>;
0089 #size-cells = <1>;
0090 reg = <0x0 0x0 0x10000>;
0091 };
0092
0093 cpld: board-control@2,0 {
0094 compatible = "fsl,ls1046ardb-cpld";
0095 reg = <0x2 0x0 0x0000100>;
0096 };
0097 };
0098
0099 &qspi {
0100 status = "okay";
0101
0102 s25fs512s0: flash@0 {
0103 compatible = "jedec,spi-nor";
0104 #address-cells = <1>;
0105 #size-cells = <1>;
0106 spi-max-frequency = <50000000>;
0107 spi-rx-bus-width = <4>;
0108 spi-tx-bus-width = <1>;
0109 reg = <0>;
0110 };
0111
0112 s25fs512s1: flash@1 {
0113 compatible = "jedec,spi-nor";
0114 #address-cells = <1>;
0115 #size-cells = <1>;
0116 spi-max-frequency = <50000000>;
0117 spi-rx-bus-width = <4>;
0118 spi-tx-bus-width = <1>;
0119 reg = <1>;
0120 };
0121 };
0122
0123 &usb1 {
0124 dr_mode = "otg";
0125 };
0126
0127 #include "fsl-ls1046-post.dtsi"
0128
0129 &fman0 {
0130 ethernet@e4000 {
0131 phy-handle = <&rgmii_phy1>;
0132 phy-connection-type = "rgmii-id";
0133 };
0134
0135 ethernet@e6000 {
0136 phy-handle = <&rgmii_phy2>;
0137 phy-connection-type = "rgmii-id";
0138 };
0139
0140 ethernet@e8000 {
0141 phy-handle = <&sgmii_phy1>;
0142 phy-connection-type = "sgmii";
0143 };
0144
0145 ethernet@ea000 {
0146 phy-handle = <&sgmii_phy2>;
0147 phy-connection-type = "sgmii";
0148 };
0149
0150 ethernet@f0000 { /* 10GEC1 */
0151 phy-handle = <&aqr106_phy>;
0152 phy-connection-type = "xgmii";
0153 };
0154
0155 ethernet@f2000 { /* 10GEC2 */
0156 fixed-link = <0 1 1000 0 0>;
0157 phy-connection-type = "xgmii";
0158 };
0159
0160 mdio@fc000 {
0161 rgmii_phy1: ethernet-phy@1 {
0162 reg = <0x1>;
0163 };
0164
0165 rgmii_phy2: ethernet-phy@2 {
0166 reg = <0x2>;
0167 };
0168
0169 sgmii_phy1: ethernet-phy@3 {
0170 reg = <0x3>;
0171 };
0172
0173 sgmii_phy2: ethernet-phy@4 {
0174 reg = <0x4>;
0175 };
0176 };
0177
0178 mdio@fd000 {
0179 aqr106_phy: ethernet-phy@0 {
0180 compatible = "ethernet-phy-ieee802.3-c45";
0181 interrupts = <0 131 4>;
0182 reg = <0x0>;
0183 };
0184 };
0185 };
