0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Device Tree fragment for LS1028A QDS board, serdes 85bb
0004 *
0005 * Copyright 2019-2021 NXP
0006 *
0007 * Requires a LS1028A QDS board with lane B rework.
0008 * Requires a SCH-24801 card in slot 1 and a SCH-28021 card in slot 2.
0009 */
0010
0011 /dts-v1/;
0012 /plugin/;
0013
0014 &mdio_slot1 {
0015 #address-cells = <1>;
0016 #size-cells = <0>;
0017
0018 slot1_sgmii: ethernet-phy@1c {
0019 /* 1st port on VSC8234 */
0020 reg = <0x1c>;
0021 };
0022 };
0023
0024 &enetc_port0 {
0025 phy-handle = <&slot1_sgmii>;
0026 phy-mode = "sgmii";
0027 managed = "in-band-status";
0028 status = "okay";
0029 };
0030
0031 &mdio_slot2 {
0032 #address-cells = <1>;
0033 #size-cells = <0>;
0034
0035 /* 4 ports on VSC8514 */
0036 slot2_qsgmii0: ethernet-phy@8 {
0037 reg = <0x8>;
0038 };
0039
0040 slot2_qsgmii1: ethernet-phy@9 {
0041 reg = <0x9>;
0042 };
0043
0044 slot2_qsgmii2: ethernet-phy@a {
0045 reg = <0xa>;
0046 };
0047
0048 slot2_qsgmii3: ethernet-phy@b {
0049 reg = <0xb>;
0050 };
0051 };
0052
0053 &mscc_felix_ports {
0054 port@0 {
0055 status = "okay";
0056 phy-handle = <&slot2_qsgmii0>;
0057 phy-mode = "qsgmii";
0058 managed = "in-band-status";
0059 };
0060
0061 port@1 {
0062 status = "okay";
0063 phy-handle = <&slot2_qsgmii1>;
0064 phy-mode = "qsgmii";
0065 managed = "in-band-status";
0066 };
0067
0068 port@2 {
0069 status = "okay";
0070 phy-handle = <&slot2_qsgmii2>;
0071 phy-mode = "qsgmii";
0072 managed = "in-band-status";
0073 };
0074
0075 port@3 {
0076 status = "okay";
0077 phy-handle = <&slot2_qsgmii3>;
0078 phy-mode = "qsgmii";
0079 managed = "in-band-status";
0080 };
0081 };
0082
0083 &mscc_felix {
0084 status = "okay";
0085 };
