0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Samsung ExynosAutov9 SADK board device tree source
0004 *
0005 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
0006 *
0007 */
0008
0009 /dts-v1/;
0010 #include "exynosautov9.dtsi"
0011 #include <dt-bindings/gpio/gpio.h>
0012
0013 / {
0014 model = "Samsung ExynosAuto v9 SADK board";
0015 compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9";
0016
0017 #address-cells = <2>;
0018 #size-cells = <2>;
0019
0020 aliases {
0021 serial0 = &serial_0;
0022 };
0023
0024 chosen {
0025 stdout-path = &serial_0;
0026 };
0027
0028 memory@80000000 {
0029 device_type = "memory";
0030 reg = <0x0 0x80000000 0x0 0x77000000>,
0031 <0x8 0x80000000 0x1 0x7ba00000>,
0032 <0xa 0x00000000 0x2 0x00000000>;
0033 };
0034
0035 ufs_0_fixed_vcc_reg: regulator-0 {
0036 compatible = "regulator-fixed";
0037 regulator-name = "ufs-vcc";
0038 gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>;
0039 regulator-boot-on;
0040 enable-active-high;
0041 };
0042
0043 ufs_1_fixed_vcc_reg: regulator-1 {
0044 compatible = "regulator-fixed";
0045 regulator-name = "ufs-vcc";
0046 gpio = <&gpg2 2 GPIO_ACTIVE_HIGH>;
0047 regulator-boot-on;
0048 enable-active-high;
0049 };
0050 };
0051
0052 &serial_0 {
0053 pinctrl-0 = <&uart0_bus_dual>;
0054 status = "okay";
0055 };
0056
0057 &ufs_0_phy {
0058 status = "okay";
0059 };
0060
0061 &ufs_1_phy {
0062 status = "okay";
0063 };
0064
0065 &ufs_0 {
0066 status = "okay";
0067 vcc-supply = <&ufs_0_fixed_vcc_reg>;
0068 vcc-fixed-regulator;
0069 };
0070
0071 &ufs_1 {
0072 status = "okay";
0073 vcc-supply = <&ufs_1_fixed_vcc_reg>;
0074 vcc-fixed-regulator;
0075 };
0076
0077 &usi_0 {
0078 samsung,clkreq-on; /* needed for UART mode */
0079 status = "okay";
0080 };
0081
0082 &xtcxo {
0083 clock-frequency = <26000000>;
0084 };
