0001 /*
0002 * Cavium Thunder DTS file - Thunder SoC description
0003 *
0004 * Copyright (C) 2014, Cavium Inc.
0005 *
0006 * This file is dual-licensed: you can use it either under the terms
0007 * of the GPL or the X11 license, at your option. Note that this dual
0008 * licensing only applies to this file, and not this project as a
0009 * whole.
0010 *
0011 * a) This library is free software; you can redistribute it and/or
0012 * modify it under the terms of the GNU General Public License as
0013 * published by the Free Software Foundation; either version 2 of the
0014 * License, or (at your option) any later version.
0015 *
0016 * This library is distributed in the hope that it will be useful,
0017 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0019 * GNU General Public License for more details.
0020 *
0021 * You should have received a copy of the GNU General Public
0022 * License along with this library; if not, write to the Free
0023 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
0024 * MA 02110-1301 USA
0025 *
0026 * Or, alternatively,
0027 *
0028 * b) Permission is hereby granted, free of charge, to any person
0029 * obtaining a copy of this software and associated documentation
0030 * files (the "Software"), to deal in the Software without
0031 * restriction, including without limitation the rights to use,
0032 * copy, modify, merge, publish, distribute, sublicense, and/or
0033 * sell copies of the Software, and to permit persons to whom the
0034 * Software is furnished to do so, subject to the following
0035 * conditions:
0036 *
0037 * The above copyright notice and this permission notice shall be
0038 * included in all copies or substantial portions of the Software.
0039 *
0040 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0041 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0042 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0043 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0044 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0045 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0046 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0047 * OTHER DEALINGS IN THE SOFTWARE.
0048 */
0049
0050 / {
0051 compatible = "cavium,thunder-88xx";
0052 interrupt-parent = <&gic0>;
0053 #address-cells = <2>;
0054 #size-cells = <2>;
0055
0056 psci {
0057 compatible = "arm,psci-0.2";
0058 method = "smc";
0059 };
0060
0061 cpus {
0062 #address-cells = <2>;
0063 #size-cells = <0>;
0064
0065 cpu@0 {
0066 device_type = "cpu";
0067 compatible = "cavium,thunder";
0068 reg = <0x0 0x000>;
0069 enable-method = "psci";
0070 };
0071 cpu@1 {
0072 device_type = "cpu";
0073 compatible = "cavium,thunder";
0074 reg = <0x0 0x001>;
0075 enable-method = "psci";
0076 };
0077 cpu@2 {
0078 device_type = "cpu";
0079 compatible = "cavium,thunder";
0080 reg = <0x0 0x002>;
0081 enable-method = "psci";
0082 };
0083 cpu@3 {
0084 device_type = "cpu";
0085 compatible = "cavium,thunder";
0086 reg = <0x0 0x003>;
0087 enable-method = "psci";
0088 };
0089 cpu@4 {
0090 device_type = "cpu";
0091 compatible = "cavium,thunder";
0092 reg = <0x0 0x004>;
0093 enable-method = "psci";
0094 };
0095 cpu@5 {
0096 device_type = "cpu";
0097 compatible = "cavium,thunder";
0098 reg = <0x0 0x005>;
0099 enable-method = "psci";
0100 };
0101 cpu@6 {
0102 device_type = "cpu";
0103 compatible = "cavium,thunder";
0104 reg = <0x0 0x006>;
0105 enable-method = "psci";
0106 };
0107 cpu@7 {
0108 device_type = "cpu";
0109 compatible = "cavium,thunder";
0110 reg = <0x0 0x007>;
0111 enable-method = "psci";
0112 };
0113 cpu@8 {
0114 device_type = "cpu";
0115 compatible = "cavium,thunder";
0116 reg = <0x0 0x008>;
0117 enable-method = "psci";
0118 };
0119 cpu@9 {
0120 device_type = "cpu";
0121 compatible = "cavium,thunder";
0122 reg = <0x0 0x009>;
0123 enable-method = "psci";
0124 };
0125 cpu@a {
0126 device_type = "cpu";
0127 compatible = "cavium,thunder";
0128 reg = <0x0 0x00a>;
0129 enable-method = "psci";
0130 };
0131 cpu@b {
0132 device_type = "cpu";
0133 compatible = "cavium,thunder";
0134 reg = <0x0 0x00b>;
0135 enable-method = "psci";
0136 };
0137 cpu@c {
0138 device_type = "cpu";
0139 compatible = "cavium,thunder";
0140 reg = <0x0 0x00c>;
0141 enable-method = "psci";
0142 };
0143 cpu@d {
0144 device_type = "cpu";
0145 compatible = "cavium,thunder";
0146 reg = <0x0 0x00d>;
0147 enable-method = "psci";
0148 };
0149 cpu@e {
0150 device_type = "cpu";
0151 compatible = "cavium,thunder";
0152 reg = <0x0 0x00e>;
0153 enable-method = "psci";
0154 };
0155 cpu@f {
0156 device_type = "cpu";
0157 compatible = "cavium,thunder";
0158 reg = <0x0 0x00f>;
0159 enable-method = "psci";
0160 };
0161 cpu@100 {
0162 device_type = "cpu";
0163 compatible = "cavium,thunder";
0164 reg = <0x0 0x100>;
0165 enable-method = "psci";
0166 };
0167 cpu@101 {
0168 device_type = "cpu";
0169 compatible = "cavium,thunder";
0170 reg = <0x0 0x101>;
0171 enable-method = "psci";
0172 };
0173 cpu@102 {
0174 device_type = "cpu";
0175 compatible = "cavium,thunder";
0176 reg = <0x0 0x102>;
0177 enable-method = "psci";
0178 };
0179 cpu@103 {
0180 device_type = "cpu";
0181 compatible = "cavium,thunder";
0182 reg = <0x0 0x103>;
0183 enable-method = "psci";
0184 };
0185 cpu@104 {
0186 device_type = "cpu";
0187 compatible = "cavium,thunder";
0188 reg = <0x0 0x104>;
0189 enable-method = "psci";
0190 };
0191 cpu@105 {
0192 device_type = "cpu";
0193 compatible = "cavium,thunder";
0194 reg = <0x0 0x105>;
0195 enable-method = "psci";
0196 };
0197 cpu@106 {
0198 device_type = "cpu";
0199 compatible = "cavium,thunder";
0200 reg = <0x0 0x106>;
0201 enable-method = "psci";
0202 };
0203 cpu@107 {
0204 device_type = "cpu";
0205 compatible = "cavium,thunder";
0206 reg = <0x0 0x107>;
0207 enable-method = "psci";
0208 };
0209 cpu@108 {
0210 device_type = "cpu";
0211 compatible = "cavium,thunder";
0212 reg = <0x0 0x108>;
0213 enable-method = "psci";
0214 };
0215 cpu@109 {
0216 device_type = "cpu";
0217 compatible = "cavium,thunder";
0218 reg = <0x0 0x109>;
0219 enable-method = "psci";
0220 };
0221 cpu@10a {
0222 device_type = "cpu";
0223 compatible = "cavium,thunder";
0224 reg = <0x0 0x10a>;
0225 enable-method = "psci";
0226 };
0227 cpu@10b {
0228 device_type = "cpu";
0229 compatible = "cavium,thunder";
0230 reg = <0x0 0x10b>;
0231 enable-method = "psci";
0232 };
0233 cpu@10c {
0234 device_type = "cpu";
0235 compatible = "cavium,thunder";
0236 reg = <0x0 0x10c>;
0237 enable-method = "psci";
0238 };
0239 cpu@10d {
0240 device_type = "cpu";
0241 compatible = "cavium,thunder";
0242 reg = <0x0 0x10d>;
0243 enable-method = "psci";
0244 };
0245 cpu@10e {
0246 device_type = "cpu";
0247 compatible = "cavium,thunder";
0248 reg = <0x0 0x10e>;
0249 enable-method = "psci";
0250 };
0251 cpu@10f {
0252 device_type = "cpu";
0253 compatible = "cavium,thunder";
0254 reg = <0x0 0x10f>;
0255 enable-method = "psci";
0256 };
0257 cpu@200 {
0258 device_type = "cpu";
0259 compatible = "cavium,thunder";
0260 reg = <0x0 0x200>;
0261 enable-method = "psci";
0262 };
0263 cpu@201 {
0264 device_type = "cpu";
0265 compatible = "cavium,thunder";
0266 reg = <0x0 0x201>;
0267 enable-method = "psci";
0268 };
0269 cpu@202 {
0270 device_type = "cpu";
0271 compatible = "cavium,thunder";
0272 reg = <0x0 0x202>;
0273 enable-method = "psci";
0274 };
0275 cpu@203 {
0276 device_type = "cpu";
0277 compatible = "cavium,thunder";
0278 reg = <0x0 0x203>;
0279 enable-method = "psci";
0280 };
0281 cpu@204 {
0282 device_type = "cpu";
0283 compatible = "cavium,thunder";
0284 reg = <0x0 0x204>;
0285 enable-method = "psci";
0286 };
0287 cpu@205 {
0288 device_type = "cpu";
0289 compatible = "cavium,thunder";
0290 reg = <0x0 0x205>;
0291 enable-method = "psci";
0292 };
0293 cpu@206 {
0294 device_type = "cpu";
0295 compatible = "cavium,thunder";
0296 reg = <0x0 0x206>;
0297 enable-method = "psci";
0298 };
0299 cpu@207 {
0300 device_type = "cpu";
0301 compatible = "cavium,thunder";
0302 reg = <0x0 0x207>;
0303 enable-method = "psci";
0304 };
0305 cpu@208 {
0306 device_type = "cpu";
0307 compatible = "cavium,thunder";
0308 reg = <0x0 0x208>;
0309 enable-method = "psci";
0310 };
0311 cpu@209 {
0312 device_type = "cpu";
0313 compatible = "cavium,thunder";
0314 reg = <0x0 0x209>;
0315 enable-method = "psci";
0316 };
0317 cpu@20a {
0318 device_type = "cpu";
0319 compatible = "cavium,thunder";
0320 reg = <0x0 0x20a>;
0321 enable-method = "psci";
0322 };
0323 cpu@20b {
0324 device_type = "cpu";
0325 compatible = "cavium,thunder";
0326 reg = <0x0 0x20b>;
0327 enable-method = "psci";
0328 };
0329 cpu@20c {
0330 device_type = "cpu";
0331 compatible = "cavium,thunder";
0332 reg = <0x0 0x20c>;
0333 enable-method = "psci";
0334 };
0335 cpu@20d {
0336 device_type = "cpu";
0337 compatible = "cavium,thunder";
0338 reg = <0x0 0x20d>;
0339 enable-method = "psci";
0340 };
0341 cpu@20e {
0342 device_type = "cpu";
0343 compatible = "cavium,thunder";
0344 reg = <0x0 0x20e>;
0345 enable-method = "psci";
0346 };
0347 cpu@20f {
0348 device_type = "cpu";
0349 compatible = "cavium,thunder";
0350 reg = <0x0 0x20f>;
0351 enable-method = "psci";
0352 };
0353 };
0354
0355 timer {
0356 compatible = "arm,armv8-timer";
0357 interrupts = <1 13 4>,
0358 <1 14 4>,
0359 <1 11 4>,
0360 <1 10 4>;
0361 };
0362
0363 pmu {
0364 compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
0365 interrupts = <1 7 4>;
0366 };
0367
0368 soc {
0369 compatible = "simple-bus";
0370 #address-cells = <2>;
0371 #size-cells = <2>;
0372 ranges;
0373
0374 refclk50mhz: refclk50mhz {
0375 compatible = "fixed-clock";
0376 #clock-cells = <0>;
0377 clock-frequency = <50000000>;
0378 clock-output-names = "refclk50mhz";
0379 };
0380
0381 gic0: interrupt-controller@8010,00000000 {
0382 compatible = "arm,gic-v3";
0383 #interrupt-cells = <3>;
0384 #address-cells = <2>;
0385 #size-cells = <2>;
0386 ranges;
0387 interrupt-controller;
0388 reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
0389 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
0390 interrupts = <1 9 0xf04>;
0391
0392 its: gic-its@8010,00020000 {
0393 compatible = "arm,gic-v3-its";
0394 msi-controller;
0395 reg = <0x8010 0x20000 0x0 0x200000>;
0396 };
0397 };
0398
0399 uaa0: serial@87e0,24000000 {
0400 compatible = "arm,pl011", "arm,primecell";
0401 reg = <0x87e0 0x24000000 0x0 0x1000>;
0402 interrupts = <1 21 4>;
0403 clocks = <&refclk50mhz>;
0404 clock-names = "apb_pclk";
0405 };
0406
0407 uaa1: serial@87e0,25000000 {
0408 compatible = "arm,pl011", "arm,primecell";
0409 reg = <0x87e0 0x25000000 0x0 0x1000>;
0410 interrupts = <1 22 4>;
0411 clocks = <&refclk50mhz>;
0412 clock-names = "apb_pclk";
0413 };
0414 };
0415 };
