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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * ARM Ltd. Versatile Express
0004  *
0005  * Motherboard Express uATX
0006  * V2M-P1
0007  *
0008  * HBI-0190D
0009  *
0010  * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
0011  * Technical Reference Manual)
0012  *
0013  * WARNING! The hardware described in this file is independent from the
0014  * original variant (vexpress-v2m.dtsi), but there is a strong
0015  * correspondence between the two configurations.
0016  *
0017  * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
0018  * CHANGES TO vexpress-v2m.dtsi!
0019  */
0020 #include <dt-bindings/interrupt-controller/arm-gic.h>
0021 
0022 / {
0023         v2m_fixed_3v3: fixed-regulator-0 {
0024                 compatible = "regulator-fixed";
0025                 regulator-name = "3V3";
0026                 regulator-min-microvolt = <3300000>;
0027                 regulator-max-microvolt = <3300000>;
0028                 regulator-always-on;
0029         };
0030 
0031         v2m_clk24mhz: clk24mhz {
0032                 compatible = "fixed-clock";
0033                 #clock-cells = <0>;
0034                 clock-frequency = <24000000>;
0035                 clock-output-names = "v2m:clk24mhz";
0036         };
0037 
0038         v2m_refclk1mhz: refclk1mhz {
0039                 compatible = "fixed-clock";
0040                 #clock-cells = <0>;
0041                 clock-frequency = <1000000>;
0042                 clock-output-names = "v2m:refclk1mhz";
0043         };
0044 
0045         v2m_refclk32khz: refclk32khz {
0046                 compatible = "fixed-clock";
0047                 #clock-cells = <0>;
0048                 clock-frequency = <32768>;
0049                 clock-output-names = "v2m:refclk32khz";
0050         };
0051 
0052         leds {
0053                 compatible = "gpio-leds";
0054 
0055                 led-1 {
0056                         label = "v2m:green:user1";
0057                         gpios = <&v2m_led_gpios 0 0>;
0058                         linux,default-trigger = "heartbeat";
0059                 };
0060 
0061                 led-2 {
0062                         label = "v2m:green:user2";
0063                         gpios = <&v2m_led_gpios 1 0>;
0064                         linux,default-trigger = "disk-activity";
0065                 };
0066 
0067                 led-3 {
0068                         label = "v2m:green:user3";
0069                         gpios = <&v2m_led_gpios 2 0>;
0070                         linux,default-trigger = "cpu0";
0071                 };
0072 
0073                 led-4 {
0074                         label = "v2m:green:user4";
0075                         gpios = <&v2m_led_gpios 3 0>;
0076                         linux,default-trigger = "cpu1";
0077                 };
0078 
0079                 led-5 {
0080                         label = "v2m:green:user5";
0081                         gpios = <&v2m_led_gpios 4 0>;
0082                         linux,default-trigger = "cpu2";
0083                 };
0084 
0085                 led-6 {
0086                         label = "v2m:green:user6";
0087                         gpios = <&v2m_led_gpios 5 0>;
0088                         linux,default-trigger = "cpu3";
0089                 };
0090 
0091                 led-7 {
0092                         label = "v2m:green:user7";
0093                         gpios = <&v2m_led_gpios 6 0>;
0094                         linux,default-trigger = "cpu4";
0095                 };
0096 
0097                 led-8 {
0098                         label = "v2m:green:user8";
0099                         gpios = <&v2m_led_gpios 7 0>;
0100                         linux,default-trigger = "cpu5";
0101                 };
0102         };
0103 
0104         bus@8000000 {
0105                 compatible = "simple-bus";
0106                 #address-cells = <1>;
0107                 #size-cells = <1>;
0108 
0109                 #interrupt-cells = <1>;
0110                 interrupt-map-mask = <0 63>;
0111                 interrupt-map = <0  0 &gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,
0112                                 <0  1 &gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,
0113                                 <0  2 &gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,
0114                                 <0  3 &gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,
0115                                 <0  4 &gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,
0116                                 <0  5 &gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,
0117                                 <0  6 &gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,
0118                                 <0  7 &gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,
0119                                 <0  8 &gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
0120                                 <0  9 &gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
0121                                 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
0122                                 <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
0123                                 <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0124                                 <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
0125                                 <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
0126                                 <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
0127                                 <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
0128                                 <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
0129                                 <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0130                                 <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
0131                                 <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
0132                                 <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
0133                                 <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
0134                                 <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
0135                                 <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
0136                                 <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
0137                                 <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
0138                                 <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
0139                                 <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
0140                                 <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0141                                 <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
0142                                 <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
0143                                 <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
0144                                 <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
0145                                 <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
0146                                 <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
0147                                 <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
0148                                 <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
0149                                 <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
0150                                 <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0151                                 <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
0152                                 <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
0153                                 <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
0154 
0155                 motherboard-bus@8000000 {
0156                         arm,hbi = <0x190>;
0157                         arm,vexpress,site = <0>;
0158                         compatible = "arm,vexpress,v2m-p1", "simple-bus";
0159                         #address-cells = <2>; /* SMB chipselect number and offset */
0160                         #size-cells = <1>;
0161                         ranges = <0 0 0x08000000 0x04000000>,
0162                                  <1 0 0x14000000 0x04000000>,
0163                                  <2 0 0x18000000 0x04000000>,
0164                                  <3 0 0x1c000000 0x04000000>,
0165                                  <4 0 0x0c000000 0x04000000>,
0166                                  <5 0 0x10000000 0x04000000>;
0167 
0168                         nor_flash: flash@0 {
0169                                 compatible = "arm,vexpress-flash", "cfi-flash";
0170                                 reg = <0 0x00000000 0x04000000>,
0171                                       <4 0x00000000 0x04000000>;
0172                                 bank-width = <4>;
0173                                 partitions {
0174                                         compatible = "arm,arm-firmware-suite";
0175                                 };
0176                         };
0177 
0178                         psram@100000000 {
0179                                 compatible = "arm,vexpress-psram", "mtd-ram";
0180                                 reg = <1 0x00000000 0x02000000>;
0181                                 bank-width = <4>;
0182                         };
0183 
0184                         ethernet@202000000 {
0185                                 compatible = "smsc,lan9118", "smsc,lan9115";
0186                                 reg = <2 0x02000000 0x10000>;
0187                                 interrupts = <15>;
0188                                 phy-mode = "mii";
0189                                 reg-io-width = <4>;
0190                                 smsc,irq-active-high;
0191                                 smsc,irq-push-pull;
0192                                 vdd33a-supply = <&v2m_fixed_3v3>;
0193                                 vddvario-supply = <&v2m_fixed_3v3>;
0194                         };
0195 
0196                         usb@203000000 {
0197                                 compatible = "nxp,usb-isp1761";
0198                                 reg = <2 0x03000000 0x20000>;
0199                                 interrupts = <16>;
0200                                 dr_mode = "peripheral";
0201                         };
0202 
0203                         iofpga-bus@300000000 {
0204                                 compatible = "simple-bus";
0205                                 #address-cells = <1>;
0206                                 #size-cells = <1>;
0207                                 ranges = <0 3 0 0x200000>;
0208 
0209                                 v2m_sysreg: sysreg@10000 {
0210                                         compatible = "arm,vexpress-sysreg";
0211                                         reg = <0x010000 0x1000>;
0212                                         #address-cells = <1>;
0213                                         #size-cells = <1>;
0214                                         ranges = <0 0x10000 0x1000>;
0215 
0216                                         v2m_led_gpios: gpio@8 {
0217                                                 compatible = "arm,vexpress-sysreg,sys_led";
0218                                                 reg = <0x008 4>;
0219                                                 gpio-controller;
0220                                                 #gpio-cells = <2>;
0221                                         };
0222 
0223                                         v2m_mmc_gpios: gpio@48 {
0224                                                 compatible = "arm,vexpress-sysreg,sys_mci";
0225                                                 reg = <0x048 4>;
0226                                                 gpio-controller;
0227                                                 #gpio-cells = <2>;
0228                                         };
0229 
0230                                         v2m_flash_gpios: gpio@4c {
0231                                                 compatible = "arm,vexpress-sysreg,sys_flash";
0232                                                 reg = <0x04c 4>;
0233                                                 gpio-controller;
0234                                                 #gpio-cells = <2>;
0235                                         };
0236                                 };
0237 
0238                                 v2m_sysctl: sysctl@20000 {
0239                                         compatible = "arm,sp810", "arm,primecell";
0240                                         reg = <0x020000 0x1000>;
0241                                         clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
0242                                         clock-names = "refclk", "timclk", "apb_pclk";
0243                                         #clock-cells = <1>;
0244                                         clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
0245                                         assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
0246                                         assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
0247                                 };
0248 
0249                                 /* PCI-E I2C bus */
0250                                 v2m_i2c_pcie: i2c@30000 {
0251                                         compatible = "arm,versatile-i2c";
0252                                         reg = <0x030000 0x1000>;
0253 
0254                                         #address-cells = <1>;
0255                                         #size-cells = <0>;
0256 
0257                                         pcie-switch@60 {
0258                                                 compatible = "idt,89hpes32h8";
0259                                                 reg = <0x60>;
0260                                         };
0261                                 };
0262 
0263                                 aaci@40000 {
0264                                         compatible = "arm,pl041", "arm,primecell";
0265                                         reg = <0x040000 0x1000>;
0266                                         interrupts = <11>;
0267                                         clocks = <&smbclk>;
0268                                         clock-names = "apb_pclk";
0269                                 };
0270 
0271                                 mmc@50000 {
0272                                         compatible = "arm,pl180", "arm,primecell";
0273                                         reg = <0x050000 0x1000>;
0274                                         interrupts = <9>, <10>;
0275                                         cd-gpios = <&v2m_mmc_gpios 0 0>;
0276                                         wp-gpios = <&v2m_mmc_gpios 1 0>;
0277                                         max-frequency = <12000000>;
0278                                         vmmc-supply = <&v2m_fixed_3v3>;
0279                                         clocks = <&v2m_clk24mhz>, <&smbclk>;
0280                                         clock-names = "mclk", "apb_pclk";
0281                                 };
0282 
0283                                 kmi@60000 {
0284                                         compatible = "arm,pl050", "arm,primecell";
0285                                         reg = <0x060000 0x1000>;
0286                                         interrupts = <12>;
0287                                         clocks = <&v2m_clk24mhz>, <&smbclk>;
0288                                         clock-names = "KMIREFCLK", "apb_pclk";
0289                                 };
0290 
0291                                 kmi@70000 {
0292                                         compatible = "arm,pl050", "arm,primecell";
0293                                         reg = <0x070000 0x1000>;
0294                                         interrupts = <13>;
0295                                         clocks = <&v2m_clk24mhz>, <&smbclk>;
0296                                         clock-names = "KMIREFCLK", "apb_pclk";
0297                                 };
0298 
0299                                 v2m_serial0: serial@90000 {
0300                                         compatible = "arm,pl011", "arm,primecell";
0301                                         reg = <0x090000 0x1000>;
0302                                         interrupts = <5>;
0303                                         clocks = <&v2m_oscclk2>, <&smbclk>;
0304                                         clock-names = "uartclk", "apb_pclk";
0305                                 };
0306 
0307                                 v2m_serial1: serial@a0000 {
0308                                         compatible = "arm,pl011", "arm,primecell";
0309                                         reg = <0x0a0000 0x1000>;
0310                                         interrupts = <6>;
0311                                         clocks = <&v2m_oscclk2>, <&smbclk>;
0312                                         clock-names = "uartclk", "apb_pclk";
0313                                 };
0314 
0315                                 v2m_serial2: serial@b0000 {
0316                                         compatible = "arm,pl011", "arm,primecell";
0317                                         reg = <0x0b0000 0x1000>;
0318                                         interrupts = <7>;
0319                                         clocks = <&v2m_oscclk2>, <&smbclk>;
0320                                         clock-names = "uartclk", "apb_pclk";
0321                                 };
0322 
0323                                 v2m_serial3: serial@c0000 {
0324                                         compatible = "arm,pl011", "arm,primecell";
0325                                         reg = <0x0c0000 0x1000>;
0326                                         interrupts = <8>;
0327                                         clocks = <&v2m_oscclk2>, <&smbclk>;
0328                                         clock-names = "uartclk", "apb_pclk";
0329                                 };
0330 
0331                                 watchdog@f0000 {
0332                                         compatible = "arm,sp805", "arm,primecell";
0333                                         reg = <0x0f0000 0x1000>;
0334                                         interrupts = <0>;
0335                                         clocks = <&v2m_refclk32khz>, <&smbclk>;
0336                                         clock-names = "wdog_clk", "apb_pclk";
0337                                 };
0338 
0339                                 v2m_timer01: timer@110000 {
0340                                         compatible = "arm,sp804", "arm,primecell";
0341                                         reg = <0x110000 0x1000>;
0342                                         interrupts = <2>;
0343                                         clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
0344                                         clock-names = "timclken1", "timclken2", "apb_pclk";
0345                                 };
0346 
0347                                 v2m_timer23: timer@120000 {
0348                                         compatible = "arm,sp804", "arm,primecell";
0349                                         reg = <0x120000 0x1000>;
0350                                         interrupts = <3>;
0351                                         clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
0352                                         clock-names = "timclken1", "timclken2", "apb_pclk";
0353                                 };
0354 
0355                                 /* DVI I2C bus */
0356                                 v2m_i2c_dvi: i2c@160000 {
0357                                         compatible = "arm,versatile-i2c";
0358                                         reg = <0x160000 0x1000>;
0359                                         #address-cells = <1>;
0360                                         #size-cells = <0>;
0361 
0362                                         dvi-transmitter@39 {
0363                                                 compatible = "sil,sii9022-tpi", "sil,sii9022";
0364                                                 reg = <0x39>;
0365 
0366                                                 ports {
0367                                                         #address-cells = <1>;
0368                                                         #size-cells = <0>;
0369 
0370                                                         port@0 {
0371                                                                 reg = <0>;
0372                                                                 dvi_bridge_in: endpoint {
0373                                                                         remote-endpoint = <&clcd_pads>;
0374                                                                 };
0375                                                         };
0376                                                 };
0377                                         };
0378 
0379                                         dvi-transmitter@60 {
0380                                                 compatible = "sil,sii9022-cpi", "sil,sii9022";
0381                                                 reg = <0x60>;
0382                                         };
0383                                 };
0384 
0385                                 rtc@170000 {
0386                                         compatible = "arm,pl031", "arm,primecell";
0387                                         reg = <0x170000 0x1000>;
0388                                         interrupts = <4>;
0389                                         clocks = <&smbclk>;
0390                                         clock-names = "apb_pclk";
0391                                 };
0392 
0393                                 compact-flash@1a0000 {
0394                                         compatible = "arm,vexpress-cf", "ata-generic";
0395                                         reg = <0x1a0000 0x100
0396                                                0x1a0100 0xf00>;
0397                                         reg-shift = <2>;
0398                                 };
0399 
0400                                 clcd@1f0000 {
0401                                         compatible = "arm,pl111", "arm,primecell";
0402                                         reg = <0x1f0000 0x1000>;
0403                                         interrupt-names = "combined";
0404                                         interrupts = <14>;
0405                                         clocks = <&v2m_oscclk1>, <&smbclk>;
0406                                         clock-names = "clcdclk", "apb_pclk";
0407                                         /* 800x600 16bpp @36MHz works fine */
0408                                         max-memory-bandwidth = <54000000>;
0409                                         memory-region = <&vram>;
0410 
0411                                         port {
0412                                                 clcd_pads: endpoint {
0413                                                         remote-endpoint = <&dvi_bridge_in>;
0414                                                         arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
0415                                                 };
0416                                         };
0417                                 };
0418 
0419                                 mcc {
0420                                         compatible = "arm,vexpress,config-bus";
0421                                         arm,vexpress,config-bridge = <&v2m_sysreg>;
0422 
0423                                         oscclk0 {
0424                                                 /* MCC static memory clock */
0425                                                 compatible = "arm,vexpress-osc";
0426                                                 arm,vexpress-sysreg,func = <1 0>;
0427                                                 freq-range = <25000000 60000000>;
0428                                                 #clock-cells = <0>;
0429                                                 clock-output-names = "v2m:oscclk0";
0430                                         };
0431 
0432                                         v2m_oscclk1: oscclk1 {
0433                                                 /* CLCD clock */
0434                                                 compatible = "arm,vexpress-osc";
0435                                                 arm,vexpress-sysreg,func = <1 1>;
0436                                                 freq-range = <23750000 65000000>;
0437                                                 #clock-cells = <0>;
0438                                                 clock-output-names = "v2m:oscclk1";
0439                                         };
0440 
0441                                         v2m_oscclk2: oscclk2 {
0442                                                 /* IO FPGA peripheral clock */
0443                                                 compatible = "arm,vexpress-osc";
0444                                                 arm,vexpress-sysreg,func = <1 2>;
0445                                                 freq-range = <24000000 24000000>;
0446                                                 #clock-cells = <0>;
0447                                                 clock-output-names = "v2m:oscclk2";
0448                                         };
0449 
0450                                         volt-vio {
0451                                                 /* Logic level voltage */
0452                                                 compatible = "arm,vexpress-volt";
0453                                                 arm,vexpress-sysreg,func = <2 0>;
0454                                                 regulator-name = "VIO";
0455                                                 regulator-always-on;
0456                                                 label = "VIO";
0457                                         };
0458 
0459                                         temp-mcc {
0460                                                 /* MCC internal operating temperature */
0461                                                 compatible = "arm,vexpress-temp";
0462                                                 arm,vexpress-sysreg,func = <4 0>;
0463                                                 label = "MCC";
0464                                         };
0465 
0466                                         reset {
0467                                                 compatible = "arm,vexpress-reset";
0468                                                 arm,vexpress-sysreg,func = <5 0>;
0469                                         };
0470 
0471                                         muxfpga {
0472                                                 compatible = "arm,vexpress-muxfpga";
0473                                                 arm,vexpress-sysreg,func = <7 0>;
0474                                         };
0475 
0476                                         shutdown {
0477                                                 compatible = "arm,vexpress-shutdown";
0478                                                 arm,vexpress-sysreg,func = <8 0>;
0479                                         };
0480 
0481                                         reboot {
0482                                                 compatible = "arm,vexpress-reboot";
0483                                                 arm,vexpress-sysreg,func = <9 0>;
0484                                         };
0485 
0486                                         dvimode {
0487                                                 compatible = "arm,vexpress-dvimode";
0488                                                 arm,vexpress-sysreg,func = <11 0>;
0489                                         };
0490                                 };
0491                         };
0492                 };
0493         };
0494 };