0001 // SPDX-License-Identifier: GPL-2.0+ OR MIT
0002 /*
0003 * Apple T8103 "M1" SoC
0004 *
0005 * Other names: H13G, "Tonga"
0006 *
0007 * Copyright The Asahi Linux Contributors
0008 */
0009
0010 #include <dt-bindings/gpio/gpio.h>
0011 #include <dt-bindings/interrupt-controller/apple-aic.h>
0012 #include <dt-bindings/interrupt-controller/irq.h>
0013 #include <dt-bindings/pinctrl/apple.h>
0014
0015 / {
0016 compatible = "apple,t8103", "apple,arm-platform";
0017
0018 #address-cells = <2>;
0019 #size-cells = <2>;
0020
0021 cpus {
0022 #address-cells = <2>;
0023 #size-cells = <0>;
0024
0025 cpu0: cpu@0 {
0026 compatible = "apple,icestorm";
0027 device_type = "cpu";
0028 reg = <0x0 0x0>;
0029 enable-method = "spin-table";
0030 cpu-release-addr = <0 0>; /* To be filled by loader */
0031 };
0032
0033 cpu1: cpu@1 {
0034 compatible = "apple,icestorm";
0035 device_type = "cpu";
0036 reg = <0x0 0x1>;
0037 enable-method = "spin-table";
0038 cpu-release-addr = <0 0>; /* To be filled by loader */
0039 };
0040
0041 cpu2: cpu@2 {
0042 compatible = "apple,icestorm";
0043 device_type = "cpu";
0044 reg = <0x0 0x2>;
0045 enable-method = "spin-table";
0046 cpu-release-addr = <0 0>; /* To be filled by loader */
0047 };
0048
0049 cpu3: cpu@3 {
0050 compatible = "apple,icestorm";
0051 device_type = "cpu";
0052 reg = <0x0 0x3>;
0053 enable-method = "spin-table";
0054 cpu-release-addr = <0 0>; /* To be filled by loader */
0055 };
0056
0057 cpu4: cpu@10100 {
0058 compatible = "apple,firestorm";
0059 device_type = "cpu";
0060 reg = <0x0 0x10100>;
0061 enable-method = "spin-table";
0062 cpu-release-addr = <0 0>; /* To be filled by loader */
0063 };
0064
0065 cpu5: cpu@10101 {
0066 compatible = "apple,firestorm";
0067 device_type = "cpu";
0068 reg = <0x0 0x10101>;
0069 enable-method = "spin-table";
0070 cpu-release-addr = <0 0>; /* To be filled by loader */
0071 };
0072
0073 cpu6: cpu@10102 {
0074 compatible = "apple,firestorm";
0075 device_type = "cpu";
0076 reg = <0x0 0x10102>;
0077 enable-method = "spin-table";
0078 cpu-release-addr = <0 0>; /* To be filled by loader */
0079 };
0080
0081 cpu7: cpu@10103 {
0082 compatible = "apple,firestorm";
0083 device_type = "cpu";
0084 reg = <0x0 0x10103>;
0085 enable-method = "spin-table";
0086 cpu-release-addr = <0 0>; /* To be filled by loader */
0087 };
0088 };
0089
0090 timer {
0091 compatible = "arm,armv8-timer";
0092 interrupt-parent = <&aic>;
0093 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
0094 interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
0095 <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
0096 <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
0097 <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
0098 };
0099
0100 pmu-e {
0101 compatible = "apple,icestorm-pmu";
0102 interrupt-parent = <&aic>;
0103 interrupts = <AIC_FIQ AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
0104 };
0105
0106 pmu-p {
0107 compatible = "apple,firestorm-pmu";
0108 interrupt-parent = <&aic>;
0109 interrupts = <AIC_FIQ AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
0110 };
0111
0112 clkref: clock-ref {
0113 compatible = "fixed-clock";
0114 #clock-cells = <0>;
0115 clock-frequency = <24000000>;
0116 clock-output-names = "clkref";
0117 };
0118
0119 soc {
0120 compatible = "simple-bus";
0121 #address-cells = <2>;
0122 #size-cells = <2>;
0123
0124 ranges;
0125 nonposted-mmio;
0126
0127 i2c0: i2c@235010000 {
0128 compatible = "apple,t8103-i2c", "apple,i2c";
0129 reg = <0x2 0x35010000 0x0 0x4000>;
0130 clocks = <&clkref>;
0131 interrupt-parent = <&aic>;
0132 interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
0133 pinctrl-0 = <&i2c0_pins>;
0134 pinctrl-names = "default";
0135 #address-cells = <0x1>;
0136 #size-cells = <0x0>;
0137 power-domains = <&ps_i2c0>;
0138 };
0139
0140 i2c1: i2c@235014000 {
0141 compatible = "apple,t8103-i2c", "apple,i2c";
0142 reg = <0x2 0x35014000 0x0 0x4000>;
0143 clocks = <&clkref>;
0144 interrupt-parent = <&aic>;
0145 interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
0146 pinctrl-0 = <&i2c1_pins>;
0147 pinctrl-names = "default";
0148 #address-cells = <0x1>;
0149 #size-cells = <0x0>;
0150 power-domains = <&ps_i2c1>;
0151 };
0152
0153 i2c2: i2c@235018000 {
0154 compatible = "apple,t8103-i2c", "apple,i2c";
0155 reg = <0x2 0x35018000 0x0 0x4000>;
0156 clocks = <&clkref>;
0157 interrupt-parent = <&aic>;
0158 interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
0159 pinctrl-0 = <&i2c2_pins>;
0160 pinctrl-names = "default";
0161 #address-cells = <0x1>;
0162 #size-cells = <0x0>;
0163 status = "disabled"; /* not used in all devices */
0164 power-domains = <&ps_i2c2>;
0165 };
0166
0167 i2c3: i2c@23501c000 {
0168 compatible = "apple,t8103-i2c", "apple,i2c";
0169 reg = <0x2 0x3501c000 0x0 0x4000>;
0170 clocks = <&clkref>;
0171 interrupt-parent = <&aic>;
0172 interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
0173 pinctrl-0 = <&i2c3_pins>;
0174 pinctrl-names = "default";
0175 #address-cells = <0x1>;
0176 #size-cells = <0x0>;
0177 power-domains = <&ps_i2c3>;
0178 };
0179
0180 i2c4: i2c@235020000 {
0181 compatible = "apple,t8103-i2c", "apple,i2c";
0182 reg = <0x2 0x35020000 0x0 0x4000>;
0183 clocks = <&clkref>;
0184 interrupt-parent = <&aic>;
0185 interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
0186 pinctrl-0 = <&i2c4_pins>;
0187 pinctrl-names = "default";
0188 #address-cells = <0x1>;
0189 #size-cells = <0x0>;
0190 power-domains = <&ps_i2c4>;
0191 status = "disabled"; /* only used in J293 */
0192 };
0193
0194 serial0: serial@235200000 {
0195 compatible = "apple,s5l-uart";
0196 reg = <0x2 0x35200000 0x0 0x1000>;
0197 reg-io-width = <4>;
0198 interrupt-parent = <&aic>;
0199 interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
0200 /*
0201 * TODO: figure out the clocking properly, there may
0202 * be a third selectable clock.
0203 */
0204 clocks = <&clkref>, <&clkref>;
0205 clock-names = "uart", "clk_uart_baud0";
0206 power-domains = <&ps_uart0>;
0207 status = "disabled";
0208 };
0209
0210 serial2: serial@235208000 {
0211 compatible = "apple,s5l-uart";
0212 reg = <0x2 0x35208000 0x0 0x1000>;
0213 reg-io-width = <4>;
0214 interrupt-parent = <&aic>;
0215 interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
0216 clocks = <&clkref>, <&clkref>;
0217 clock-names = "uart", "clk_uart_baud0";
0218 power-domains = <&ps_uart2>;
0219 status = "disabled";
0220 };
0221
0222 aic: interrupt-controller@23b100000 {
0223 compatible = "apple,t8103-aic", "apple,aic";
0224 #interrupt-cells = <3>;
0225 interrupt-controller;
0226 reg = <0x2 0x3b100000 0x0 0x8000>;
0227 power-domains = <&ps_aic>;
0228
0229 affinities {
0230 e-core-pmu-affinity {
0231 apple,fiq-index = <AIC_CPU_PMU_E>;
0232 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
0233 };
0234
0235 p-core-pmu-affinity {
0236 apple,fiq-index = <AIC_CPU_PMU_P>;
0237 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
0238 };
0239 };
0240 };
0241
0242 pmgr: power-management@23b700000 {
0243 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
0244 #address-cells = <1>;
0245 #size-cells = <1>;
0246 reg = <0x2 0x3b700000 0 0x14000>;
0247 };
0248
0249 pinctrl_ap: pinctrl@23c100000 {
0250 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
0251 reg = <0x2 0x3c100000 0x0 0x100000>;
0252 power-domains = <&ps_gpio>;
0253
0254 gpio-controller;
0255 #gpio-cells = <2>;
0256 gpio-ranges = <&pinctrl_ap 0 0 212>;
0257 apple,npins = <212>;
0258
0259 interrupt-controller;
0260 #interrupt-cells = <2>;
0261 interrupt-parent = <&aic>;
0262 interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
0263 <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
0264 <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
0265 <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
0266 <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
0267 <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
0268 <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
0269
0270 i2c0_pins: i2c0-pins {
0271 pinmux = <APPLE_PINMUX(192, 1)>,
0272 <APPLE_PINMUX(188, 1)>;
0273 };
0274
0275 i2c1_pins: i2c1-pins {
0276 pinmux = <APPLE_PINMUX(201, 1)>,
0277 <APPLE_PINMUX(199, 1)>;
0278 };
0279
0280 i2c2_pins: i2c2-pins {
0281 pinmux = <APPLE_PINMUX(163, 1)>,
0282 <APPLE_PINMUX(162, 1)>;
0283 };
0284
0285 i2c3_pins: i2c3-pins {
0286 pinmux = <APPLE_PINMUX(73, 1)>,
0287 <APPLE_PINMUX(72, 1)>;
0288 };
0289
0290 i2c4_pins: i2c4-pins {
0291 pinmux = <APPLE_PINMUX(135, 1)>,
0292 <APPLE_PINMUX(134, 1)>;
0293 };
0294
0295 pcie_pins: pcie-pins {
0296 pinmux = <APPLE_PINMUX(150, 1)>,
0297 <APPLE_PINMUX(151, 1)>,
0298 <APPLE_PINMUX(32, 1)>;
0299 };
0300 };
0301
0302 pinctrl_nub: pinctrl@23d1f0000 {
0303 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
0304 reg = <0x2 0x3d1f0000 0x0 0x4000>;
0305 power-domains = <&ps_nub_gpio>;
0306
0307 gpio-controller;
0308 #gpio-cells = <2>;
0309 gpio-ranges = <&pinctrl_nub 0 0 23>;
0310 apple,npins = <23>;
0311
0312 interrupt-controller;
0313 #interrupt-cells = <2>;
0314 interrupt-parent = <&aic>;
0315 interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
0316 <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
0317 <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
0318 <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
0319 <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
0320 <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
0321 <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
0322 };
0323
0324 pmgr_mini: power-management@23d280000 {
0325 compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
0326 #address-cells = <1>;
0327 #size-cells = <1>;
0328 reg = <0x2 0x3d280000 0 0x4000>;
0329 };
0330
0331 wdt: watchdog@23d2b0000 {
0332 compatible = "apple,t8103-wdt", "apple,wdt";
0333 reg = <0x2 0x3d2b0000 0x0 0x4000>;
0334 clocks = <&clkref>;
0335 interrupt-parent = <&aic>;
0336 interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
0337 };
0338
0339 pinctrl_smc: pinctrl@23e820000 {
0340 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
0341 reg = <0x2 0x3e820000 0x0 0x4000>;
0342
0343 gpio-controller;
0344 #gpio-cells = <2>;
0345 gpio-ranges = <&pinctrl_smc 0 0 16>;
0346 apple,npins = <16>;
0347
0348 interrupt-controller;
0349 #interrupt-cells = <2>;
0350 interrupt-parent = <&aic>;
0351 interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
0352 <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
0353 <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
0354 <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
0355 <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
0356 <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
0357 <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
0358 };
0359
0360 pinctrl_aop: pinctrl@24a820000 {
0361 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
0362 reg = <0x2 0x4a820000 0x0 0x4000>;
0363
0364 gpio-controller;
0365 #gpio-cells = <2>;
0366 gpio-ranges = <&pinctrl_aop 0 0 42>;
0367 apple,npins = <42>;
0368
0369 interrupt-controller;
0370 #interrupt-cells = <2>;
0371 interrupt-parent = <&aic>;
0372 interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
0373 <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
0374 <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
0375 <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
0376 <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
0377 <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
0378 <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
0379 };
0380
0381 ans_mbox: mbox@277408000 {
0382 compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
0383 reg = <0x2 0x77408000 0x0 0x4000>;
0384 interrupt-parent = <&aic>;
0385 interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
0386 <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
0387 <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
0388 <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
0389 interrupt-names = "send-empty", "send-not-empty",
0390 "recv-empty", "recv-not-empty";
0391 #mbox-cells = <0>;
0392 power-domains = <&ps_ans2>;
0393 };
0394
0395 sart: iommu@27bc50000 {
0396 compatible = "apple,t8103-sart";
0397 reg = <0x2 0x7bc50000 0x0 0x10000>;
0398 power-domains = <&ps_ans2>;
0399 };
0400
0401 nvme@27bcc0000 {
0402 compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
0403 reg = <0x2 0x7bcc0000 0x0 0x40000>,
0404 <0x2 0x77400000 0x0 0x4000>;
0405 reg-names = "nvme", "ans";
0406 interrupt-parent = <&aic>;
0407 interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
0408 mboxes = <&ans_mbox>;
0409 apple,sart = <&sart>;
0410 power-domains = <&ps_ans2>, <&ps_apcie_st>;
0411 power-domain-names = "ans", "apcie0";
0412 resets = <&ps_ans2>;
0413 };
0414
0415 pcie0_dart_0: dart@681008000 {
0416 compatible = "apple,t8103-dart";
0417 reg = <0x6 0x81008000 0x0 0x4000>;
0418 #iommu-cells = <1>;
0419 interrupt-parent = <&aic>;
0420 interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
0421 power-domains = <&ps_apcie_gp>;
0422 };
0423
0424 pcie0_dart_1: dart@682008000 {
0425 compatible = "apple,t8103-dart";
0426 reg = <0x6 0x82008000 0x0 0x4000>;
0427 #iommu-cells = <1>;
0428 interrupt-parent = <&aic>;
0429 interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
0430 power-domains = <&ps_apcie_gp>;
0431 };
0432
0433 pcie0_dart_2: dart@683008000 {
0434 compatible = "apple,t8103-dart";
0435 reg = <0x6 0x83008000 0x0 0x4000>;
0436 #iommu-cells = <1>;
0437 interrupt-parent = <&aic>;
0438 interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
0439 power-domains = <&ps_apcie_gp>;
0440 };
0441
0442 pcie0: pcie@690000000 {
0443 compatible = "apple,t8103-pcie", "apple,pcie";
0444 device_type = "pci";
0445
0446 reg = <0x6 0x90000000 0x0 0x1000000>,
0447 <0x6 0x80000000 0x0 0x100000>,
0448 <0x6 0x81000000 0x0 0x4000>,
0449 <0x6 0x82000000 0x0 0x4000>,
0450 <0x6 0x83000000 0x0 0x4000>;
0451 reg-names = "config", "rc", "port0", "port1", "port2";
0452
0453 interrupt-parent = <&aic>;
0454 interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
0455 <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
0456 <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
0457
0458 msi-controller;
0459 msi-parent = <&pcie0>;
0460 msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
0461
0462
0463 iommu-map = <0x100 &pcie0_dart_0 1 1>,
0464 <0x200 &pcie0_dart_1 1 1>,
0465 <0x300 &pcie0_dart_2 1 1>;
0466 iommu-map-mask = <0xff00>;
0467
0468 bus-range = <0 3>;
0469 #address-cells = <3>;
0470 #size-cells = <2>;
0471 ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
0472 <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
0473
0474 power-domains = <&ps_apcie_gp>;
0475 pinctrl-0 = <&pcie_pins>;
0476 pinctrl-names = "default";
0477
0478 port00: pci@0,0 {
0479 device_type = "pci";
0480 reg = <0x0 0x0 0x0 0x0 0x0>;
0481 reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
0482
0483 #address-cells = <3>;
0484 #size-cells = <2>;
0485 ranges;
0486
0487 interrupt-controller;
0488 #interrupt-cells = <1>;
0489
0490 interrupt-map-mask = <0 0 0 7>;
0491 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
0492 <0 0 0 2 &port00 0 0 0 1>,
0493 <0 0 0 3 &port00 0 0 0 2>,
0494 <0 0 0 4 &port00 0 0 0 3>;
0495 };
0496
0497 port01: pci@1,0 {
0498 device_type = "pci";
0499 reg = <0x800 0x0 0x0 0x0 0x0>;
0500 reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
0501
0502 #address-cells = <3>;
0503 #size-cells = <2>;
0504 ranges;
0505
0506 interrupt-controller;
0507 #interrupt-cells = <1>;
0508
0509 interrupt-map-mask = <0 0 0 7>;
0510 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
0511 <0 0 0 2 &port01 0 0 0 1>,
0512 <0 0 0 3 &port01 0 0 0 2>,
0513 <0 0 0 4 &port01 0 0 0 3>;
0514 };
0515
0516 port02: pci@2,0 {
0517 device_type = "pci";
0518 reg = <0x1000 0x0 0x0 0x0 0x0>;
0519 reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
0520
0521 #address-cells = <3>;
0522 #size-cells = <2>;
0523 ranges;
0524
0525 interrupt-controller;
0526 #interrupt-cells = <1>;
0527
0528 interrupt-map-mask = <0 0 0 7>;
0529 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
0530 <0 0 0 2 &port02 0 0 0 1>,
0531 <0 0 0 3 &port02 0 0 0 2>,
0532 <0 0 0 4 &port02 0 0 0 3>;
0533 };
0534 };
0535 };
0536 };
0537
0538 #include "t8103-pmgr.dtsi"
