0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
0004 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
0005 *
0006 * AC200/AC202 = S905D3
0007 * AC213/AC214 = S905X3
0008 *
0009 */
0010
0011 #include "meson-sm1.dtsi"
0012 #include <dt-bindings/gpio/gpio.h>
0013 #include <dt-bindings/gpio/meson-g12a-gpio.h>
0014 #include <dt-bindings/input/input.h>
0015
0016 / {
0017 aliases {
0018 serial0 = &uart_AO;
0019 ethernet0 = ðmac;
0020 };
0021
0022 chosen {
0023 stdout-path = "serial0:115200n8";
0024 };
0025
0026 emmc_pwrseq: emmc-pwrseq {
0027 compatible = "mmc-pwrseq-emmc";
0028 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
0029 };
0030
0031 cvbs-connector {
0032 compatible = "composite-video-connector";
0033
0034 port {
0035 cvbs_connector_in: endpoint {
0036 remote-endpoint = <&cvbs_vdac_out>;
0037 };
0038 };
0039 };
0040
0041 hdmi-connector {
0042 compatible = "hdmi-connector";
0043 type = "a";
0044
0045 port {
0046 hdmi_connector_in: endpoint {
0047 remote-endpoint = <&hdmi_tx_tmds_out>;
0048 };
0049 };
0050 };
0051
0052 memory@0 {
0053 device_type = "memory";
0054 reg = <0x0 0x0 0x0 0x40000000>;
0055 };
0056
0057 ao_5v: regulator-ao_5v {
0058 compatible = "regulator-fixed";
0059 regulator-name = "AO_5V";
0060 regulator-min-microvolt = <5000000>;
0061 regulator-max-microvolt = <5000000>;
0062 vin-supply = <&dc_in>;
0063 regulator-always-on;
0064 };
0065
0066 dc_in: regulator-dc_in {
0067 compatible = "regulator-fixed";
0068 regulator-name = "DC_IN";
0069 regulator-min-microvolt = <5000000>;
0070 regulator-max-microvolt = <5000000>;
0071 regulator-always-on;
0072 };
0073
0074 emmc_1v8: regulator-emmc_1v8 {
0075 compatible = "regulator-fixed";
0076 regulator-name = "EMMC_1V8";
0077 regulator-min-microvolt = <1800000>;
0078 regulator-max-microvolt = <1800000>;
0079 vin-supply = <&vddao_3v3>;
0080 regulator-always-on;
0081 };
0082
0083 vddao_3v3: regulator-vddao_3v3 {
0084 compatible = "regulator-fixed";
0085 regulator-name = "VDDAO_3V3";
0086 regulator-min-microvolt = <3300000>;
0087 regulator-max-microvolt = <3300000>;
0088 vin-supply = <&dc_in>;
0089 regulator-always-on;
0090 };
0091
0092 vddcpu: regulator-vddcpu {
0093 compatible = "pwm-regulator";
0094
0095 regulator-name = "VDDCPU";
0096 regulator-min-microvolt = <690000>;
0097 regulator-max-microvolt = <1050000>;
0098
0099 vin-supply = <&dc_in>;
0100
0101 pwms = <&pwm_AO_cd 1 1500 0>;
0102 pwm-dutycycle-range = <100 0>;
0103
0104 regulator-boot-on;
0105 regulator-always-on;
0106 };
0107
0108 vddio_ao1v8: regulator-vddio_ao1v8 {
0109 compatible = "regulator-fixed";
0110 regulator-name = "VDDIO_AO1V8";
0111 regulator-min-microvolt = <1800000>;
0112 regulator-max-microvolt = <1800000>;
0113 vin-supply = <&vddao_3v3>;
0114 regulator-always-on;
0115 };
0116
0117 sdio_pwrseq: sdio-pwrseq {
0118 compatible = "mmc-pwrseq-simple";
0119 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
0120 clocks = <&wifi32k>;
0121 clock-names = "ext_clock";
0122 };
0123
0124 wifi32k: wifi32k {
0125 compatible = "pwm-clock";
0126 #clock-cells = <0>;
0127 clock-frequency = <32768>;
0128 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
0129 };
0130 };
0131
0132 &cec_AO {
0133 pinctrl-0 = <&cec_ao_a_h_pins>;
0134 pinctrl-names = "default";
0135 status = "disabled";
0136 hdmi-phandle = <&hdmi_tx>;
0137 };
0138
0139 &cecb_AO {
0140 pinctrl-0 = <&cec_ao_b_h_pins>;
0141 pinctrl-names = "default";
0142 status = "okay";
0143 hdmi-phandle = <&hdmi_tx>;
0144 };
0145
0146 &cpu0 {
0147 cpu-supply = <&vddcpu>;
0148 operating-points-v2 = <&cpu_opp_table>;
0149 clocks = <&clkc CLKID_CPU_CLK>;
0150 clock-latency = <50000>;
0151 };
0152
0153 &cpu1 {
0154 cpu-supply = <&vddcpu>;
0155 operating-points-v2 = <&cpu_opp_table>;
0156 clocks = <&clkc CLKID_CPU1_CLK>;
0157 clock-latency = <50000>;
0158 };
0159
0160 &cpu2 {
0161 cpu-supply = <&vddcpu>;
0162 operating-points-v2 = <&cpu_opp_table>;
0163 clocks = <&clkc CLKID_CPU2_CLK>;
0164 clock-latency = <50000>;
0165 };
0166
0167 &cpu3 {
0168 cpu-supply = <&vddcpu>;
0169 operating-points-v2 = <&cpu_opp_table>;
0170 clocks = <&clkc CLKID_CPU3_CLK>;
0171 clock-latency = <50000>;
0172 };
0173
0174 &cvbs_vdac_port {
0175 cvbs_vdac_out: endpoint {
0176 remote-endpoint = <&cvbs_connector_in>;
0177 };
0178 };
0179
0180 &hdmi_tx {
0181 status = "okay";
0182 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
0183 pinctrl-names = "default";
0184 };
0185
0186 &hdmi_tx_tmds_port {
0187 hdmi_tx_tmds_out: endpoint {
0188 remote-endpoint = <&hdmi_connector_in>;
0189 };
0190 };
0191
0192 &ir {
0193 status = "okay";
0194 pinctrl-0 = <&remote_input_ao_pins>;
0195 pinctrl-names = "default";
0196 };
0197
0198 &pwm_AO_ab {
0199 status = "okay";
0200 pinctrl-0 = <&pwm_ao_a_pins>;
0201 pinctrl-names = "default";
0202 clocks = <&xtal>;
0203 clock-names = "clkin0";
0204 };
0205
0206 &pwm_AO_cd {
0207 pinctrl-0 = <&pwm_ao_d_e_pins>;
0208 pinctrl-names = "default";
0209 clocks = <&xtal>;
0210 clock-names = "clkin1";
0211 status = "okay";
0212 };
0213
0214 &pwm_ef {
0215 status = "okay";
0216 pinctrl-0 = <&pwm_e_pins>;
0217 pinctrl-names = "default";
0218 clocks = <&xtal>;
0219 clock-names = "clkin0";
0220 };
0221
0222 &saradc {
0223 status = "okay";
0224 vref-supply = <&vddio_ao1v8>;
0225 };
0226
0227 /* SDIO */
0228 &sd_emmc_a {
0229 status = "okay";
0230 pinctrl-0 = <&sdio_pins>;
0231 pinctrl-1 = <&sdio_clk_gate_pins>;
0232 pinctrl-names = "default", "clk-gate";
0233 #address-cells = <1>;
0234 #size-cells = <0>;
0235
0236 bus-width = <4>;
0237 cap-sd-highspeed;
0238 sd-uhs-sdr104;
0239 max-frequency = <200000000>;
0240
0241 non-removable;
0242 disable-wp;
0243
0244 /* WiFi firmware requires power to be kept while in suspend */
0245 keep-power-in-suspend;
0246
0247 mmc-pwrseq = <&sdio_pwrseq>;
0248
0249 vmmc-supply = <&vddao_3v3>;
0250 vqmmc-supply = <&vddio_ao1v8>;
0251 };
0252
0253 /* SD Card */
0254 &sd_emmc_b {
0255 status = "okay";
0256 pinctrl-0 = <&sdcard_c_pins>;
0257 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
0258 pinctrl-names = "default", "clk-gate";
0259
0260 bus-width = <4>;
0261 cap-sd-highspeed;
0262 /* CRC errors are observed at 50MHz */
0263 max-frequency = <35000000>;
0264 disable-wp;
0265
0266 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
0267 vmmc-supply = <&vddao_3v3>;
0268 vqmmc-supply = <&vddao_3v3>;
0269 };
0270
0271 /* eMMC */
0272 &sd_emmc_c {
0273 status = "okay";
0274 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
0275 pinctrl-1 = <&emmc_clk_gate_pins>;
0276 pinctrl-names = "default", "clk-gate";
0277
0278 bus-width = <8>;
0279 cap-mmc-highspeed;
0280 mmc-ddr-1_8v;
0281 mmc-hs200-1_8v;
0282 max-frequency = <200000000>;
0283 non-removable;
0284 disable-wp;
0285
0286 mmc-pwrseq = <&emmc_pwrseq>;
0287 vmmc-supply = <&vddao_3v3>;
0288 vqmmc-supply = <&emmc_1v8>;
0289 };
0290
0291 &uart_AO {
0292 status = "okay";
0293 pinctrl-0 = <&uart_ao_a_pins>;
0294 pinctrl-names = "default";
0295 };
0296
0297 &usb {
0298 status = "okay";
0299 dr_mode = "otg";
0300 };
